1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
8 #include <rte_common.h>
10 #include <rte_memory.h>
11 #include <rte_malloc.h>
12 #include <rte_cycles.h>
13 #include <rte_prefetch.h>
14 #include <rte_branch_prediction.h>
16 #include <rte_bitmap.h>
17 #include <rte_reciprocal.h>
19 #include "rte_sched.h"
20 #include "rte_sched_common.h"
21 #include "rte_approx.h"
23 #ifdef __INTEL_COMPILER
24 #pragma warning(disable:2259) /* conversion may lose significant bits */
27 #ifdef RTE_SCHED_VECTOR
31 #define SCHED_VECTOR_SSE4
32 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
33 #define SCHED_VECTOR_NEON
38 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
39 #define RTE_SCHED_WRR_SHIFT 3
40 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
41 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
42 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
44 /* Scaling for cycles_per_byte calculation
45 * Chosen so that minimum rate is 480 bit/sec
47 #define RTE_SCHED_TIME_SHIFT 8
49 struct rte_sched_subport {
50 /* Token bucket (TB) */
51 uint64_t tb_time; /* time of last update */
53 uint32_t tb_credits_per_period;
57 /* Traffic classes (TCs) */
58 uint64_t tc_time; /* time of next update */
59 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
60 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
63 /* TC oversubscription */
65 uint32_t tc_ov_wm_min;
66 uint32_t tc_ov_wm_max;
67 uint8_t tc_ov_period_id;
73 struct rte_sched_subport_stats stats;
76 struct rte_sched_pipe_profile {
77 /* Token bucket (TB) */
79 uint32_t tb_credits_per_period;
82 /* Pipe traffic classes */
84 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
88 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
91 struct rte_sched_pipe {
92 /* Token bucket (TB) */
93 uint64_t tb_time; /* time of last update */
96 /* Pipe profile and flags */
99 /* Traffic classes (TCs) */
100 uint64_t tc_time; /* time of next update */
101 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
103 /* Weighted Round Robin (WRR) */
104 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
106 /* TC oversubscription */
107 uint32_t tc_ov_credits;
108 uint8_t tc_ov_period_id;
110 } __rte_cache_aligned;
112 struct rte_sched_queue {
117 struct rte_sched_queue_extra {
118 struct rte_sched_queue_stats stats;
125 e_GRINDER_PREFETCH_PIPE = 0,
126 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
127 e_GRINDER_PREFETCH_MBUF,
132 * Path through the scheduler hierarchy used by the scheduler enqueue
133 * operation to identify the destination queue for the current
134 * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
135 * each packet, typically written by the classification stage and read
136 * by scheduler enqueue.
138 struct rte_sched_port_hierarchy {
139 uint16_t queue:2; /**< Queue ID (0 .. 3) */
140 uint16_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/
141 uint32_t color:2; /**< Color */
143 uint16_t subport; /**< Subport ID */
144 uint32_t pipe; /**< Pipe ID */
147 struct rte_sched_grinder {
149 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
150 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
155 enum grinder_state state;
158 struct rte_sched_subport *subport;
159 struct rte_sched_pipe *pipe;
160 struct rte_sched_pipe_profile *pipe_params;
163 uint8_t tccache_qmask[4];
164 uint32_t tccache_qindex[4];
170 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
171 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
172 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
176 struct rte_mbuf *pkt;
179 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
180 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
181 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
184 struct rte_sched_port {
185 /* User parameters */
186 uint32_t n_subports_per_port;
187 uint32_t n_pipes_per_subport;
190 uint32_t frame_overhead;
191 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
192 uint32_t n_pipe_profiles;
193 uint32_t pipe_tc3_rate_max;
195 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
199 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
200 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
201 uint64_t time; /* Current NIC TX time measured in bytes */
202 struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
204 /* Scheduling loop detection */
206 uint32_t pipe_exhaustion;
209 struct rte_bitmap *bmp;
210 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
213 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
214 uint32_t busy_grinders;
215 struct rte_mbuf **pkts_out;
218 /* Queue base calculation */
219 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
222 /* Large data structures */
223 struct rte_sched_subport *subport;
224 struct rte_sched_pipe *pipe;
225 struct rte_sched_queue *queue;
226 struct rte_sched_queue_extra *queue_extra;
227 struct rte_sched_pipe_profile *pipe_profiles;
229 struct rte_mbuf **queue_array;
230 uint8_t memory[0] __rte_cache_aligned;
231 } __rte_cache_aligned;
233 enum rte_sched_port_array {
234 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
235 e_RTE_SCHED_PORT_ARRAY_PIPE,
236 e_RTE_SCHED_PORT_ARRAY_QUEUE,
237 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
238 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
239 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
240 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
241 e_RTE_SCHED_PORT_ARRAY_TOTAL,
244 #ifdef RTE_SCHED_COLLECT_STATS
246 static inline uint32_t
247 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
249 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
254 static inline uint32_t
255 rte_sched_port_queues_per_port(struct rte_sched_port *port)
257 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
260 static inline struct rte_mbuf **
261 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
263 uint32_t pindex = qindex >> 4;
264 uint32_t qpos = qindex & 0xF;
266 return (port->queue_array + pindex *
267 port->qsize_sum + port->qsize_add[qpos]);
270 static inline uint16_t
271 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
273 uint32_t tc = (qindex >> 2) & 0x3;
275 return port->qsize[tc];
279 pipe_profile_check(struct rte_sched_pipe_params *params,
284 /* Pipe parameters */
288 /* TB rate: non-zero, not greater than port rate */
289 if (params->tb_rate == 0 ||
290 params->tb_rate > rate)
293 /* TB size: non-zero */
294 if (params->tb_size == 0)
297 /* TC rate: non-zero, less than pipe rate */
298 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
299 if (params->tc_rate[i] == 0 ||
300 params->tc_rate[i] > params->tb_rate)
304 /* TC period: non-zero */
305 if (params->tc_period == 0)
308 #ifdef RTE_SCHED_SUBPORT_TC_OV
309 /* TC3 oversubscription weight: non-zero */
310 if (params->tc_ov_weight == 0)
314 /* Queue WRR weights: non-zero */
315 for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
316 if (params->wrr_weights[i] == 0)
324 rte_sched_port_check_params(struct rte_sched_port_params *params)
332 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
336 if (params->rate == 0)
340 if (params->mtu == 0)
343 /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
344 if (params->n_subports_per_port == 0 ||
345 params->n_subports_per_port > 1u << 16 ||
346 !rte_is_power_of_2(params->n_subports_per_port))
349 /* n_pipes_per_subport: non-zero, power of 2 */
350 if (params->n_pipes_per_subport == 0 ||
351 !rte_is_power_of_2(params->n_pipes_per_subport))
354 /* qsize: non-zero, power of 2,
355 * no bigger than 32K (due to 16-bit read/write pointers)
357 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
358 uint16_t qsize = params->qsize[i];
360 if (qsize == 0 || !rte_is_power_of_2(qsize))
364 /* pipe_profiles and n_pipe_profiles */
365 if (params->pipe_profiles == NULL ||
366 params->n_pipe_profiles == 0 ||
367 params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
370 for (i = 0; i < params->n_pipe_profiles; i++) {
371 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
374 status = pipe_profile_check(p, params->rate);
383 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
385 uint32_t n_subports_per_port = params->n_subports_per_port;
386 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
387 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
388 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
390 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
391 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
392 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
393 uint32_t size_queue_extra
394 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
395 uint32_t size_pipe_profiles
396 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
397 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
398 uint32_t size_per_pipe_queue_array, size_queue_array;
402 size_per_pipe_queue_array = 0;
403 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
404 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
405 * params->qsize[i] * sizeof(struct rte_mbuf *);
407 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
411 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
413 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
415 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
417 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
419 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
421 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
423 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
425 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
427 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
429 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
431 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
433 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
435 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
437 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
443 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
445 uint32_t size0, size1;
448 status = rte_sched_port_check_params(params);
450 RTE_LOG(NOTICE, SCHED,
451 "Port scheduler params check failed (%d)\n", status);
456 size0 = sizeof(struct rte_sched_port);
457 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
459 return size0 + size1;
463 rte_sched_port_config_qsize(struct rte_sched_port *port)
466 port->qsize_add[0] = 0;
467 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
468 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
469 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
472 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
473 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
474 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
475 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
478 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
479 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
480 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
481 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
484 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
485 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
486 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
487 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
489 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
493 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
495 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
497 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
498 " Token bucket: period = %u, credits per period = %u, size = %u\n"
499 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
500 " Traffic class 3 oversubscription: weight = %hhu\n"
501 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
506 p->tb_credits_per_period,
509 /* Traffic classes */
511 p->tc_credits_per_period[0],
512 p->tc_credits_per_period[1],
513 p->tc_credits_per_period[2],
514 p->tc_credits_per_period[3],
516 /* Traffic class 3 oversubscription */
520 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
521 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
522 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
523 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
526 static inline uint64_t
527 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
529 uint64_t time = time_ms;
531 time = (time * rate) / 1000;
537 rte_sched_pipe_profile_convert(struct rte_sched_pipe_params *src,
538 struct rte_sched_pipe_profile *dst,
544 if (src->tb_rate == rate) {
545 dst->tb_credits_per_period = 1;
548 double tb_rate = (double) src->tb_rate
550 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
552 rte_approx(tb_rate, d,
553 &dst->tb_credits_per_period, &dst->tb_period);
556 dst->tb_size = src->tb_size;
558 /* Traffic Classes */
559 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
562 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
563 dst->tc_credits_per_period[i]
564 = rte_sched_time_ms_to_bytes(src->tc_period,
567 #ifdef RTE_SCHED_SUBPORT_TC_OV
568 dst->tc_ov_weight = src->tc_ov_weight;
572 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
573 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
574 uint32_t lcd, lcd1, lcd2;
577 qindex = i * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
579 wrr_cost[0] = src->wrr_weights[qindex];
580 wrr_cost[1] = src->wrr_weights[qindex + 1];
581 wrr_cost[2] = src->wrr_weights[qindex + 2];
582 wrr_cost[3] = src->wrr_weights[qindex + 3];
584 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
585 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
586 lcd = rte_get_lcd(lcd1, lcd2);
588 wrr_cost[0] = lcd / wrr_cost[0];
589 wrr_cost[1] = lcd / wrr_cost[1];
590 wrr_cost[2] = lcd / wrr_cost[2];
591 wrr_cost[3] = lcd / wrr_cost[3];
593 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
594 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
595 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
596 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
601 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port,
602 struct rte_sched_port_params *params)
606 for (i = 0; i < port->n_pipe_profiles; i++) {
607 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
608 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
610 rte_sched_pipe_profile_convert(src, dst, params->rate);
611 rte_sched_port_log_pipe_profile(port, i);
614 port->pipe_tc3_rate_max = 0;
615 for (i = 0; i < port->n_pipe_profiles; i++) {
616 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
617 uint32_t pipe_tc3_rate = src->tc_rate[3];
619 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
620 port->pipe_tc3_rate_max = pipe_tc3_rate;
624 struct rte_sched_port *
625 rte_sched_port_config(struct rte_sched_port_params *params)
627 struct rte_sched_port *port = NULL;
628 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
630 /* Check user parameters. Determine the amount of memory to allocate */
631 mem_size = rte_sched_port_get_memory_footprint(params);
635 /* Allocate memory to store the data structures */
636 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
640 /* compile time checks */
641 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
642 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
644 /* User parameters */
645 port->n_subports_per_port = params->n_subports_per_port;
646 port->n_pipes_per_subport = params->n_pipes_per_subport;
647 port->rate = params->rate;
648 port->mtu = params->mtu + params->frame_overhead;
649 port->frame_overhead = params->frame_overhead;
650 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
651 port->n_pipe_profiles = params->n_pipe_profiles;
654 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
657 for (j = 0; j < e_RTE_METER_COLORS; j++) {
658 /* if min/max are both zero, then RED is disabled */
659 if ((params->red_params[i][j].min_th |
660 params->red_params[i][j].max_th) == 0) {
664 if (rte_red_config_init(&port->red_config[i][j],
665 params->red_params[i][j].wq_log2,
666 params->red_params[i][j].min_th,
667 params->red_params[i][j].max_th,
668 params->red_params[i][j].maxp_inv) != 0) {
676 port->time_cpu_cycles = rte_get_tsc_cycles();
677 port->time_cpu_bytes = 0;
680 cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
682 port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
684 /* Scheduling loop detection */
685 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
686 port->pipe_exhaustion = 0;
689 port->busy_grinders = 0;
690 port->pkts_out = NULL;
691 port->n_pkts_out = 0;
693 /* Queue base calculation */
694 rte_sched_port_config_qsize(port);
696 /* Large data structures */
697 port->subport = (struct rte_sched_subport *)
698 (port->memory + rte_sched_port_get_array_base(params,
699 e_RTE_SCHED_PORT_ARRAY_SUBPORT));
700 port->pipe = (struct rte_sched_pipe *)
701 (port->memory + rte_sched_port_get_array_base(params,
702 e_RTE_SCHED_PORT_ARRAY_PIPE));
703 port->queue = (struct rte_sched_queue *)
704 (port->memory + rte_sched_port_get_array_base(params,
705 e_RTE_SCHED_PORT_ARRAY_QUEUE));
706 port->queue_extra = (struct rte_sched_queue_extra *)
707 (port->memory + rte_sched_port_get_array_base(params,
708 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
709 port->pipe_profiles = (struct rte_sched_pipe_profile *)
710 (port->memory + rte_sched_port_get_array_base(params,
711 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
712 port->bmp_array = port->memory
713 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
714 port->queue_array = (struct rte_mbuf **)
715 (port->memory + rte_sched_port_get_array_base(params,
716 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
718 /* Pipe profile table */
719 rte_sched_port_config_pipe_profile_table(port, params);
722 n_queues_per_port = rte_sched_port_queues_per_port(port);
723 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
724 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
726 if (port->bmp == NULL) {
727 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
731 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
732 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
739 rte_sched_port_free(struct rte_sched_port *port)
742 uint32_t n_queues_per_port;
744 /* Check user parameters */
748 n_queues_per_port = rte_sched_port_queues_per_port(port);
750 /* Free enqueued mbufs */
751 for (qindex = 0; qindex < n_queues_per_port; qindex++) {
752 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
753 uint16_t qsize = rte_sched_port_qsize(port, qindex);
754 struct rte_sched_queue *queue = port->queue + qindex;
755 uint16_t qr = queue->qr & (qsize - 1);
756 uint16_t qw = queue->qw & (qsize - 1);
758 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
759 rte_pktmbuf_free(mbufs[qr]);
762 rte_bitmap_free(port->bmp);
767 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
769 struct rte_sched_subport *s = port->subport + i;
771 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
772 " Token bucket: period = %u, credits per period = %u, size = %u\n"
773 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
774 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
779 s->tb_credits_per_period,
782 /* Traffic classes */
784 s->tc_credits_per_period[0],
785 s->tc_credits_per_period[1],
786 s->tc_credits_per_period[2],
787 s->tc_credits_per_period[3],
789 /* Traffic class 3 oversubscription */
795 rte_sched_subport_config(struct rte_sched_port *port,
797 struct rte_sched_subport_params *params)
799 struct rte_sched_subport *s;
802 /* Check user parameters */
804 subport_id >= port->n_subports_per_port ||
808 if (params->tb_rate == 0 || params->tb_rate > port->rate)
811 if (params->tb_size == 0)
814 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
815 if (params->tc_rate[i] == 0 ||
816 params->tc_rate[i] > params->tb_rate)
820 if (params->tc_period == 0)
823 s = port->subport + subport_id;
825 /* Token Bucket (TB) */
826 if (params->tb_rate == port->rate) {
827 s->tb_credits_per_period = 1;
830 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
831 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
833 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
836 s->tb_size = params->tb_size;
837 s->tb_time = port->time;
838 s->tb_credits = s->tb_size / 2;
840 /* Traffic Classes (TCs) */
841 s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
842 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
843 s->tc_credits_per_period[i]
844 = rte_sched_time_ms_to_bytes(params->tc_period,
847 s->tc_time = port->time + s->tc_period;
848 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
849 s->tc_credits[i] = s->tc_credits_per_period[i];
851 #ifdef RTE_SCHED_SUBPORT_TC_OV
852 /* TC oversubscription */
853 s->tc_ov_wm_min = port->mtu;
854 s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
855 port->pipe_tc3_rate_max);
856 s->tc_ov_wm = s->tc_ov_wm_max;
857 s->tc_ov_period_id = 0;
863 rte_sched_port_log_subport_config(port, subport_id);
869 rte_sched_pipe_config(struct rte_sched_port *port,
872 int32_t pipe_profile)
874 struct rte_sched_subport *s;
875 struct rte_sched_pipe *p;
876 struct rte_sched_pipe_profile *params;
877 uint32_t deactivate, profile, i;
879 /* Check user parameters */
880 profile = (uint32_t) pipe_profile;
881 deactivate = (pipe_profile < 0);
884 subport_id >= port->n_subports_per_port ||
885 pipe_id >= port->n_pipes_per_subport ||
886 (!deactivate && profile >= port->n_pipe_profiles))
890 /* Check that subport configuration is valid */
891 s = port->subport + subport_id;
892 if (s->tb_period == 0)
895 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
897 /* Handle the case when pipe already has a valid configuration */
899 params = port->pipe_profiles + p->profile;
901 #ifdef RTE_SCHED_SUBPORT_TC_OV
902 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
903 / (double) s->tc_period;
904 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
905 / (double) params->tc_period;
906 uint32_t tc3_ov = s->tc_ov;
908 /* Unplug pipe from its subport */
909 s->tc_ov_n -= params->tc_ov_weight;
910 s->tc_ov_rate -= pipe_tc3_rate;
911 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
913 if (s->tc_ov != tc3_ov) {
914 RTE_LOG(DEBUG, SCHED,
915 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
916 subport_id, subport_tc3_rate, s->tc_ov_rate);
921 memset(p, 0, sizeof(struct rte_sched_pipe));
927 /* Apply the new pipe configuration */
928 p->profile = profile;
929 params = port->pipe_profiles + p->profile;
931 /* Token Bucket (TB) */
932 p->tb_time = port->time;
933 p->tb_credits = params->tb_size / 2;
935 /* Traffic Classes (TCs) */
936 p->tc_time = port->time + params->tc_period;
937 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
938 p->tc_credits[i] = params->tc_credits_per_period[i];
940 #ifdef RTE_SCHED_SUBPORT_TC_OV
942 /* Subport TC3 oversubscription */
943 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
944 / (double) s->tc_period;
945 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
946 / (double) params->tc_period;
947 uint32_t tc3_ov = s->tc_ov;
949 s->tc_ov_n += params->tc_ov_weight;
950 s->tc_ov_rate += pipe_tc3_rate;
951 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
953 if (s->tc_ov != tc3_ov) {
954 RTE_LOG(DEBUG, SCHED,
955 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
956 subport_id, subport_tc3_rate, s->tc_ov_rate);
958 p->tc_ov_period_id = s->tc_ov_period_id;
959 p->tc_ov_credits = s->tc_ov_wm;
966 int __rte_experimental
967 rte_sched_port_pipe_profile_add(struct rte_sched_port *port,
968 struct rte_sched_pipe_params *params,
969 uint32_t *pipe_profile_id)
971 struct rte_sched_pipe_profile *pp;
979 /* Pipe profiles not exceeds the max limit */
980 if (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)
984 status = pipe_profile_check(params, port->rate);
988 pp = &port->pipe_profiles[port->n_pipe_profiles];
989 rte_sched_pipe_profile_convert(params, pp, port->rate);
991 /* Pipe profile not exists */
992 for (i = 0; i < port->n_pipe_profiles; i++)
993 if (memcmp(port->pipe_profiles + i, pp, sizeof(*pp)) == 0)
996 /* Pipe profile commit */
997 *pipe_profile_id = port->n_pipe_profiles;
998 port->n_pipe_profiles++;
1000 if (port->pipe_tc3_rate_max < params->tc_rate[3])
1001 port->pipe_tc3_rate_max = params->tc_rate[3];
1003 rte_sched_port_log_pipe_profile(port, *pipe_profile_id);
1009 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
1010 uint32_t subport, uint32_t pipe, uint32_t traffic_class,
1011 uint32_t queue, enum rte_meter_color color)
1013 struct rte_sched_port_hierarchy *sched
1014 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1016 RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
1018 sched->color = (uint32_t) color;
1019 sched->subport = subport;
1021 sched->traffic_class = traffic_class;
1022 sched->queue = queue;
1026 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
1027 uint32_t *subport, uint32_t *pipe,
1028 uint32_t *traffic_class, uint32_t *queue)
1030 const struct rte_sched_port_hierarchy *sched
1031 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1033 *subport = sched->subport;
1034 *pipe = sched->pipe;
1035 *traffic_class = sched->traffic_class;
1036 *queue = sched->queue;
1039 enum rte_meter_color
1040 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
1042 const struct rte_sched_port_hierarchy *sched
1043 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1045 return (enum rte_meter_color) sched->color;
1049 rte_sched_subport_read_stats(struct rte_sched_port *port,
1050 uint32_t subport_id,
1051 struct rte_sched_subport_stats *stats,
1054 struct rte_sched_subport *s;
1056 /* Check user parameters */
1057 if (port == NULL || subport_id >= port->n_subports_per_port ||
1058 stats == NULL || tc_ov == NULL)
1061 s = port->subport + subport_id;
1063 /* Copy subport stats and clear */
1064 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1065 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1067 /* Subport TC oversubscription status */
1074 rte_sched_queue_read_stats(struct rte_sched_port *port,
1076 struct rte_sched_queue_stats *stats,
1079 struct rte_sched_queue *q;
1080 struct rte_sched_queue_extra *qe;
1082 /* Check user parameters */
1083 if ((port == NULL) ||
1084 (queue_id >= rte_sched_port_queues_per_port(port)) ||
1089 q = port->queue + queue_id;
1090 qe = port->queue_extra + queue_id;
1092 /* Copy queue stats and clear */
1093 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1094 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1097 *qlen = q->qw - q->qr;
1102 static inline uint32_t
1103 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1107 result = subport * port->n_pipes_per_subport + pipe;
1108 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1109 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1114 #ifdef RTE_SCHED_DEBUG
1117 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1119 struct rte_sched_queue *queue = port->queue + qindex;
1121 return queue->qr == queue->qw;
1124 #endif /* RTE_SCHED_DEBUG */
1126 #ifdef RTE_SCHED_COLLECT_STATS
1129 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1131 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1132 uint32_t tc_index = (qindex >> 2) & 0x3;
1133 uint32_t pkt_len = pkt->pkt_len;
1135 s->stats.n_pkts_tc[tc_index] += 1;
1136 s->stats.n_bytes_tc[tc_index] += pkt_len;
1139 #ifdef RTE_SCHED_RED
1141 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1143 struct rte_mbuf *pkt, uint32_t red)
1146 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1148 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1151 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1152 uint32_t tc_index = (qindex >> 2) & 0x3;
1153 uint32_t pkt_len = pkt->pkt_len;
1155 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1156 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1157 #ifdef RTE_SCHED_RED
1158 s->stats.n_pkts_red_dropped[tc_index] += red;
1163 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1165 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1166 uint32_t pkt_len = pkt->pkt_len;
1168 qe->stats.n_pkts += 1;
1169 qe->stats.n_bytes += pkt_len;
1172 #ifdef RTE_SCHED_RED
1174 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1176 struct rte_mbuf *pkt, uint32_t red)
1179 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1181 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1184 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1185 uint32_t pkt_len = pkt->pkt_len;
1187 qe->stats.n_pkts_dropped += 1;
1188 qe->stats.n_bytes_dropped += pkt_len;
1189 #ifdef RTE_SCHED_RED
1190 qe->stats.n_pkts_red_dropped += red;
1194 #endif /* RTE_SCHED_COLLECT_STATS */
1196 #ifdef RTE_SCHED_RED
1199 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1201 struct rte_sched_queue_extra *qe;
1202 struct rte_red_config *red_cfg;
1203 struct rte_red *red;
1205 enum rte_meter_color color;
1207 tc_index = (qindex >> 2) & 0x3;
1208 color = rte_sched_port_pkt_read_color(pkt);
1209 red_cfg = &port->red_config[tc_index][color];
1211 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1214 qe = port->queue_extra + qindex;
1217 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1221 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1223 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1224 struct rte_red *red = &qe->red;
1226 rte_red_mark_queue_empty(red, port->time);
1231 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1233 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1235 #endif /* RTE_SCHED_RED */
1237 #ifdef RTE_SCHED_DEBUG
1240 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1247 rte_panic("Empty slab at position %u\n", bmp_pos);
1250 for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1251 if (mask & bmp_slab) {
1252 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1253 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1260 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1264 #endif /* RTE_SCHED_DEBUG */
1266 static inline uint32_t
1267 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1268 struct rte_mbuf *pkt)
1270 struct rte_sched_queue *q;
1271 #ifdef RTE_SCHED_COLLECT_STATS
1272 struct rte_sched_queue_extra *qe;
1274 uint32_t subport, pipe, traffic_class, queue, qindex;
1276 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1278 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1279 q = port->queue + qindex;
1281 #ifdef RTE_SCHED_COLLECT_STATS
1282 qe = port->queue_extra + qindex;
1290 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1291 uint32_t qindex, struct rte_mbuf **qbase)
1293 struct rte_sched_queue *q;
1294 struct rte_mbuf **q_qw;
1297 q = port->queue + qindex;
1298 qsize = rte_sched_port_qsize(port, qindex);
1299 q_qw = qbase + (q->qw & (qsize - 1));
1301 rte_prefetch0(q_qw);
1302 rte_bitmap_prefetch0(port->bmp, qindex);
1306 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1307 struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1309 struct rte_sched_queue *q;
1313 q = port->queue + qindex;
1314 qsize = rte_sched_port_qsize(port, qindex);
1315 qlen = q->qw - q->qr;
1317 /* Drop the packet (and update drop stats) when queue is full */
1318 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1320 rte_pktmbuf_free(pkt);
1321 #ifdef RTE_SCHED_COLLECT_STATS
1322 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1324 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1330 /* Enqueue packet */
1331 qbase[q->qw & (qsize - 1)] = pkt;
1334 /* Activate queue in the port bitmap */
1335 rte_bitmap_set(port->bmp, qindex);
1338 #ifdef RTE_SCHED_COLLECT_STATS
1339 rte_sched_port_update_subport_stats(port, qindex, pkt);
1340 rte_sched_port_update_queue_stats(port, qindex, pkt);
1348 * The enqueue function implements a 4-level pipeline with each stage
1349 * processing two different packets. The purpose of using a pipeline
1350 * is to hide the latency of prefetching the data structures. The
1351 * naming convention is presented in the diagram below:
1353 * p00 _______ p10 _______ p20 _______ p30 _______
1354 * ----->| |----->| |----->| |----->| |----->
1355 * | 0 | | 1 | | 2 | | 3 |
1356 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1361 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1364 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1365 *pkt30, *pkt31, *pkt_last;
1366 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1367 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1368 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1369 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1375 * Less then 6 input packets available, which is not enough to
1378 if (unlikely(n_pkts < 6)) {
1379 struct rte_mbuf **q_base[5];
1382 /* Prefetch the mbuf structure of each packet */
1383 for (i = 0; i < n_pkts; i++)
1384 rte_prefetch0(pkts[i]);
1386 /* Prefetch the queue structure for each queue */
1387 for (i = 0; i < n_pkts; i++)
1388 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1391 /* Prefetch the write pointer location of each queue */
1392 for (i = 0; i < n_pkts; i++) {
1393 q_base[i] = rte_sched_port_qbase(port, q[i]);
1394 rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1398 /* Write each packet to its queue */
1399 for (i = 0; i < n_pkts; i++)
1400 result += rte_sched_port_enqueue_qwa(port, q[i],
1401 q_base[i], pkts[i]);
1406 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1409 rte_prefetch0(pkt20);
1410 rte_prefetch0(pkt21);
1414 rte_prefetch0(pkt10);
1415 rte_prefetch0(pkt11);
1417 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1418 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1422 rte_prefetch0(pkt00);
1423 rte_prefetch0(pkt01);
1425 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1426 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1428 q20_base = rte_sched_port_qbase(port, q20);
1429 q21_base = rte_sched_port_qbase(port, q21);
1430 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1431 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1433 /* Run the pipeline */
1434 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1435 /* Propagate stage inputs */
1446 q30_base = q20_base;
1447 q31_base = q21_base;
1449 /* Stage 0: Get packets in */
1451 pkt01 = pkts[i + 1];
1452 rte_prefetch0(pkt00);
1453 rte_prefetch0(pkt01);
1455 /* Stage 1: Prefetch queue structure storing queue pointers */
1456 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1457 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1459 /* Stage 2: Prefetch queue write location */
1460 q20_base = rte_sched_port_qbase(port, q20);
1461 q21_base = rte_sched_port_qbase(port, q21);
1462 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1463 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1465 /* Stage 3: Write packet to queue and activate queue */
1466 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1467 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1468 result += r30 + r31;
1472 * Drain the pipeline (exactly 6 packets).
1473 * Handle the last packet in the case
1474 * of an odd number of input packets.
1476 pkt_last = pkts[n_pkts - 1];
1477 rte_prefetch0(pkt_last);
1479 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1480 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1482 q10_base = rte_sched_port_qbase(port, q10);
1483 q11_base = rte_sched_port_qbase(port, q11);
1484 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1485 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1487 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1488 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1489 result += r20 + r21;
1491 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1493 q00_base = rte_sched_port_qbase(port, q00);
1494 q01_base = rte_sched_port_qbase(port, q01);
1495 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1496 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1498 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1499 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1500 result += r10 + r11;
1502 q_last_base = rte_sched_port_qbase(port, q_last);
1503 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1505 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1506 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1507 result += r00 + r01;
1510 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1517 #ifndef RTE_SCHED_SUBPORT_TC_OV
1520 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1522 struct rte_sched_grinder *grinder = port->grinder + pos;
1523 struct rte_sched_subport *subport = grinder->subport;
1524 struct rte_sched_pipe *pipe = grinder->pipe;
1525 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1529 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1530 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1531 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1532 subport->tb_time += n_periods * subport->tb_period;
1535 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1536 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1537 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1538 pipe->tb_time += n_periods * params->tb_period;
1541 if (unlikely(port->time >= subport->tc_time)) {
1542 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1543 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1544 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1545 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1546 subport->tc_time = port->time + subport->tc_period;
1550 if (unlikely(port->time >= pipe->tc_time)) {
1551 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1552 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1553 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1554 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1555 pipe->tc_time = port->time + params->tc_period;
1561 static inline uint32_t
1562 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1564 struct rte_sched_grinder *grinder = port->grinder + pos;
1565 struct rte_sched_subport *subport = grinder->subport;
1566 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1567 uint32_t tc_ov_consumption_max;
1568 uint32_t tc_ov_wm = subport->tc_ov_wm;
1570 if (subport->tc_ov == 0)
1571 return subport->tc_ov_wm_max;
1573 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1574 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1575 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1576 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1578 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1579 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1581 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1582 tc_ov_wm -= tc_ov_wm >> 7;
1583 if (tc_ov_wm < subport->tc_ov_wm_min)
1584 tc_ov_wm = subport->tc_ov_wm_min;
1589 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1590 if (tc_ov_wm > subport->tc_ov_wm_max)
1591 tc_ov_wm = subport->tc_ov_wm_max;
1597 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1599 struct rte_sched_grinder *grinder = port->grinder + pos;
1600 struct rte_sched_subport *subport = grinder->subport;
1601 struct rte_sched_pipe *pipe = grinder->pipe;
1602 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1606 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1607 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1608 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1609 subport->tb_time += n_periods * subport->tb_period;
1612 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1613 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1614 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1615 pipe->tb_time += n_periods * params->tb_period;
1618 if (unlikely(port->time >= subport->tc_time)) {
1619 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1621 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1622 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1623 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1624 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1626 subport->tc_time = port->time + subport->tc_period;
1627 subport->tc_ov_period_id++;
1631 if (unlikely(port->time >= pipe->tc_time)) {
1632 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1633 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1634 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1635 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1636 pipe->tc_time = port->time + params->tc_period;
1639 /* Pipe TCs - Oversubscription */
1640 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1641 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1643 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1647 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1650 #ifndef RTE_SCHED_SUBPORT_TC_OV
1653 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1655 struct rte_sched_grinder *grinder = port->grinder + pos;
1656 struct rte_sched_subport *subport = grinder->subport;
1657 struct rte_sched_pipe *pipe = grinder->pipe;
1658 struct rte_mbuf *pkt = grinder->pkt;
1659 uint32_t tc_index = grinder->tc_index;
1660 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1661 uint32_t subport_tb_credits = subport->tb_credits;
1662 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1663 uint32_t pipe_tb_credits = pipe->tb_credits;
1664 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1667 /* Check queue credits */
1668 enough_credits = (pkt_len <= subport_tb_credits) &&
1669 (pkt_len <= subport_tc_credits) &&
1670 (pkt_len <= pipe_tb_credits) &&
1671 (pkt_len <= pipe_tc_credits);
1673 if (!enough_credits)
1676 /* Update port credits */
1677 subport->tb_credits -= pkt_len;
1678 subport->tc_credits[tc_index] -= pkt_len;
1679 pipe->tb_credits -= pkt_len;
1680 pipe->tc_credits[tc_index] -= pkt_len;
1688 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1690 struct rte_sched_grinder *grinder = port->grinder + pos;
1691 struct rte_sched_subport *subport = grinder->subport;
1692 struct rte_sched_pipe *pipe = grinder->pipe;
1693 struct rte_mbuf *pkt = grinder->pkt;
1694 uint32_t tc_index = grinder->tc_index;
1695 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1696 uint32_t subport_tb_credits = subport->tb_credits;
1697 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1698 uint32_t pipe_tb_credits = pipe->tb_credits;
1699 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1700 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1701 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1702 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1705 /* Check pipe and subport credits */
1706 enough_credits = (pkt_len <= subport_tb_credits) &&
1707 (pkt_len <= subport_tc_credits) &&
1708 (pkt_len <= pipe_tb_credits) &&
1709 (pkt_len <= pipe_tc_credits) &&
1710 (pkt_len <= pipe_tc_ov_credits);
1712 if (!enough_credits)
1715 /* Update pipe and subport credits */
1716 subport->tb_credits -= pkt_len;
1717 subport->tc_credits[tc_index] -= pkt_len;
1718 pipe->tb_credits -= pkt_len;
1719 pipe->tc_credits[tc_index] -= pkt_len;
1720 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1725 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1729 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1731 struct rte_sched_grinder *grinder = port->grinder + pos;
1732 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1733 struct rte_mbuf *pkt = grinder->pkt;
1734 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1736 if (!grinder_credits_check(port, pos))
1739 /* Advance port time */
1740 port->time += pkt_len;
1743 port->pkts_out[port->n_pkts_out++] = pkt;
1745 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1746 if (queue->qr == queue->qw) {
1747 uint32_t qindex = grinder->qindex[grinder->qpos];
1749 rte_bitmap_clear(port->bmp, qindex);
1750 grinder->qmask &= ~(1 << grinder->qpos);
1751 grinder->wrr_mask[grinder->qpos] = 0;
1752 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1755 /* Reset pipe loop detection */
1756 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1757 grinder->productive = 1;
1762 #ifdef SCHED_VECTOR_SSE4
1765 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1767 __m128i index = _mm_set1_epi32(base_pipe);
1768 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1769 __m128i res = _mm_cmpeq_epi32(pipes, index);
1771 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1772 pipes = _mm_cmpeq_epi32(pipes, index);
1773 res = _mm_or_si128(res, pipes);
1775 if (_mm_testz_si128(res, res))
1781 #elif defined(SCHED_VECTOR_NEON)
1784 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1786 uint32x4_t index, pipes;
1787 uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1789 index = vmovq_n_u32(base_pipe);
1790 pipes = vld1q_u32(pos);
1791 if (!vminvq_u32(veorq_u32(pipes, index)))
1794 pipes = vld1q_u32(pos + 4);
1795 if (!vminvq_u32(veorq_u32(pipes, index)))
1804 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1808 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1809 if (port->grinder_base_bmp_pos[i] == base_pipe)
1816 #endif /* RTE_SCHED_OPTIMIZATIONS */
1819 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1821 struct rte_sched_grinder *grinder = port->grinder + pos;
1824 grinder->pcache_w = 0;
1825 grinder->pcache_r = 0;
1827 w[0] = (uint16_t) bmp_slab;
1828 w[1] = (uint16_t) (bmp_slab >> 16);
1829 w[2] = (uint16_t) (bmp_slab >> 32);
1830 w[3] = (uint16_t) (bmp_slab >> 48);
1832 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1833 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1834 grinder->pcache_w += (w[0] != 0);
1836 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1837 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1838 grinder->pcache_w += (w[1] != 0);
1840 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1841 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1842 grinder->pcache_w += (w[2] != 0);
1844 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1845 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1846 grinder->pcache_w += (w[3] != 0);
1850 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1852 struct rte_sched_grinder *grinder = port->grinder + pos;
1855 grinder->tccache_w = 0;
1856 grinder->tccache_r = 0;
1858 b[0] = (uint8_t) (qmask & 0xF);
1859 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1860 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1861 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1863 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1864 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1865 grinder->tccache_w += (b[0] != 0);
1867 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1868 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1869 grinder->tccache_w += (b[1] != 0);
1871 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1872 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1873 grinder->tccache_w += (b[2] != 0);
1875 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1876 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1877 grinder->tccache_w += (b[3] != 0);
1881 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1883 struct rte_sched_grinder *grinder = port->grinder + pos;
1884 struct rte_mbuf **qbase;
1888 if (grinder->tccache_r == grinder->tccache_w)
1891 qindex = grinder->tccache_qindex[grinder->tccache_r];
1892 qbase = rte_sched_port_qbase(port, qindex);
1893 qsize = rte_sched_port_qsize(port, qindex);
1895 grinder->tc_index = (qindex >> 2) & 0x3;
1896 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1897 grinder->qsize = qsize;
1899 grinder->qindex[0] = qindex;
1900 grinder->qindex[1] = qindex + 1;
1901 grinder->qindex[2] = qindex + 2;
1902 grinder->qindex[3] = qindex + 3;
1904 grinder->queue[0] = port->queue + qindex;
1905 grinder->queue[1] = port->queue + qindex + 1;
1906 grinder->queue[2] = port->queue + qindex + 2;
1907 grinder->queue[3] = port->queue + qindex + 3;
1909 grinder->qbase[0] = qbase;
1910 grinder->qbase[1] = qbase + qsize;
1911 grinder->qbase[2] = qbase + 2 * qsize;
1912 grinder->qbase[3] = qbase + 3 * qsize;
1914 grinder->tccache_r++;
1919 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1921 struct rte_sched_grinder *grinder = port->grinder + pos;
1922 uint32_t pipe_qindex;
1923 uint16_t pipe_qmask;
1925 if (grinder->pcache_r < grinder->pcache_w) {
1926 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1927 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1928 grinder->pcache_r++;
1930 uint64_t bmp_slab = 0;
1931 uint32_t bmp_pos = 0;
1933 /* Get another non-empty pipe group */
1934 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1937 #ifdef RTE_SCHED_DEBUG
1938 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1941 /* Return if pipe group already in one of the other grinders */
1942 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1943 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1946 port->grinder_base_bmp_pos[pos] = bmp_pos;
1948 /* Install new pipe group into grinder's pipe cache */
1949 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1951 pipe_qmask = grinder->pcache_qmask[0];
1952 pipe_qindex = grinder->pcache_qindex[0];
1953 grinder->pcache_r = 1;
1956 /* Install new pipe in the grinder */
1957 grinder->pindex = pipe_qindex >> 4;
1958 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1959 grinder->pipe = port->pipe + grinder->pindex;
1960 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1961 grinder->productive = 0;
1963 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1964 grinder_next_tc(port, pos);
1966 /* Check for pipe exhaustion */
1967 if (grinder->pindex == port->pipe_loop) {
1968 port->pipe_exhaustion = 1;
1969 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1977 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1979 struct rte_sched_grinder *grinder = port->grinder + pos;
1980 struct rte_sched_pipe *pipe = grinder->pipe;
1981 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1982 uint32_t tc_index = grinder->tc_index;
1983 uint32_t qmask = grinder->qmask;
1986 qindex = tc_index * 4;
1988 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1989 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1990 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1991 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1993 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1994 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1995 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1996 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1998 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1999 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
2000 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
2001 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
2005 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
2007 struct rte_sched_grinder *grinder = port->grinder + pos;
2008 struct rte_sched_pipe *pipe = grinder->pipe;
2009 uint32_t tc_index = grinder->tc_index;
2012 qindex = tc_index * 4;
2014 pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
2015 >> RTE_SCHED_WRR_SHIFT;
2016 pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
2017 >> RTE_SCHED_WRR_SHIFT;
2018 pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
2019 >> RTE_SCHED_WRR_SHIFT;
2020 pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
2021 >> RTE_SCHED_WRR_SHIFT;
2025 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
2027 struct rte_sched_grinder *grinder = port->grinder + pos;
2028 uint16_t wrr_tokens_min;
2030 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
2031 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
2032 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
2033 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
2035 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
2036 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
2038 grinder->wrr_tokens[0] -= wrr_tokens_min;
2039 grinder->wrr_tokens[1] -= wrr_tokens_min;
2040 grinder->wrr_tokens[2] -= wrr_tokens_min;
2041 grinder->wrr_tokens[3] -= wrr_tokens_min;
2045 #define grinder_evict(port, pos)
2048 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2050 struct rte_sched_grinder *grinder = port->grinder + pos;
2052 rte_prefetch0(grinder->pipe);
2053 rte_prefetch0(grinder->queue[0]);
2057 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2059 struct rte_sched_grinder *grinder = port->grinder + pos;
2060 uint16_t qsize, qr[4];
2062 qsize = grinder->qsize;
2063 qr[0] = grinder->queue[0]->qr & (qsize - 1);
2064 qr[1] = grinder->queue[1]->qr & (qsize - 1);
2065 qr[2] = grinder->queue[2]->qr & (qsize - 1);
2066 qr[3] = grinder->queue[3]->qr & (qsize - 1);
2068 rte_prefetch0(grinder->qbase[0] + qr[0]);
2069 rte_prefetch0(grinder->qbase[1] + qr[1]);
2071 grinder_wrr_load(port, pos);
2072 grinder_wrr(port, pos);
2074 rte_prefetch0(grinder->qbase[2] + qr[2]);
2075 rte_prefetch0(grinder->qbase[3] + qr[3]);
2079 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2081 struct rte_sched_grinder *grinder = port->grinder + pos;
2082 uint32_t qpos = grinder->qpos;
2083 struct rte_mbuf **qbase = grinder->qbase[qpos];
2084 uint16_t qsize = grinder->qsize;
2085 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2087 grinder->pkt = qbase[qr];
2088 rte_prefetch0(grinder->pkt);
2090 if (unlikely((qr & 0x7) == 7)) {
2091 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2093 rte_prefetch0(qbase + qr_next);
2097 static inline uint32_t
2098 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2100 struct rte_sched_grinder *grinder = port->grinder + pos;
2102 switch (grinder->state) {
2103 case e_GRINDER_PREFETCH_PIPE:
2105 if (grinder_next_pipe(port, pos)) {
2106 grinder_prefetch_pipe(port, pos);
2107 port->busy_grinders++;
2109 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2116 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2118 struct rte_sched_pipe *pipe = grinder->pipe;
2120 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2121 grinder_prefetch_tc_queue_arrays(port, pos);
2122 grinder_credits_update(port, pos);
2124 grinder->state = e_GRINDER_PREFETCH_MBUF;
2128 case e_GRINDER_PREFETCH_MBUF:
2130 grinder_prefetch_mbuf(port, pos);
2132 grinder->state = e_GRINDER_READ_MBUF;
2136 case e_GRINDER_READ_MBUF:
2138 uint32_t result = 0;
2140 result = grinder_schedule(port, pos);
2142 /* Look for next packet within the same TC */
2143 if (result && grinder->qmask) {
2144 grinder_wrr(port, pos);
2145 grinder_prefetch_mbuf(port, pos);
2149 grinder_wrr_store(port, pos);
2151 /* Look for another active TC within same pipe */
2152 if (grinder_next_tc(port, pos)) {
2153 grinder_prefetch_tc_queue_arrays(port, pos);
2155 grinder->state = e_GRINDER_PREFETCH_MBUF;
2159 if (grinder->productive == 0 &&
2160 port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2161 port->pipe_loop = grinder->pindex;
2163 grinder_evict(port, pos);
2165 /* Look for another active pipe */
2166 if (grinder_next_pipe(port, pos)) {
2167 grinder_prefetch_pipe(port, pos);
2169 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2173 /* No active pipe found */
2174 port->busy_grinders--;
2176 grinder->state = e_GRINDER_PREFETCH_PIPE;
2181 rte_panic("Algorithmic error (invalid state)\n");
2187 rte_sched_port_time_resync(struct rte_sched_port *port)
2189 uint64_t cycles = rte_get_tsc_cycles();
2190 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2191 uint64_t bytes_diff;
2193 /* Compute elapsed time in bytes */
2194 bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2195 port->inv_cycles_per_byte);
2197 /* Advance port time */
2198 port->time_cpu_cycles = cycles;
2199 port->time_cpu_bytes += bytes_diff;
2200 if (port->time < port->time_cpu_bytes)
2201 port->time = port->time_cpu_bytes;
2203 /* Reset pipe loop detection */
2204 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2208 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2212 /* Check if any exception flag is set */
2213 exceptions = (second_pass && port->busy_grinders == 0) ||
2214 (port->pipe_exhaustion == 1);
2216 /* Clear exception flags */
2217 port->pipe_exhaustion = 0;
2223 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2227 port->pkts_out = pkts;
2228 port->n_pkts_out = 0;
2230 rte_sched_port_time_resync(port);
2232 /* Take each queue in the grinder one step further */
2233 for (i = 0, count = 0; ; i++) {
2234 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2235 if ((count == n_pkts) ||
2236 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {