4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <rte_common.h>
39 #include <rte_memory.h>
40 #include <rte_malloc.h>
41 #include <rte_cycles.h>
42 #include <rte_prefetch.h>
43 #include <rte_branch_prediction.h>
46 #include "rte_sched.h"
47 #include "rte_bitmap.h"
48 #include "rte_sched_common.h"
49 #include "rte_approx.h"
51 #ifdef __INTEL_COMPILER
52 #pragma warning(disable:2259) /* conversion may lose significant bits */
55 #ifdef RTE_SCHED_VECTOR
56 #include <immintrin.h>
59 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
60 #define RTE_SCHED_WRR_SHIFT 3
61 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
62 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
63 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
65 struct rte_sched_subport {
66 /* Token bucket (TB) */
67 uint64_t tb_time; /* time of last update */
69 uint32_t tb_credits_per_period;
73 /* Traffic classes (TCs) */
74 uint64_t tc_time; /* time of next update */
75 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
76 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
79 /* TC oversubscription */
81 uint32_t tc_ov_wm_min;
82 uint32_t tc_ov_wm_max;
83 uint8_t tc_ov_period_id;
89 struct rte_sched_subport_stats stats;
92 struct rte_sched_pipe_profile {
93 /* Token bucket (TB) */
95 uint32_t tb_credits_per_period;
98 /* Pipe traffic classes */
100 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
101 uint8_t tc_ov_weight;
104 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
107 struct rte_sched_pipe {
108 /* Token bucket (TB) */
109 uint64_t tb_time; /* time of last update */
112 /* Pipe profile and flags */
115 /* Traffic classes (TCs) */
116 uint64_t tc_time; /* time of next update */
117 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
119 /* Weighted Round Robin (WRR) */
120 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
122 /* TC oversubscription */
123 uint32_t tc_ov_credits;
124 uint8_t tc_ov_period_id;
126 } __rte_cache_aligned;
128 struct rte_sched_queue {
133 struct rte_sched_queue_extra {
134 struct rte_sched_queue_stats stats;
141 e_GRINDER_PREFETCH_PIPE = 0,
142 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
143 e_GRINDER_PREFETCH_MBUF,
148 * Path through the scheduler hierarchy used by the scheduler enqueue
149 * operation to identify the destination queue for the current
150 * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
151 * each packet, typically written by the classification stage and read
152 * by scheduler enqueue.
154 struct rte_sched_port_hierarchy {
155 uint32_t queue:2; /**< Queue ID (0 .. 3) */
156 uint32_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/
157 uint32_t pipe:20; /**< Pipe ID */
158 uint32_t subport:6; /**< Subport ID */
159 uint32_t color:2; /**< Color */
162 struct rte_sched_grinder {
164 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
165 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
170 enum grinder_state state;
173 struct rte_sched_subport *subport;
174 struct rte_sched_pipe *pipe;
175 struct rte_sched_pipe_profile *pipe_params;
178 uint8_t tccache_qmask[4];
179 uint32_t tccache_qindex[4];
185 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
186 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
187 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
191 struct rte_mbuf *pkt;
194 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
195 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
196 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
199 struct rte_sched_port {
200 /* User parameters */
201 uint32_t n_subports_per_port;
202 uint32_t n_pipes_per_subport;
205 uint32_t frame_overhead;
206 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
207 uint32_t n_pipe_profiles;
208 uint32_t pipe_tc3_rate_max;
210 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
214 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
215 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
216 uint64_t time; /* Current NIC TX time measured in bytes */
217 double cycles_per_byte; /* CPU cycles per byte */
219 /* Scheduling loop detection */
221 uint32_t pipe_exhaustion;
224 struct rte_bitmap *bmp;
225 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
228 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
229 uint32_t busy_grinders;
230 struct rte_mbuf **pkts_out;
233 /* Queue base calculation */
234 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
237 /* Large data structures */
238 struct rte_sched_subport *subport;
239 struct rte_sched_pipe *pipe;
240 struct rte_sched_queue *queue;
241 struct rte_sched_queue_extra *queue_extra;
242 struct rte_sched_pipe_profile *pipe_profiles;
244 struct rte_mbuf **queue_array;
245 uint8_t memory[0] __rte_cache_aligned;
246 } __rte_cache_aligned;
248 enum rte_sched_port_array {
249 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
250 e_RTE_SCHED_PORT_ARRAY_PIPE,
251 e_RTE_SCHED_PORT_ARRAY_QUEUE,
252 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
253 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
254 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
255 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
256 e_RTE_SCHED_PORT_ARRAY_TOTAL,
259 #ifdef RTE_SCHED_COLLECT_STATS
261 static inline uint32_t
262 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
264 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
269 static inline uint32_t
270 rte_sched_port_queues_per_port(struct rte_sched_port *port)
272 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
276 rte_sched_port_check_params(struct rte_sched_port_params *params)
280 if (params == NULL) {
285 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) {
290 if (params->rate == 0) {
295 if (params->mtu == 0) {
299 /* n_subports_per_port: non-zero, power of 2 */
300 if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
304 /* n_pipes_per_subport: non-zero, power of 2 */
305 if ((params->n_pipes_per_subport == 0) || (!rte_is_power_of_2(params->n_pipes_per_subport))) {
309 /* qsize: non-zero, power of 2,
310 * no bigger than 32K (due to 16-bit read/write pointers) */
311 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
312 uint16_t qsize = params->qsize[i];
314 if ((qsize == 0) || (!rte_is_power_of_2(qsize))) {
319 /* pipe_profiles and n_pipe_profiles */
320 if ((params->pipe_profiles == NULL) ||
321 (params->n_pipe_profiles == 0) ||
322 (params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)) {
326 for (i = 0; i < params->n_pipe_profiles; i ++) {
327 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
329 /* TB rate: non-zero, not greater than port rate */
330 if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
334 /* TB size: non-zero */
335 if (p->tb_size == 0) {
339 /* TC rate: non-zero, less than pipe rate */
340 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
341 if ((p->tc_rate[j] == 0) || (p->tc_rate[j] > p->tb_rate)) {
346 /* TC period: non-zero */
347 if (p->tc_period == 0) {
351 #ifdef RTE_SCHED_SUBPORT_TC_OV
352 /* TC3 oversubscription weight: non-zero */
353 if (p->tc_ov_weight == 0) {
358 /* Queue WRR weights: non-zero */
359 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j ++) {
360 if (p->wrr_weights[j] == 0) {
370 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
372 uint32_t n_subports_per_port = params->n_subports_per_port;
373 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
374 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
375 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
377 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
378 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
379 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
380 uint32_t size_queue_extra = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
381 uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
382 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
383 uint32_t size_per_pipe_queue_array, size_queue_array;
387 size_per_pipe_queue_array = 0;
388 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
389 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
391 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
395 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) return base;
396 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
398 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
399 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
401 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
402 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
404 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
405 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
407 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
408 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
410 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) return base;
411 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
413 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) return base;
414 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
420 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
422 uint32_t size0, size1;
425 status = rte_sched_port_check_params(params);
427 RTE_LOG(NOTICE, SCHED,
428 "Port scheduler params check failed (%d)\n", status);
433 size0 = sizeof(struct rte_sched_port);
434 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
436 return (size0 + size1);
440 rte_sched_port_config_qsize(struct rte_sched_port *port)
443 port->qsize_add[0] = 0;
444 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
445 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
446 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
449 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
450 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
451 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
452 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
455 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
456 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
457 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
458 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
461 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
462 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
463 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
464 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
466 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
470 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
472 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
474 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
475 " Token bucket: period = %u, credits per period = %u, size = %u\n"
476 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
477 " Traffic class 3 oversubscription: weight = %hhu\n"
478 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
483 p->tb_credits_per_period,
486 /* Traffic classes */
488 p->tc_credits_per_period[0],
489 p->tc_credits_per_period[1],
490 p->tc_credits_per_period[2],
491 p->tc_credits_per_period[3],
493 /* Traffic class 3 oversubscription */
497 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
498 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
499 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
500 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
503 static inline uint64_t
504 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
506 uint64_t time = time_ms;
507 time = (time * rate) / 1000;
513 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
517 for (i = 0; i < port->n_pipe_profiles; i ++) {
518 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
519 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
522 if (src->tb_rate == params->rate) {
523 dst->tb_credits_per_period = 1;
526 double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
527 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
529 rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
531 dst->tb_size = src->tb_size;
533 /* Traffic Classes */
534 dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
535 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
536 dst->tc_credits_per_period[j] = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[j]);
538 #ifdef RTE_SCHED_SUBPORT_TC_OV
539 dst->tc_ov_weight = src->tc_ov_weight;
543 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
544 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
545 uint32_t lcd, lcd1, lcd2;
548 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
550 wrr_cost[0] = src->wrr_weights[qindex];
551 wrr_cost[1] = src->wrr_weights[qindex + 1];
552 wrr_cost[2] = src->wrr_weights[qindex + 2];
553 wrr_cost[3] = src->wrr_weights[qindex + 3];
555 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
556 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
557 lcd = rte_get_lcd(lcd1, lcd2);
559 wrr_cost[0] = lcd / wrr_cost[0];
560 wrr_cost[1] = lcd / wrr_cost[1];
561 wrr_cost[2] = lcd / wrr_cost[2];
562 wrr_cost[3] = lcd / wrr_cost[3];
564 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
565 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
566 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
567 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
570 rte_sched_port_log_pipe_profile(port, i);
573 port->pipe_tc3_rate_max = 0;
574 for (i = 0; i < port->n_pipe_profiles; i ++) {
575 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
576 uint32_t pipe_tc3_rate = src->tc_rate[3];
578 if (port->pipe_tc3_rate_max < pipe_tc3_rate) {
579 port->pipe_tc3_rate_max = pipe_tc3_rate;
584 struct rte_sched_port *
585 rte_sched_port_config(struct rte_sched_port_params *params)
587 struct rte_sched_port *port = NULL;
588 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
590 /* Check user parameters. Determine the amount of memory to allocate */
591 mem_size = rte_sched_port_get_memory_footprint(params);
596 /* Allocate memory to store the data structures */
597 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
602 /* compile time checks */
603 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
604 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
606 /* User parameters */
607 port->n_subports_per_port = params->n_subports_per_port;
608 port->n_pipes_per_subport = params->n_pipes_per_subport;
609 port->rate = params->rate;
610 port->mtu = params->mtu + params->frame_overhead;
611 port->frame_overhead = params->frame_overhead;
612 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
613 port->n_pipe_profiles = params->n_pipe_profiles;
616 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
619 for (j = 0; j < e_RTE_METER_COLORS; j++) {
620 /* if min/max are both zero, then RED is disabled */
621 if ((params->red_params[i][j].min_th |
622 params->red_params[i][j].max_th) == 0) {
626 if (rte_red_config_init(&port->red_config[i][j],
627 params->red_params[i][j].wq_log2,
628 params->red_params[i][j].min_th,
629 params->red_params[i][j].max_th,
630 params->red_params[i][j].maxp_inv) != 0) {
638 port->time_cpu_cycles = rte_get_tsc_cycles();
639 port->time_cpu_bytes = 0;
641 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
643 /* Scheduling loop detection */
644 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
645 port->pipe_exhaustion = 0;
648 port->busy_grinders = 0;
649 port->pkts_out = NULL;
650 port->n_pkts_out = 0;
652 /* Queue base calculation */
653 rte_sched_port_config_qsize(port);
655 /* Large data structures */
656 port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
657 port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
658 port->queue = (struct rte_sched_queue *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE));
659 port->queue_extra = (struct rte_sched_queue_extra *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
660 port->pipe_profiles = (struct rte_sched_pipe_profile *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
661 port->bmp_array = port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
662 port->queue_array = (struct rte_mbuf **) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
664 /* Pipe profile table */
665 rte_sched_port_config_pipe_profile_table(port, params);
668 n_queues_per_port = rte_sched_port_queues_per_port(port);
669 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
670 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, bmp_mem_size);
671 if (port->bmp == NULL) {
672 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
675 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
676 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
683 rte_sched_port_free(struct rte_sched_port *port)
685 /* Check user parameters */
690 rte_bitmap_free(port->bmp);
695 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
697 struct rte_sched_subport *s = port->subport + i;
699 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
700 " Token bucket: period = %u, credits per period = %u, size = %u\n"
701 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
702 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
707 s->tb_credits_per_period,
710 /* Traffic classes */
712 s->tc_credits_per_period[0],
713 s->tc_credits_per_period[1],
714 s->tc_credits_per_period[2],
715 s->tc_credits_per_period[3],
717 /* Traffic class 3 oversubscription */
723 rte_sched_subport_config(struct rte_sched_port *port,
725 struct rte_sched_subport_params *params)
727 struct rte_sched_subport *s;
730 /* Check user parameters */
731 if ((port == NULL) ||
732 (subport_id >= port->n_subports_per_port) ||
737 if ((params->tb_rate == 0) || (params->tb_rate > port->rate)) {
741 if (params->tb_size == 0) {
745 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
746 if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
751 if (params->tc_period == 0) {
755 s = port->subport + subport_id;
757 /* Token Bucket (TB) */
758 if (params->tb_rate == port->rate) {
759 s->tb_credits_per_period = 1;
762 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
763 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
765 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
767 s->tb_size = params->tb_size;
768 s->tb_time = port->time;
769 s->tb_credits = s->tb_size / 2;
771 /* Traffic Classes (TCs) */
772 s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
773 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
774 s->tc_credits_per_period[i] = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, params->tc_rate[i]);
776 s->tc_time = port->time + s->tc_period;
777 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
778 s->tc_credits[i] = s->tc_credits_per_period[i];
781 #ifdef RTE_SCHED_SUBPORT_TC_OV
782 /* TC oversubscription */
783 s->tc_ov_wm_min = port->mtu;
784 s->tc_ov_wm_max = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->pipe_tc3_rate_max);
785 s->tc_ov_wm = s->tc_ov_wm_max;
786 s->tc_ov_period_id = 0;
792 rte_sched_port_log_subport_config(port, subport_id);
798 rte_sched_pipe_config(struct rte_sched_port *port,
801 int32_t pipe_profile)
803 struct rte_sched_subport *s;
804 struct rte_sched_pipe *p;
805 struct rte_sched_pipe_profile *params;
806 uint32_t deactivate, profile, i;
808 /* Check user parameters */
809 profile = (uint32_t) pipe_profile;
810 deactivate = (pipe_profile < 0);
811 if ((port == NULL) ||
812 (subport_id >= port->n_subports_per_port) ||
813 (pipe_id >= port->n_pipes_per_subport) ||
814 ((!deactivate) && (profile >= port->n_pipe_profiles))) {
818 /* Check that subport configuration is valid */
819 s = port->subport + subport_id;
820 if (s->tb_period == 0) {
824 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
826 /* Handle the case when pipe already has a valid configuration */
828 params = port->pipe_profiles + p->profile;
830 #ifdef RTE_SCHED_SUBPORT_TC_OV
831 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
832 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
833 uint32_t tc3_ov = s->tc_ov;
835 /* Unplug pipe from its subport */
836 s->tc_ov_n -= params->tc_ov_weight;
837 s->tc_ov_rate -= pipe_tc3_rate;
838 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
840 if (s->tc_ov != tc3_ov) {
841 RTE_LOG(DEBUG, SCHED,
842 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
843 subport_id, subport_tc3_rate, s->tc_ov_rate);
848 memset(p, 0, sizeof(struct rte_sched_pipe));
855 /* Apply the new pipe configuration */
856 p->profile = profile;
857 params = port->pipe_profiles + p->profile;
859 /* Token Bucket (TB) */
860 p->tb_time = port->time;
861 p->tb_credits = params->tb_size / 2;
863 /* Traffic Classes (TCs) */
864 p->tc_time = port->time + params->tc_period;
865 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
866 p->tc_credits[i] = params->tc_credits_per_period[i];
869 #ifdef RTE_SCHED_SUBPORT_TC_OV
871 /* Subport TC3 oversubscription */
872 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
873 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
874 uint32_t tc3_ov = s->tc_ov;
876 s->tc_ov_n += params->tc_ov_weight;
877 s->tc_ov_rate += pipe_tc3_rate;
878 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
880 if (s->tc_ov != tc3_ov) {
881 RTE_LOG(DEBUG, SCHED,
882 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
883 subport_id, subport_tc3_rate, s->tc_ov_rate);
885 p->tc_ov_period_id = s->tc_ov_period_id;
886 p->tc_ov_credits = s->tc_ov_wm;
894 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
895 uint32_t subport, uint32_t pipe, uint32_t traffic_class,
896 uint32_t queue, enum rte_meter_color color)
898 struct rte_sched_port_hierarchy *sched
899 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
901 sched->color = (uint32_t) color;
902 sched->subport = subport;
904 sched->traffic_class = traffic_class;
905 sched->queue = queue;
909 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
910 uint32_t *subport, uint32_t *pipe,
911 uint32_t *traffic_class, uint32_t *queue)
913 const struct rte_sched_port_hierarchy *sched
914 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
916 *subport = sched->subport;
918 *traffic_class = sched->traffic_class;
919 *queue = sched->queue;
924 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
926 const struct rte_sched_port_hierarchy *sched
927 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
929 return (enum rte_meter_color) sched->color;
933 rte_sched_subport_read_stats(struct rte_sched_port *port,
935 struct rte_sched_subport_stats *stats,
938 struct rte_sched_subport *s;
940 /* Check user parameters */
941 if ((port == NULL) ||
942 (subport_id >= port->n_subports_per_port) ||
947 s = port->subport + subport_id;
949 /* Copy subport stats and clear */
950 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
951 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
953 /* Subport TC ovesubscription status */
960 rte_sched_queue_read_stats(struct rte_sched_port *port,
962 struct rte_sched_queue_stats *stats,
965 struct rte_sched_queue *q;
966 struct rte_sched_queue_extra *qe;
968 /* Check user parameters */
969 if ((port == NULL) ||
970 (queue_id >= rte_sched_port_queues_per_port(port)) ||
975 q = port->queue + queue_id;
976 qe = port->queue_extra + queue_id;
978 /* Copy queue stats and clear */
979 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
980 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
983 *qlen = q->qw - q->qr;
988 static inline uint32_t
989 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
993 result = subport * port->n_pipes_per_subport + pipe;
994 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
995 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1000 static inline struct rte_mbuf **
1001 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
1003 uint32_t pindex = qindex >> 4;
1004 uint32_t qpos = qindex & 0xF;
1006 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
1009 static inline uint16_t
1010 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
1012 uint32_t tc = (qindex >> 2) & 0x3;
1014 return port->qsize[tc];
1017 #ifdef RTE_SCHED_DEBUG
1020 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1022 struct rte_sched_queue *queue = port->queue + qindex;
1024 return (queue->qr == queue->qw);
1028 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1030 struct rte_sched_queue *queue = port->queue + qindex;
1031 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1032 uint16_t qlen = queue->qw - queue->qr;
1034 return (qlen >= qsize);
1037 #endif /* RTE_SCHED_DEBUG */
1039 #ifdef RTE_SCHED_COLLECT_STATS
1042 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1044 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1045 uint32_t tc_index = (qindex >> 2) & 0x3;
1046 uint32_t pkt_len = pkt->pkt_len;
1048 s->stats.n_pkts_tc[tc_index] += 1;
1049 s->stats.n_bytes_tc[tc_index] += pkt_len;
1053 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1055 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1056 uint32_t tc_index = (qindex >> 2) & 0x3;
1057 uint32_t pkt_len = pkt->pkt_len;
1059 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1060 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1064 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1066 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1067 uint32_t pkt_len = pkt->pkt_len;
1069 qe->stats.n_pkts += 1;
1070 qe->stats.n_bytes += pkt_len;
1074 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1076 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1077 uint32_t pkt_len = pkt->pkt_len;
1079 qe->stats.n_pkts_dropped += 1;
1080 qe->stats.n_bytes_dropped += pkt_len;
1083 #endif /* RTE_SCHED_COLLECT_STATS */
1085 #ifdef RTE_SCHED_RED
1088 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1090 struct rte_sched_queue_extra *qe;
1091 struct rte_red_config *red_cfg;
1092 struct rte_red *red;
1094 enum rte_meter_color color;
1096 tc_index = (qindex >> 2) & 0x3;
1097 color = rte_sched_port_pkt_read_color(pkt);
1098 red_cfg = &port->red_config[tc_index][color];
1100 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1103 qe = port->queue_extra + qindex;
1106 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1110 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1112 struct rte_sched_queue_extra *qe;
1113 struct rte_red *red;
1115 qe = port->queue_extra + qindex;
1118 rte_red_mark_queue_empty(red, port->time);
1123 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1125 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1127 #endif /* RTE_SCHED_RED */
1129 #ifdef RTE_SCHED_DEBUG
1132 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1136 qindex = pindex << 4;
1138 for (i = 0; i < 16; i ++){
1139 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1140 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1142 if (queue_empty != bmp_bit_clear){
1143 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1155 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, uint64_t bmp_slab)
1161 rte_panic("Empty slab at position %u\n", bmp_pos);
1165 for (i = 0, mask = 1; i < 64; i ++, mask <<= 1) {
1166 if (mask & bmp_slab){
1167 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1168 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1175 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1180 #endif /* RTE_SCHED_DEBUG */
1182 static inline uint32_t
1183 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, struct rte_mbuf *pkt)
1185 struct rte_sched_queue *q;
1186 #ifdef RTE_SCHED_COLLECT_STATS
1187 struct rte_sched_queue_extra *qe;
1189 uint32_t subport, pipe, traffic_class, queue, qindex;
1191 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1193 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1194 q = port->queue + qindex;
1196 #ifdef RTE_SCHED_COLLECT_STATS
1197 qe = port->queue_extra + qindex;
1205 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
1207 struct rte_sched_queue *q;
1208 struct rte_mbuf **q_qw;
1211 q = port->queue + qindex;
1212 qsize = rte_sched_port_qsize(port, qindex);
1213 q_qw = qbase + (q->qw & (qsize - 1));
1215 rte_prefetch0(q_qw);
1216 rte_bitmap_prefetch0(port->bmp, qindex);
1220 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1222 struct rte_sched_queue *q;
1226 q = port->queue + qindex;
1227 qsize = rte_sched_port_qsize(port, qindex);
1228 qlen = q->qw - q->qr;
1230 /* Drop the packet (and update drop stats) when queue is full */
1231 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || (qlen >= qsize))) {
1232 rte_pktmbuf_free(pkt);
1233 #ifdef RTE_SCHED_COLLECT_STATS
1234 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1235 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1240 /* Enqueue packet */
1241 qbase[q->qw & (qsize - 1)] = pkt;
1244 /* Activate queue in the port bitmap */
1245 rte_bitmap_set(port->bmp, qindex);
1248 #ifdef RTE_SCHED_COLLECT_STATS
1249 rte_sched_port_update_subport_stats(port, qindex, pkt);
1250 rte_sched_port_update_queue_stats(port, qindex, pkt);
1258 * The enqueue function implements a 4-level pipeline with each stage processing
1259 * two different packets. The purpose of using a pipeline is to hide the latency
1260 * of prefetching the data structures. The naming convention is presented in the
1263 * p00 _______ p10 _______ p20 _______ p30 _______
1264 * ----->| |----->| |----->| |----->| |----->
1265 * | 0 | | 1 | | 2 | | 3 |
1266 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1271 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1273 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, *pkt30, *pkt31, *pkt_last;
1274 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1275 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1276 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1281 /* Less then 6 input packets available, which is not enough to feed the pipeline */
1282 if (unlikely(n_pkts < 6)) {
1283 struct rte_mbuf **q_base[5];
1286 /* Prefetch the mbuf structure of each packet */
1287 for (i = 0; i < n_pkts; i ++) {
1288 rte_prefetch0(pkts[i]);
1291 /* Prefetch the queue structure for each queue */
1292 for (i = 0; i < n_pkts; i ++) {
1293 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
1296 /* Prefetch the write pointer location of each queue */
1297 for (i = 0; i < n_pkts; i ++) {
1298 q_base[i] = rte_sched_port_qbase(port, q[i]);
1299 rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
1302 /* Write each packet to its queue */
1303 for (i = 0; i < n_pkts; i ++) {
1304 result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
1310 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1313 rte_prefetch0(pkt20);
1314 rte_prefetch0(pkt21);
1318 rte_prefetch0(pkt10);
1319 rte_prefetch0(pkt11);
1321 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1322 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1326 rte_prefetch0(pkt00);
1327 rte_prefetch0(pkt01);
1329 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1330 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1332 q20_base = rte_sched_port_qbase(port, q20);
1333 q21_base = rte_sched_port_qbase(port, q21);
1334 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1335 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1337 /* Run the pipeline */
1338 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1339 /* Propagate stage inputs */
1350 q30_base = q20_base;
1351 q31_base = q21_base;
1353 /* Stage 0: Get packets in */
1355 pkt01 = pkts[i + 1];
1356 rte_prefetch0(pkt00);
1357 rte_prefetch0(pkt01);
1359 /* Stage 1: Prefetch queue structure storing queue pointers */
1360 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1361 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1363 /* Stage 2: Prefetch queue write location */
1364 q20_base = rte_sched_port_qbase(port, q20);
1365 q21_base = rte_sched_port_qbase(port, q21);
1366 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1367 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1369 /* Stage 3: Write packet to queue and activate queue */
1370 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1371 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1372 result += r30 + r31;
1375 /* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
1376 of an odd number of input packets. */
1377 pkt_last = pkts[n_pkts - 1];
1378 rte_prefetch0(pkt_last);
1380 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1381 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1383 q10_base = rte_sched_port_qbase(port, q10);
1384 q11_base = rte_sched_port_qbase(port, q11);
1385 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1386 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1388 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1389 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1390 result += r20 + r21;
1392 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1394 q00_base = rte_sched_port_qbase(port, q00);
1395 q01_base = rte_sched_port_qbase(port, q01);
1396 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1397 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1399 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1400 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1401 result += r10 + r11;
1403 q_last_base = rte_sched_port_qbase(port, q_last);
1404 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1406 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1407 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1408 result += r00 + r01;
1411 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1418 #ifndef RTE_SCHED_SUBPORT_TC_OV
1421 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1423 struct rte_sched_grinder *grinder = port->grinder + pos;
1424 struct rte_sched_subport *subport = grinder->subport;
1425 struct rte_sched_pipe *pipe = grinder->pipe;
1426 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1430 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1431 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1432 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1433 subport->tb_time += n_periods * subport->tb_period;
1436 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1437 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1438 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1439 pipe->tb_time += n_periods * params->tb_period;
1442 if (unlikely(port->time >= subport->tc_time)) {
1443 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1444 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1445 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1446 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1447 subport->tc_time = port->time + subport->tc_period;
1451 if (unlikely(port->time >= pipe->tc_time)) {
1452 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1453 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1454 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1455 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1456 pipe->tc_time = port->time + params->tc_period;
1462 static inline uint32_t
1463 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1465 struct rte_sched_grinder *grinder = port->grinder + pos;
1466 struct rte_sched_subport *subport = grinder->subport;
1467 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1468 uint32_t tc_ov_consumption_max;
1469 uint32_t tc_ov_wm = subport->tc_ov_wm;
1471 if (subport->tc_ov == 0) {
1472 return subport->tc_ov_wm_max;
1475 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1476 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1477 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1478 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1480 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1481 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1483 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1484 tc_ov_wm -= tc_ov_wm >> 7;
1485 if (tc_ov_wm < subport->tc_ov_wm_min) {
1486 tc_ov_wm = subport->tc_ov_wm_min;
1491 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1492 if (tc_ov_wm > subport->tc_ov_wm_max) {
1493 tc_ov_wm = subport->tc_ov_wm_max;
1499 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1501 struct rte_sched_grinder *grinder = port->grinder + pos;
1502 struct rte_sched_subport *subport = grinder->subport;
1503 struct rte_sched_pipe *pipe = grinder->pipe;
1504 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1508 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1509 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1510 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1511 subport->tb_time += n_periods * subport->tb_period;
1514 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1515 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1516 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1517 pipe->tb_time += n_periods * params->tb_period;
1520 if (unlikely(port->time >= subport->tc_time)) {
1521 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1523 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1524 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1525 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1526 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1528 subport->tc_time = port->time + subport->tc_period;
1529 subport->tc_ov_period_id ++;
1533 if (unlikely(port->time >= pipe->tc_time)) {
1534 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1535 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1536 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1537 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1538 pipe->tc_time = port->time + params->tc_period;
1541 /* Pipe TCs - Oversubscription */
1542 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1543 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1545 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1549 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1552 #ifndef RTE_SCHED_SUBPORT_TC_OV
1555 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1557 struct rte_sched_grinder *grinder = port->grinder + pos;
1558 struct rte_sched_subport *subport = grinder->subport;
1559 struct rte_sched_pipe *pipe = grinder->pipe;
1560 struct rte_mbuf *pkt = grinder->pkt;
1561 uint32_t tc_index = grinder->tc_index;
1562 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1563 uint32_t subport_tb_credits = subport->tb_credits;
1564 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1565 uint32_t pipe_tb_credits = pipe->tb_credits;
1566 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1569 /* Check queue credits */
1570 enough_credits = (pkt_len <= subport_tb_credits) &&
1571 (pkt_len <= subport_tc_credits) &&
1572 (pkt_len <= pipe_tb_credits) &&
1573 (pkt_len <= pipe_tc_credits);
1575 if (!enough_credits) {
1579 /* Update port credits */
1580 subport->tb_credits -= pkt_len;
1581 subport->tc_credits[tc_index] -= pkt_len;
1582 pipe->tb_credits -= pkt_len;
1583 pipe->tc_credits[tc_index] -= pkt_len;
1591 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1593 struct rte_sched_grinder *grinder = port->grinder + pos;
1594 struct rte_sched_subport *subport = grinder->subport;
1595 struct rte_sched_pipe *pipe = grinder->pipe;
1596 struct rte_mbuf *pkt = grinder->pkt;
1597 uint32_t tc_index = grinder->tc_index;
1598 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1599 uint32_t subport_tb_credits = subport->tb_credits;
1600 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1601 uint32_t pipe_tb_credits = pipe->tb_credits;
1602 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1603 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1604 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1605 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1608 /* Check pipe and subport credits */
1609 enough_credits = (pkt_len <= subport_tb_credits) &&
1610 (pkt_len <= subport_tc_credits) &&
1611 (pkt_len <= pipe_tb_credits) &&
1612 (pkt_len <= pipe_tc_credits) &&
1613 (pkt_len <= pipe_tc_ov_credits);
1615 if (!enough_credits) {
1619 /* Update pipe and subport credits */
1620 subport->tb_credits -= pkt_len;
1621 subport->tc_credits[tc_index] -= pkt_len;
1622 pipe->tb_credits -= pkt_len;
1623 pipe->tc_credits[tc_index] -= pkt_len;
1624 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1629 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1633 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1635 struct rte_sched_grinder *grinder = port->grinder + pos;
1636 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1637 struct rte_mbuf *pkt = grinder->pkt;
1638 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1640 if (!grinder_credits_check(port, pos)) {
1644 /* Advance port time */
1645 port->time += pkt_len;
1648 port->pkts_out[port->n_pkts_out ++] = pkt;
1650 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1651 if (queue->qr == queue->qw) {
1652 uint32_t qindex = grinder->qindex[grinder->qpos];
1654 rte_bitmap_clear(port->bmp, qindex);
1655 grinder->qmask &= ~(1 << grinder->qpos);
1656 grinder->wrr_mask[grinder->qpos] = 0;
1657 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1660 /* Reset pipe loop detection */
1661 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1662 grinder->productive = 1;
1667 #ifdef RTE_SCHED_VECTOR
1670 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1672 __m128i index = _mm_set1_epi32 (base_pipe);
1673 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1674 __m128i res = _mm_cmpeq_epi32(pipes, index);
1675 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1676 pipes = _mm_cmpeq_epi32(pipes, index);
1677 res = _mm_or_si128(res, pipes);
1679 if (_mm_testz_si128(res, res))
1688 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1692 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
1693 if (port->grinder_base_bmp_pos[i] == base_pipe) {
1701 #endif /* RTE_SCHED_OPTIMIZATIONS */
1704 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1706 struct rte_sched_grinder *grinder = port->grinder + pos;
1709 grinder->pcache_w = 0;
1710 grinder->pcache_r = 0;
1712 w[0] = (uint16_t) bmp_slab;
1713 w[1] = (uint16_t) (bmp_slab >> 16);
1714 w[2] = (uint16_t) (bmp_slab >> 32);
1715 w[3] = (uint16_t) (bmp_slab >> 48);
1717 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1718 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1719 grinder->pcache_w += (w[0] != 0);
1721 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1722 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1723 grinder->pcache_w += (w[1] != 0);
1725 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1726 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1727 grinder->pcache_w += (w[2] != 0);
1729 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1730 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1731 grinder->pcache_w += (w[3] != 0);
1735 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1737 struct rte_sched_grinder *grinder = port->grinder + pos;
1740 grinder->tccache_w = 0;
1741 grinder->tccache_r = 0;
1743 b[0] = (uint8_t) (qmask & 0xF);
1744 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1745 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1746 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1748 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1749 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1750 grinder->tccache_w += (b[0] != 0);
1752 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1753 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1754 grinder->tccache_w += (b[1] != 0);
1756 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1757 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1758 grinder->tccache_w += (b[2] != 0);
1760 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1761 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1762 grinder->tccache_w += (b[3] != 0);
1766 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1768 struct rte_sched_grinder *grinder = port->grinder + pos;
1769 struct rte_mbuf **qbase;
1773 if (grinder->tccache_r == grinder->tccache_w) {
1777 qindex = grinder->tccache_qindex[grinder->tccache_r];
1778 qbase = rte_sched_port_qbase(port, qindex);
1779 qsize = rte_sched_port_qsize(port, qindex);
1781 grinder->tc_index = (qindex >> 2) & 0x3;
1782 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1783 grinder->qsize = qsize;
1785 grinder->qindex[0] = qindex;
1786 grinder->qindex[1] = qindex + 1;
1787 grinder->qindex[2] = qindex + 2;
1788 grinder->qindex[3] = qindex + 3;
1790 grinder->queue[0] = port->queue + qindex;
1791 grinder->queue[1] = port->queue + qindex + 1;
1792 grinder->queue[2] = port->queue + qindex + 2;
1793 grinder->queue[3] = port->queue + qindex + 3;
1795 grinder->qbase[0] = qbase;
1796 grinder->qbase[1] = qbase + qsize;
1797 grinder->qbase[2] = qbase + 2 * qsize;
1798 grinder->qbase[3] = qbase + 3 * qsize;
1800 grinder->tccache_r ++;
1805 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1807 struct rte_sched_grinder *grinder = port->grinder + pos;
1808 uint32_t pipe_qindex;
1809 uint16_t pipe_qmask;
1811 if (grinder->pcache_r < grinder->pcache_w) {
1812 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1813 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1814 grinder->pcache_r ++;
1816 uint64_t bmp_slab = 0;
1817 uint32_t bmp_pos = 0;
1819 /* Get another non-empty pipe group */
1820 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) {
1824 #ifdef RTE_SCHED_DEBUG
1825 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1828 /* Return if pipe group already in one of the other grinders */
1829 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1830 if (unlikely(grinder_pipe_exists(port, bmp_pos))) {
1833 port->grinder_base_bmp_pos[pos] = bmp_pos;
1835 /* Install new pipe group into grinder's pipe cache */
1836 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1838 pipe_qmask = grinder->pcache_qmask[0];
1839 pipe_qindex = grinder->pcache_qindex[0];
1840 grinder->pcache_r = 1;
1843 /* Install new pipe in the grinder */
1844 grinder->pindex = pipe_qindex >> 4;
1845 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1846 grinder->pipe = port->pipe + grinder->pindex;
1847 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1848 grinder->productive = 0;
1850 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1851 grinder_next_tc(port, pos);
1853 /* Check for pipe exhaustion */
1854 if (grinder->pindex == port->pipe_loop) {
1855 port->pipe_exhaustion = 1;
1856 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1864 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1866 struct rte_sched_grinder *grinder = port->grinder + pos;
1867 struct rte_sched_pipe *pipe = grinder->pipe;
1868 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1869 uint32_t tc_index = grinder->tc_index;
1870 uint32_t qmask = grinder->qmask;
1873 qindex = tc_index * 4;
1875 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1876 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1877 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1878 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1880 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1881 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1882 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1883 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1885 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1886 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1887 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1888 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1892 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1894 struct rte_sched_grinder *grinder = port->grinder + pos;
1895 struct rte_sched_pipe *pipe = grinder->pipe;
1896 uint32_t tc_index = grinder->tc_index;
1899 qindex = tc_index * 4;
1901 pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
1902 pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
1903 pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
1904 pipe->wrr_tokens[qindex + 3] = (uint8_t) ((grinder->wrr_tokens[3] & grinder->wrr_mask[3]) >> RTE_SCHED_WRR_SHIFT);
1908 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1910 struct rte_sched_grinder *grinder = port->grinder + pos;
1911 uint16_t wrr_tokens_min;
1913 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1914 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1915 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1916 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1918 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1919 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1921 grinder->wrr_tokens[0] -= wrr_tokens_min;
1922 grinder->wrr_tokens[1] -= wrr_tokens_min;
1923 grinder->wrr_tokens[2] -= wrr_tokens_min;
1924 grinder->wrr_tokens[3] -= wrr_tokens_min;
1928 #define grinder_evict(port, pos)
1931 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1933 struct rte_sched_grinder *grinder = port->grinder + pos;
1935 rte_prefetch0(grinder->pipe);
1936 rte_prefetch0(grinder->queue[0]);
1940 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1942 struct rte_sched_grinder *grinder = port->grinder + pos;
1943 uint16_t qsize, qr[4];
1945 qsize = grinder->qsize;
1946 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1947 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1948 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1949 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1951 rte_prefetch0(grinder->qbase[0] + qr[0]);
1952 rte_prefetch0(grinder->qbase[1] + qr[1]);
1954 grinder_wrr_load(port, pos);
1955 grinder_wrr(port, pos);
1957 rte_prefetch0(grinder->qbase[2] + qr[2]);
1958 rte_prefetch0(grinder->qbase[3] + qr[3]);
1962 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1964 struct rte_sched_grinder *grinder = port->grinder + pos;
1965 uint32_t qpos = grinder->qpos;
1966 struct rte_mbuf **qbase = grinder->qbase[qpos];
1967 uint16_t qsize = grinder->qsize;
1968 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1970 grinder->pkt = qbase[qr];
1971 rte_prefetch0(grinder->pkt);
1973 if (unlikely((qr & 0x7) == 7)) {
1974 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1976 rte_prefetch0(qbase + qr_next);
1980 static inline uint32_t
1981 grinder_handle(struct rte_sched_port *port, uint32_t pos)
1983 struct rte_sched_grinder *grinder = port->grinder + pos;
1985 switch (grinder->state) {
1986 case e_GRINDER_PREFETCH_PIPE:
1988 if (grinder_next_pipe(port, pos)) {
1989 grinder_prefetch_pipe(port, pos);
1990 port->busy_grinders ++;
1992 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
1999 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2001 struct rte_sched_pipe *pipe = grinder->pipe;
2003 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2004 grinder_prefetch_tc_queue_arrays(port, pos);
2005 grinder_credits_update(port, pos);
2007 grinder->state = e_GRINDER_PREFETCH_MBUF;
2011 case e_GRINDER_PREFETCH_MBUF:
2013 grinder_prefetch_mbuf(port, pos);
2015 grinder->state = e_GRINDER_READ_MBUF;
2019 case e_GRINDER_READ_MBUF:
2021 uint32_t result = 0;
2023 result = grinder_schedule(port, pos);
2025 /* Look for next packet within the same TC */
2026 if (result && grinder->qmask) {
2027 grinder_wrr(port, pos);
2028 grinder_prefetch_mbuf(port, pos);
2032 grinder_wrr_store(port, pos);
2034 /* Look for another active TC within same pipe */
2035 if (grinder_next_tc(port, pos)) {
2036 grinder_prefetch_tc_queue_arrays(port, pos);
2038 grinder->state = e_GRINDER_PREFETCH_MBUF;
2041 if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
2042 port->pipe_loop = grinder->pindex;
2044 grinder_evict(port, pos);
2046 /* Look for another active pipe */
2047 if (grinder_next_pipe(port, pos)) {
2048 grinder_prefetch_pipe(port, pos);
2050 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2054 /* No active pipe found */
2055 port->busy_grinders --;
2057 grinder->state = e_GRINDER_PREFETCH_PIPE;
2062 rte_panic("Algorithmic error (invalid state)\n");
2068 rte_sched_port_time_resync(struct rte_sched_port *port)
2070 uint64_t cycles = rte_get_tsc_cycles();
2071 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2072 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2074 /* Advance port time */
2075 port->time_cpu_cycles = cycles;
2076 port->time_cpu_bytes += (uint64_t) bytes_diff;
2077 if (port->time < port->time_cpu_bytes) {
2078 port->time = port->time_cpu_bytes;
2081 /* Reset pipe loop detection */
2082 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2086 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2090 /* Check if any exception flag is set */
2091 exceptions = (second_pass && port->busy_grinders == 0) ||
2092 (port->pipe_exhaustion == 1);
2094 /* Clear exception flags */
2095 port->pipe_exhaustion = 0;
2101 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2105 port->pkts_out = pkts;
2106 port->n_pkts_out = 0;
2108 rte_sched_port_time_resync(port);
2110 /* Take each queue in the grinder one step further */
2111 for (i = 0, count = 0; ; i ++) {
2112 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2113 if ((count == n_pkts) ||
2114 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {