lib/librte_sched/rte_sched.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <string.h>
  36
  37 #include <rte_common.h>
  38 #include <rte_log.h>
  39 #include <rte_memory.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42 #include <rte_prefetch.h>
  43 #include <rte_branch_prediction.h>
  44 #include <rte_mbuf.h>
  45
  46 #include "rte_sched.h"
  47 #include "rte_bitmap.h"
  48 #include "rte_sched_common.h"
  49 #include "rte_approx.h"
  50
  51 #ifdef __INTEL_COMPILER
  52 #pragma warning(disable:2259) /* conversion may lose significant bits */
  53 #endif
  54
  55 #ifdef RTE_SCHED_VECTOR
  56 #include <immintrin.h>
  57 #endif
  58
  59 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  60 #define RTE_SCHED_WRR_SHIFT                   3
  61 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  62 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  63 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  64
  65 struct rte_sched_subport {
  66         /* Token bucket (TB) */
  67         uint64_t tb_time; /* time of last update */
  68         uint32_t tb_period;
  69         uint32_t tb_credits_per_period;
  70         uint32_t tb_size;
  71         uint32_t tb_credits;
  72
  73         /* Traffic classes (TCs) */
  74         uint64_t tc_time; /* time of next update */
  75         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  76         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  77         uint32_t tc_period;
  78
  79         /* TC oversubscription */
  80         uint32_t tc_ov_wm;
  81         uint32_t tc_ov_wm_min;
  82         uint32_t tc_ov_wm_max;
  83         uint8_t tc_ov_period_id;
  84         uint8_t tc_ov;
  85         uint32_t tc_ov_n;
  86         double tc_ov_rate;
  87
  88         /* Statistics */
  89         struct rte_sched_subport_stats stats;
  90 };
  91
  92 struct rte_sched_pipe_profile {
  93         /* Token bucket (TB) */
  94         uint32_t tb_period;
  95         uint32_t tb_credits_per_period;
  96         uint32_t tb_size;
  97
  98         /* Pipe traffic classes */
  99         uint32_t tc_period;
 100         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 101         uint8_t tc_ov_weight;
 102
 103         /* Pipe queues */
 104         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
 105 };
 106
 107 struct rte_sched_pipe {
 108         /* Token bucket (TB) */
 109         uint64_t tb_time; /* time of last update */
 110         uint32_t tb_credits;
 111
 112         /* Pipe profile and flags */
 113         uint32_t profile;
 114
 115         /* Traffic classes (TCs) */
 116         uint64_t tc_time; /* time of next update */
 117         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 118
 119         /* Weighted Round Robin (WRR) */
 120         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 121
 122         /* TC oversubscription */
 123         uint32_t tc_ov_credits;
 124         uint8_t tc_ov_period_id;
 125         uint8_t reserved[3];
 126 } __rte_cache_aligned;
 127
 128 struct rte_sched_queue {
 129         uint16_t qw;
 130         uint16_t qr;
 131 };
 132
 133 struct rte_sched_queue_extra {
 134         struct rte_sched_queue_stats stats;
 135 #ifdef RTE_SCHED_RED
 136         struct rte_red red;
 137 #endif
 138 };
 139
 140 enum grinder_state {
 141         e_GRINDER_PREFETCH_PIPE = 0,
 142         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 143         e_GRINDER_PREFETCH_MBUF,
 144         e_GRINDER_READ_MBUF
 145 };
 146
 147 /*
 148  * Path through the scheduler hierarchy used by the scheduler enqueue
 149  * operation to identify the destination queue for the current
 150  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 151  * each packet, typically written by the classification stage and read
 152  * by scheduler enqueue.
 153  */
 154 struct rte_sched_port_hierarchy {
 155         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 156         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 157         uint32_t color:2;                /**< Color */
 158         uint16_t unused:10;
 159         uint16_t subport;                /**< Subport ID */
 160         uint32_t pipe;                   /**< Pipe ID */
 161 };
 162
 163 struct rte_sched_grinder {
 164         /* Pipe cache */
 165         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 166         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 167         uint32_t pcache_w;
 168         uint32_t pcache_r;
 169
 170         /* Current pipe */
 171         enum grinder_state state;
 172         uint32_t productive;
 173         uint32_t pindex;
 174         struct rte_sched_subport *subport;
 175         struct rte_sched_pipe *pipe;
 176         struct rte_sched_pipe_profile *pipe_params;
 177
 178         /* TC cache */
 179         uint8_t tccache_qmask[4];
 180         uint32_t tccache_qindex[4];
 181         uint32_t tccache_w;
 182         uint32_t tccache_r;
 183
 184         /* Current TC */
 185         uint32_t tc_index;
 186         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 187         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 188         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 189         uint16_t qsize;
 190         uint32_t qmask;
 191         uint32_t qpos;
 192         struct rte_mbuf *pkt;
 193
 194         /* WRR */
 195         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 196         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 197         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 198 };
 199
 200 struct rte_sched_port {
 201         /* User parameters */
 202         uint32_t n_subports_per_port;
 203         uint32_t n_pipes_per_subport;
 204         uint32_t rate;
 205         uint32_t mtu;
 206         uint32_t frame_overhead;
 207         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 208         uint32_t n_pipe_profiles;
 209         uint32_t pipe_tc3_rate_max;
 210 #ifdef RTE_SCHED_RED
 211         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 212 #endif
 213
 214         /* Timing */
 215         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 216         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 217         uint64_t time;                /* Current NIC TX time measured in bytes */
 218         double cycles_per_byte;       /* CPU cycles per byte */
 219
 220         /* Scheduling loop detection */
 221         uint32_t pipe_loop;
 222         uint32_t pipe_exhaustion;
 223
 224         /* Bitmap */
 225         struct rte_bitmap *bmp;
 226         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 227
 228         /* Grinders */
 229         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 230         uint32_t busy_grinders;
 231         struct rte_mbuf **pkts_out;
 232         uint32_t n_pkts_out;
 233
 234         /* Queue base calculation */
 235         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 236         uint32_t qsize_sum;
 237
 238         /* Large data structures */
 239         struct rte_sched_subport *subport;
 240         struct rte_sched_pipe *pipe;
 241         struct rte_sched_queue *queue;
 242         struct rte_sched_queue_extra *queue_extra;
 243         struct rte_sched_pipe_profile *pipe_profiles;
 244         uint8_t *bmp_array;
 245         struct rte_mbuf **queue_array;
 246         uint8_t memory[0] __rte_cache_aligned;
 247 } __rte_cache_aligned;
 248
 249 enum rte_sched_port_array {
 250         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 251         e_RTE_SCHED_PORT_ARRAY_PIPE,
 252         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 253         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 254         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 255         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 256         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 257         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 258 };
 259
 260 #ifdef RTE_SCHED_COLLECT_STATS
 261
 262 static inline uint32_t
 263 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 264 {
 265         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 266 }
 267
 268 #endif
 269
 270 static inline uint32_t
 271 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 272 {
 273         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 274 }
 275
 276 static inline struct rte_mbuf **
 277 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 278 {
 279         uint32_t pindex = qindex >> 4;
 280         uint32_t qpos = qindex & 0xF;
 281
 282         return (port->queue_array + pindex *
 283                 port->qsize_sum + port->qsize_add[qpos]);
 284 }
 285
 286 static inline uint16_t
 287 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 288 {
 289         uint32_t tc = (qindex >> 2) & 0x3;
 290
 291         return port->qsize[tc];
 292 }
 293
 294 static int
 295 rte_sched_port_check_params(struct rte_sched_port_params *params)
 296 {
 297         uint32_t i, j;
 298
 299         if (params == NULL)
 300                 return -1;
 301
 302         /* socket */
 303         if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
 304                 return -3;
 305
 306         /* rate */
 307         if (params->rate == 0)
 308                 return -4;
 309
 310         /* mtu */
 311         if (params->mtu == 0)
 312                 return -5;
 313
 314         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 315         if (params->n_subports_per_port == 0 ||
 316             params->n_subports_per_port > 1u << 16 ||
 317             !rte_is_power_of_2(params->n_subports_per_port))
 318                 return -6;
 319
 320         /* n_pipes_per_subport: non-zero, power of 2 */
 321         if (params->n_pipes_per_subport == 0 ||
 322             !rte_is_power_of_2(params->n_pipes_per_subport))
 323                 return -7;
 324
 325         /* qsize: non-zero, power of 2,
 326          * no bigger than 32K (due to 16-bit read/write pointers)
 327          */
 328         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 329                 uint16_t qsize = params->qsize[i];
 330
 331                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 332                         return -8;
 333         }
 334
 335         /* pipe_profiles and n_pipe_profiles */
 336         if (params->pipe_profiles == NULL ||
 337             params->n_pipe_profiles == 0 ||
 338             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 339                 return -9;
 340
 341         for (i = 0; i < params->n_pipe_profiles; i++) {
 342                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 343
 344                 /* TB rate: non-zero, not greater than port rate */
 345                 if (p->tb_rate == 0 || p->tb_rate > params->rate)
 346                         return -10;
 347
 348                 /* TB size: non-zero */
 349                 if (p->tb_size == 0)
 350                         return -11;
 351
 352                 /* TC rate: non-zero, less than pipe rate */
 353                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 354                         if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
 355                                 return -12;
 356                 }
 357
 358                 /* TC period: non-zero */
 359                 if (p->tc_period == 0)
 360                         return -13;
 361
 362 #ifdef RTE_SCHED_SUBPORT_TC_OV
 363                 /* TC3 oversubscription weight: non-zero */
 364                 if (p->tc_ov_weight == 0)
 365                         return -14;
 366 #endif
 367
 368                 /* Queue WRR weights: non-zero */
 369                 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
 370                         if (p->wrr_weights[j] == 0)
 371                                 return -15;
 372                 }
 373         }
 374
 375         return 0;
 376 }
 377
 378 static uint32_t
 379 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 380 {
 381         uint32_t n_subports_per_port = params->n_subports_per_port;
 382         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 383         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 384         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 385
 386         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 387         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 388         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 389         uint32_t size_queue_extra
 390                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 391         uint32_t size_pipe_profiles
 392                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 393         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 394         uint32_t size_per_pipe_queue_array, size_queue_array;
 395
 396         uint32_t base, i;
 397
 398         size_per_pipe_queue_array = 0;
 399         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 400                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 401                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 402         }
 403         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 404
 405         base = 0;
 406
 407         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 408                 return base;
 409         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 410
 411         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 412                 return base;
 413         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 414
 415         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 416                 return base;
 417         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 418
 419         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 420                 return base;
 421         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 422
 423         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 424                 return base;
 425         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 426
 427         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 428                 return base;
 429         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 430
 431         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 432                 return base;
 433         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 434
 435         return base;
 436 }
 437
 438 uint32_t
 439 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 440 {
 441         uint32_t size0, size1;
 442         int status;
 443
 444         status = rte_sched_port_check_params(params);
 445         if (status != 0) {
 446                 RTE_LOG(NOTICE, SCHED,
 447                         "Port scheduler params check failed (%d)\n", status);
 448
 449                 return 0;
 450         }
 451
 452         size0 = sizeof(struct rte_sched_port);
 453         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 454
 455         return (size0 + size1);
 456 }
 457
 458 static void
 459 rte_sched_port_config_qsize(struct rte_sched_port *port)
 460 {
 461         /* TC 0 */
 462         port->qsize_add[0] = 0;
 463         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 464         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 465         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 466
 467         /* TC 1 */
 468         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 469         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 470         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 471         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 472
 473         /* TC 2 */
 474         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 475         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 476         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 477         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 478
 479         /* TC 3 */
 480         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 481         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 482         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 483         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 484
 485         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 486 }
 487
 488 static void
 489 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 490 {
 491         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 492
 493         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 494                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 495                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 496                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 497                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 498                 i,
 499
 500                 /* Token bucket */
 501                 p->tb_period,
 502                 p->tb_credits_per_period,
 503                 p->tb_size,
 504
 505                 /* Traffic classes */
 506                 p->tc_period,
 507                 p->tc_credits_per_period[0],
 508                 p->tc_credits_per_period[1],
 509                 p->tc_credits_per_period[2],
 510                 p->tc_credits_per_period[3],
 511
 512                 /* Traffic class 3 oversubscription */
 513                 p->tc_ov_weight,
 514
 515                 /* WRR */
 516                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 517                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 518                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 519                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 520 }
 521
 522 static inline uint64_t
 523 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 524 {
 525         uint64_t time = time_ms;
 526
 527         time = (time * rate) / 1000;
 528
 529         return time;
 530 }
 531
 532 static void
 533 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
 534 {
 535         uint32_t i, j;
 536
 537         for (i = 0; i < port->n_pipe_profiles; i++) {
 538                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 539                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 540
 541                 /* Token Bucket */
 542                 if (src->tb_rate == params->rate) {
 543                         dst->tb_credits_per_period = 1;
 544                         dst->tb_period = 1;
 545                 } else {
 546                         double tb_rate = (double) src->tb_rate
 547                                 / (double) params->rate;
 548                         double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 549
 550                         rte_approx(tb_rate, d,
 551                                    &dst->tb_credits_per_period, &dst->tb_period);
 552                 }
 553                 dst->tb_size = src->tb_size;
 554
 555                 /* Traffic Classes */
 556                 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 557                                                             params->rate);
 558
 559                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
 560                         dst->tc_credits_per_period[j]
 561                                 = rte_sched_time_ms_to_bytes(src->tc_period,
 562                                                              src->tc_rate[j]);
 563
 564 #ifdef RTE_SCHED_SUBPORT_TC_OV
 565                 dst->tc_ov_weight = src->tc_ov_weight;
 566 #endif
 567
 568                 /* WRR */
 569                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 570                         uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 571                         uint32_t lcd, lcd1, lcd2;
 572                         uint32_t qindex;
 573
 574                         qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 575
 576                         wrr_cost[0] = src->wrr_weights[qindex];
 577                         wrr_cost[1] = src->wrr_weights[qindex + 1];
 578                         wrr_cost[2] = src->wrr_weights[qindex + 2];
 579                         wrr_cost[3] = src->wrr_weights[qindex + 3];
 580
 581                         lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 582                         lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 583                         lcd = rte_get_lcd(lcd1, lcd2);
 584
 585                         wrr_cost[0] = lcd / wrr_cost[0];
 586                         wrr_cost[1] = lcd / wrr_cost[1];
 587                         wrr_cost[2] = lcd / wrr_cost[2];
 588                         wrr_cost[3] = lcd / wrr_cost[3];
 589
 590                         dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 591                         dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 592                         dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 593                         dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 594                 }
 595
 596                 rte_sched_port_log_pipe_profile(port, i);
 597         }
 598
 599         port->pipe_tc3_rate_max = 0;
 600         for (i = 0; i < port->n_pipe_profiles; i++) {
 601                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 602                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 603
 604                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 605                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 606         }
 607 }
 608
 609 struct rte_sched_port *
 610 rte_sched_port_config(struct rte_sched_port_params *params)
 611 {
 612         struct rte_sched_port *port = NULL;
 613         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
 614
 615         /* Check user parameters. Determine the amount of memory to allocate */
 616         mem_size = rte_sched_port_get_memory_footprint(params);
 617         if (mem_size == 0)
 618                 return NULL;
 619
 620         /* Allocate memory to store the data structures */
 621         port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
 622         if (port == NULL)
 623                 return NULL;
 624
 625         /* compile time checks */
 626         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 627         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 628
 629         /* User parameters */
 630         port->n_subports_per_port = params->n_subports_per_port;
 631         port->n_pipes_per_subport = params->n_pipes_per_subport;
 632         port->rate = params->rate;
 633         port->mtu = params->mtu + params->frame_overhead;
 634         port->frame_overhead = params->frame_overhead;
 635         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 636         port->n_pipe_profiles = params->n_pipe_profiles;
 637
 638 #ifdef RTE_SCHED_RED
 639         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 640                 uint32_t j;
 641
 642                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 643                         /* if min/max are both zero, then RED is disabled */
 644                         if ((params->red_params[i][j].min_th |
 645                              params->red_params[i][j].max_th) == 0) {
 646                                 continue;
 647                         }
 648
 649                         if (rte_red_config_init(&port->red_config[i][j],
 650                                 params->red_params[i][j].wq_log2,
 651                                 params->red_params[i][j].min_th,
 652                                 params->red_params[i][j].max_th,
 653                                 params->red_params[i][j].maxp_inv) != 0) {
 654                                 return NULL;
 655                         }
 656                 }
 657         }
 658 #endif
 659
 660         /* Timing */
 661         port->time_cpu_cycles = rte_get_tsc_cycles();
 662         port->time_cpu_bytes = 0;
 663         port->time = 0;
 664         port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
 665
 666         /* Scheduling loop detection */
 667         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 668         port->pipe_exhaustion = 0;
 669
 670         /* Grinders */
 671         port->busy_grinders = 0;
 672         port->pkts_out = NULL;
 673         port->n_pkts_out = 0;
 674
 675         /* Queue base calculation */
 676         rte_sched_port_config_qsize(port);
 677
 678         /* Large data structures */
 679         port->subport = (struct rte_sched_subport *)
 680                 (port->memory + rte_sched_port_get_array_base(params,
 681                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 682         port->pipe = (struct rte_sched_pipe *)
 683                 (port->memory + rte_sched_port_get_array_base(params,
 684                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 685         port->queue = (struct rte_sched_queue *)
 686                 (port->memory + rte_sched_port_get_array_base(params,
 687                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 688         port->queue_extra = (struct rte_sched_queue_extra *)
 689                 (port->memory + rte_sched_port_get_array_base(params,
 690                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 691         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 692                 (port->memory + rte_sched_port_get_array_base(params,
 693                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 694         port->bmp_array =  port->memory
 695                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 696         port->queue_array = (struct rte_mbuf **)
 697                 (port->memory + rte_sched_port_get_array_base(params,
 698                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 699
 700         /* Pipe profile table */
 701         rte_sched_port_config_pipe_profile_table(port, params);
 702
 703         /* Bitmap */
 704         n_queues_per_port = rte_sched_port_queues_per_port(port);
 705         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 706         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 707                                     bmp_mem_size);
 708         if (port->bmp == NULL) {
 709                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 710                 return NULL;
 711         }
 712
 713         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 714                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 715
 716
 717         return port;
 718 }
 719
 720 void
 721 rte_sched_port_free(struct rte_sched_port *port)
 722 {
 723         unsigned int queue;
 724
 725         /* Check user parameters */
 726         if (port == NULL)
 727                 return;
 728
 729         /* Free enqueued mbufs */
 730         for (queue = 0; queue < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; queue++) {
 731                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, queue);
 732                 unsigned int i;
 733
 734                 for (i = 0; i < rte_sched_port_qsize(port, queue); i++)
 735                         rte_pktmbuf_free(mbufs[i]);
 736         }
 737
 738         rte_bitmap_free(port->bmp);
 739         rte_free(port);
 740 }
 741
 742 static void
 743 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 744 {
 745         struct rte_sched_subport *s = port->subport + i;
 746
 747         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 748                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 749                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 750                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 751                 i,
 752
 753                 /* Token bucket */
 754                 s->tb_period,
 755                 s->tb_credits_per_period,
 756                 s->tb_size,
 757
 758                 /* Traffic classes */
 759                 s->tc_period,
 760                 s->tc_credits_per_period[0],
 761                 s->tc_credits_per_period[1],
 762                 s->tc_credits_per_period[2],
 763                 s->tc_credits_per_period[3],
 764
 765                 /* Traffic class 3 oversubscription */
 766                 s->tc_ov_wm_min,
 767                 s->tc_ov_wm_max);
 768 }
 769
 770 int
 771 rte_sched_subport_config(struct rte_sched_port *port,
 772         uint32_t subport_id,
 773         struct rte_sched_subport_params *params)
 774 {
 775         struct rte_sched_subport *s;
 776         uint32_t i;
 777
 778         /* Check user parameters */
 779         if (port == NULL ||
 780             subport_id >= port->n_subports_per_port ||
 781             params == NULL)
 782                 return -1;
 783
 784         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 785                 return -2;
 786
 787         if (params->tb_size == 0)
 788                 return -3;
 789
 790         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 791                 if (params->tc_rate[i] == 0 ||
 792                     params->tc_rate[i] > params->tb_rate)
 793                         return -4;
 794         }
 795
 796         if (params->tc_period == 0)
 797                 return -5;
 798
 799         s = port->subport + subport_id;
 800
 801         /* Token Bucket (TB) */
 802         if (params->tb_rate == port->rate) {
 803                 s->tb_credits_per_period = 1;
 804                 s->tb_period = 1;
 805         } else {
 806                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 807                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 808
 809                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 810         }
 811
 812         s->tb_size = params->tb_size;
 813         s->tb_time = port->time;
 814         s->tb_credits = s->tb_size / 2;
 815
 816         /* Traffic Classes (TCs) */
 817         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 818         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 819                 s->tc_credits_per_period[i]
 820                         = rte_sched_time_ms_to_bytes(params->tc_period,
 821                                                      params->tc_rate[i]);
 822         }
 823         s->tc_time = port->time + s->tc_period;
 824         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 825                 s->tc_credits[i] = s->tc_credits_per_period[i];
 826
 827 #ifdef RTE_SCHED_SUBPORT_TC_OV
 828         /* TC oversubscription */
 829         s->tc_ov_wm_min = port->mtu;
 830         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 831                                                      port->pipe_tc3_rate_max);
 832         s->tc_ov_wm = s->tc_ov_wm_max;
 833         s->tc_ov_period_id = 0;
 834         s->tc_ov = 0;
 835         s->tc_ov_n = 0;
 836         s->tc_ov_rate = 0;
 837 #endif
 838
 839         rte_sched_port_log_subport_config(port, subport_id);
 840
 841         return 0;
 842 }
 843
 844 int
 845 rte_sched_pipe_config(struct rte_sched_port *port,
 846         uint32_t subport_id,
 847         uint32_t pipe_id,
 848         int32_t pipe_profile)
 849 {
 850         struct rte_sched_subport *s;
 851         struct rte_sched_pipe *p;
 852         struct rte_sched_pipe_profile *params;
 853         uint32_t deactivate, profile, i;
 854
 855         /* Check user parameters */
 856         profile = (uint32_t) pipe_profile;
 857         deactivate = (pipe_profile < 0);
 858
 859         if (port == NULL ||
 860             subport_id >= port->n_subports_per_port ||
 861             pipe_id >= port->n_pipes_per_subport ||
 862             (!deactivate && profile >= port->n_pipe_profiles))
 863                 return -1;
 864
 865
 866         /* Check that subport configuration is valid */
 867         s = port->subport + subport_id;
 868         if (s->tb_period == 0)
 869                 return -2;
 870
 871         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 872
 873         /* Handle the case when pipe already has a valid configuration */
 874         if (p->tb_time) {
 875                 params = port->pipe_profiles + p->profile;
 876
 877 #ifdef RTE_SCHED_SUBPORT_TC_OV
 878                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 879                         / (double) s->tc_period;
 880                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 881                         / (double) params->tc_period;
 882                 uint32_t tc3_ov = s->tc_ov;
 883
 884                 /* Unplug pipe from its subport */
 885                 s->tc_ov_n -= params->tc_ov_weight;
 886                 s->tc_ov_rate -= pipe_tc3_rate;
 887                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 888
 889                 if (s->tc_ov != tc3_ov) {
 890                         RTE_LOG(DEBUG, SCHED,
 891                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 892                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 893                 }
 894 #endif
 895
 896                 /* Reset the pipe */
 897                 memset(p, 0, sizeof(struct rte_sched_pipe));
 898         }
 899
 900         if (deactivate)
 901                 return 0;
 902
 903         /* Apply the new pipe configuration */
 904         p->profile = profile;
 905         params = port->pipe_profiles + p->profile;
 906
 907         /* Token Bucket (TB) */
 908         p->tb_time = port->time;
 909         p->tb_credits = params->tb_size / 2;
 910
 911         /* Traffic Classes (TCs) */
 912         p->tc_time = port->time + params->tc_period;
 913         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 914                 p->tc_credits[i] = params->tc_credits_per_period[i];
 915
 916 #ifdef RTE_SCHED_SUBPORT_TC_OV
 917         {
 918                 /* Subport TC3 oversubscription */
 919                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 920                         / (double) s->tc_period;
 921                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 922                         / (double) params->tc_period;
 923                 uint32_t tc3_ov = s->tc_ov;
 924
 925                 s->tc_ov_n += params->tc_ov_weight;
 926                 s->tc_ov_rate += pipe_tc3_rate;
 927                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 928
 929                 if (s->tc_ov != tc3_ov) {
 930                         RTE_LOG(DEBUG, SCHED,
 931                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 932                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 933                 }
 934                 p->tc_ov_period_id = s->tc_ov_period_id;
 935                 p->tc_ov_credits = s->tc_ov_wm;
 936         }
 937 #endif
 938
 939         return 0;
 940 }
 941
 942 void
 943 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
 944                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
 945                          uint32_t queue, enum rte_meter_color color)
 946 {
 947         struct rte_sched_port_hierarchy *sched
 948                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 949
 950         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
 951
 952         sched->color = (uint32_t) color;
 953         sched->subport = subport;
 954         sched->pipe = pipe;
 955         sched->traffic_class = traffic_class;
 956         sched->queue = queue;
 957 }
 958
 959 void
 960 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
 961                                   uint32_t *subport, uint32_t *pipe,
 962                                   uint32_t *traffic_class, uint32_t *queue)
 963 {
 964         const struct rte_sched_port_hierarchy *sched
 965                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 966
 967         *subport = sched->subport;
 968         *pipe = sched->pipe;
 969         *traffic_class = sched->traffic_class;
 970         *queue = sched->queue;
 971 }
 972
 973 enum rte_meter_color
 974 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
 975 {
 976         const struct rte_sched_port_hierarchy *sched
 977                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 978
 979         return (enum rte_meter_color) sched->color;
 980 }
 981
 982 int
 983 rte_sched_subport_read_stats(struct rte_sched_port *port,
 984                              uint32_t subport_id,
 985                              struct rte_sched_subport_stats *stats,
 986                              uint32_t *tc_ov)
 987 {
 988         struct rte_sched_subport *s;
 989
 990         /* Check user parameters */
 991         if (port == NULL || subport_id >= port->n_subports_per_port ||
 992             stats == NULL || tc_ov == NULL)
 993                 return -1;
 994
 995         s = port->subport + subport_id;
 996
 997         /* Copy subport stats and clear */
 998         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
 999         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1000
1001         /* Subport TC ovesubscription status */
1002         *tc_ov = s->tc_ov;
1003
1004         return 0;
1005 }
1006
1007 int
1008 rte_sched_queue_read_stats(struct rte_sched_port *port,
1009         uint32_t queue_id,
1010         struct rte_sched_queue_stats *stats,
1011         uint16_t *qlen)
1012 {
1013         struct rte_sched_queue *q;
1014         struct rte_sched_queue_extra *qe;
1015
1016         /* Check user parameters */
1017         if ((port == NULL) ||
1018             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1019                 (stats == NULL) ||
1020                 (qlen == NULL)) {
1021                 return -1;
1022         }
1023         q = port->queue + queue_id;
1024         qe = port->queue_extra + queue_id;
1025
1026         /* Copy queue stats and clear */
1027         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1028         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1029
1030         /* Queue length */
1031         *qlen = q->qw - q->qr;
1032
1033         return 0;
1034 }
1035
1036 static inline uint32_t
1037 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1038 {
1039         uint32_t result;
1040
1041         result = subport * port->n_pipes_per_subport + pipe;
1042         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1043         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1044
1045         return result;
1046 }
1047
1048 #ifdef RTE_SCHED_DEBUG
1049
1050 static inline int
1051 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1052 {
1053         struct rte_sched_queue *queue = port->queue + qindex;
1054
1055         return (queue->qr == queue->qw);
1056 }
1057
1058 #endif /* RTE_SCHED_DEBUG */
1059
1060 #ifdef RTE_SCHED_COLLECT_STATS
1061
1062 static inline void
1063 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1064 {
1065         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1066         uint32_t tc_index = (qindex >> 2) & 0x3;
1067         uint32_t pkt_len = pkt->pkt_len;
1068
1069         s->stats.n_pkts_tc[tc_index] += 1;
1070         s->stats.n_bytes_tc[tc_index] += pkt_len;
1071 }
1072
1073 static inline void
1074 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1075 {
1076         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1077         uint32_t tc_index = (qindex >> 2) & 0x3;
1078         uint32_t pkt_len = pkt->pkt_len;
1079
1080         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1081         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1082 }
1083
1084 static inline void
1085 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1086 {
1087         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1088         uint32_t pkt_len = pkt->pkt_len;
1089
1090         qe->stats.n_pkts += 1;
1091         qe->stats.n_bytes += pkt_len;
1092 }
1093
1094 static inline void
1095 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1096 {
1097         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1098         uint32_t pkt_len = pkt->pkt_len;
1099
1100         qe->stats.n_pkts_dropped += 1;
1101         qe->stats.n_bytes_dropped += pkt_len;
1102 }
1103
1104 #endif /* RTE_SCHED_COLLECT_STATS */
1105
1106 #ifdef RTE_SCHED_RED
1107
1108 static inline int
1109 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1110 {
1111         struct rte_sched_queue_extra *qe;
1112         struct rte_red_config *red_cfg;
1113         struct rte_red *red;
1114         uint32_t tc_index;
1115         enum rte_meter_color color;
1116
1117         tc_index = (qindex >> 2) & 0x3;
1118         color = rte_sched_port_pkt_read_color(pkt);
1119         red_cfg = &port->red_config[tc_index][color];
1120
1121         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1122                 return 0;
1123
1124         qe = port->queue_extra + qindex;
1125         red = &qe->red;
1126
1127         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1128 }
1129
1130 static inline void
1131 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1132 {
1133         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1134         struct rte_red *red = &qe->red;
1135
1136         rte_red_mark_queue_empty(red, port->time);
1137 }
1138
1139 #else
1140
1141 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1142
1143 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1144
1145 #endif /* RTE_SCHED_RED */
1146
1147 #ifdef RTE_SCHED_DEBUG
1148
1149 static inline void
1150 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1151                        uint64_t bmp_slab)
1152 {
1153         uint64_t mask;
1154         uint32_t i, panic;
1155
1156         if (bmp_slab == 0)
1157                 rte_panic("Empty slab at position %u\n", bmp_pos);
1158
1159         panic = 0;
1160         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1161                 if (mask & bmp_slab) {
1162                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1163                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1164                                 panic = 1;
1165                         }
1166                 }
1167         }
1168
1169         if (panic)
1170                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1171                         bmp_slab, bmp_pos);
1172 }
1173
1174 #endif /* RTE_SCHED_DEBUG */
1175
1176 static inline uint32_t
1177 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1178                                        struct rte_mbuf *pkt)
1179 {
1180         struct rte_sched_queue *q;
1181 #ifdef RTE_SCHED_COLLECT_STATS
1182         struct rte_sched_queue_extra *qe;
1183 #endif
1184         uint32_t subport, pipe, traffic_class, queue, qindex;
1185
1186         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1187
1188         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1189         q = port->queue + qindex;
1190         rte_prefetch0(q);
1191 #ifdef RTE_SCHED_COLLECT_STATS
1192         qe = port->queue_extra + qindex;
1193         rte_prefetch0(qe);
1194 #endif
1195
1196         return qindex;
1197 }
1198
1199 static inline void
1200 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1201                                      uint32_t qindex, struct rte_mbuf **qbase)
1202 {
1203         struct rte_sched_queue *q;
1204         struct rte_mbuf **q_qw;
1205         uint16_t qsize;
1206
1207         q = port->queue + qindex;
1208         qsize = rte_sched_port_qsize(port, qindex);
1209         q_qw = qbase + (q->qw & (qsize - 1));
1210
1211         rte_prefetch0(q_qw);
1212         rte_bitmap_prefetch0(port->bmp, qindex);
1213 }
1214
1215 static inline int
1216 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1217                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1218 {
1219         struct rte_sched_queue *q;
1220         uint16_t qsize;
1221         uint16_t qlen;
1222
1223         q = port->queue + qindex;
1224         qsize = rte_sched_port_qsize(port, qindex);
1225         qlen = q->qw - q->qr;
1226
1227         /* Drop the packet (and update drop stats) when queue is full */
1228         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1229                      (qlen >= qsize))) {
1230                 rte_pktmbuf_free(pkt);
1231 #ifdef RTE_SCHED_COLLECT_STATS
1232                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1233                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1234 #endif
1235                 return 0;
1236         }
1237
1238         /* Enqueue packet */
1239         qbase[q->qw & (qsize - 1)] = pkt;
1240         q->qw++;
1241
1242         /* Activate queue in the port bitmap */
1243         rte_bitmap_set(port->bmp, qindex);
1244
1245         /* Statistics */
1246 #ifdef RTE_SCHED_COLLECT_STATS
1247         rte_sched_port_update_subport_stats(port, qindex, pkt);
1248         rte_sched_port_update_queue_stats(port, qindex, pkt);
1249 #endif
1250
1251         return 1;
1252 }
1253
1254
1255 /*
1256  * The enqueue function implements a 4-level pipeline with each stage
1257  * processing two different packets. The purpose of using a pipeline
1258  * is to hide the latency of prefetching the data structures. The
1259  * naming convention is presented in the diagram below:
1260  *
1261  *   p00  _______   p10  _______   p20  _______   p30  _______
1262  * ----->|       |----->|       |----->|       |----->|       |----->
1263  *       |   0   |      |   1   |      |   2   |      |   3   |
1264  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1265  *   p01            p11            p21            p31
1266  *
1267  */
1268 int
1269 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1270                        uint32_t n_pkts)
1271 {
1272         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1273                 *pkt30, *pkt31, *pkt_last;
1274         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1275                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1276         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1277         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1278         uint32_t result, i;
1279
1280         result = 0;
1281
1282         /*
1283          * Less then 6 input packets available, which is not enough to
1284          * feed the pipeline
1285          */
1286         if (unlikely(n_pkts < 6)) {
1287                 struct rte_mbuf **q_base[5];
1288                 uint32_t q[5];
1289
1290                 /* Prefetch the mbuf structure of each packet */
1291                 for (i = 0; i < n_pkts; i++)
1292                         rte_prefetch0(pkts[i]);
1293
1294                 /* Prefetch the queue structure for each queue */
1295                 for (i = 0; i < n_pkts; i++)
1296                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1297                                                                       pkts[i]);
1298
1299                 /* Prefetch the write pointer location of each queue */
1300                 for (i = 0; i < n_pkts; i++) {
1301                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1302                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1303                                                              q_base[i]);
1304                 }
1305
1306                 /* Write each packet to its queue */
1307                 for (i = 0; i < n_pkts; i++)
1308                         result += rte_sched_port_enqueue_qwa(port, q[i],
1309                                                              q_base[i], pkts[i]);
1310
1311                 return result;
1312         }
1313
1314         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1315         pkt20 = pkts[0];
1316         pkt21 = pkts[1];
1317         rte_prefetch0(pkt20);
1318         rte_prefetch0(pkt21);
1319
1320         pkt10 = pkts[2];
1321         pkt11 = pkts[3];
1322         rte_prefetch0(pkt10);
1323         rte_prefetch0(pkt11);
1324
1325         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1326         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1327
1328         pkt00 = pkts[4];
1329         pkt01 = pkts[5];
1330         rte_prefetch0(pkt00);
1331         rte_prefetch0(pkt01);
1332
1333         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1334         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1335
1336         q20_base = rte_sched_port_qbase(port, q20);
1337         q21_base = rte_sched_port_qbase(port, q21);
1338         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1339         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1340
1341         /* Run the pipeline */
1342         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1343                 /* Propagate stage inputs */
1344                 pkt30 = pkt20;
1345                 pkt31 = pkt21;
1346                 pkt20 = pkt10;
1347                 pkt21 = pkt11;
1348                 pkt10 = pkt00;
1349                 pkt11 = pkt01;
1350                 q30 = q20;
1351                 q31 = q21;
1352                 q20 = q10;
1353                 q21 = q11;
1354                 q30_base = q20_base;
1355                 q31_base = q21_base;
1356
1357                 /* Stage 0: Get packets in */
1358                 pkt00 = pkts[i];
1359                 pkt01 = pkts[i + 1];
1360                 rte_prefetch0(pkt00);
1361                 rte_prefetch0(pkt01);
1362
1363                 /* Stage 1: Prefetch queue structure storing queue pointers */
1364                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1365                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1366
1367                 /* Stage 2: Prefetch queue write location */
1368                 q20_base = rte_sched_port_qbase(port, q20);
1369                 q21_base = rte_sched_port_qbase(port, q21);
1370                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1371                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1372
1373                 /* Stage 3: Write packet to queue and activate queue */
1374                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1375                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1376                 result += r30 + r31;
1377         }
1378
1379         /*
1380          * Drain the pipeline (exactly 6 packets).
1381          * Handle the last packet in the case
1382          * of an odd number of input packets.
1383          */
1384         pkt_last = pkts[n_pkts - 1];
1385         rte_prefetch0(pkt_last);
1386
1387         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1388         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1389
1390         q10_base = rte_sched_port_qbase(port, q10);
1391         q11_base = rte_sched_port_qbase(port, q11);
1392         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1393         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1394
1395         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1396         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1397         result += r20 + r21;
1398
1399         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1400
1401         q00_base = rte_sched_port_qbase(port, q00);
1402         q01_base = rte_sched_port_qbase(port, q01);
1403         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1404         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1405
1406         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1407         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1408         result += r10 + r11;
1409
1410         q_last_base = rte_sched_port_qbase(port, q_last);
1411         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1412
1413         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1414         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1415         result += r00 + r01;
1416
1417         if (n_pkts & 1) {
1418                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1419                 result += r_last;
1420         }
1421
1422         return result;
1423 }
1424
1425 #ifndef RTE_SCHED_SUBPORT_TC_OV
1426
1427 static inline void
1428 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1429 {
1430         struct rte_sched_grinder *grinder = port->grinder + pos;
1431         struct rte_sched_subport *subport = grinder->subport;
1432         struct rte_sched_pipe *pipe = grinder->pipe;
1433         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1434         uint64_t n_periods;
1435
1436         /* Subport TB */
1437         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1438         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1439         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1440         subport->tb_time += n_periods * subport->tb_period;
1441
1442         /* Pipe TB */
1443         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1444         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1445         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1446         pipe->tb_time += n_periods * params->tb_period;
1447
1448         /* Subport TCs */
1449         if (unlikely(port->time >= subport->tc_time)) {
1450                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1451                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1452                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1453                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1454                 subport->tc_time = port->time + subport->tc_period;
1455         }
1456
1457         /* Pipe TCs */
1458         if (unlikely(port->time >= pipe->tc_time)) {
1459                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1460                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1461                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1462                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1463                 pipe->tc_time = port->time + params->tc_period;
1464         }
1465 }
1466
1467 #else
1468
1469 static inline uint32_t
1470 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1471 {
1472         struct rte_sched_grinder *grinder = port->grinder + pos;
1473         struct rte_sched_subport *subport = grinder->subport;
1474         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1475         uint32_t tc_ov_consumption_max;
1476         uint32_t tc_ov_wm = subport->tc_ov_wm;
1477
1478         if (subport->tc_ov == 0)
1479                 return subport->tc_ov_wm_max;
1480
1481         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1482         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1483         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1484         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1485
1486         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1487                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1488
1489         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1490                 tc_ov_wm  -= tc_ov_wm >> 7;
1491                 if (tc_ov_wm < subport->tc_ov_wm_min)
1492                         tc_ov_wm = subport->tc_ov_wm_min;
1493
1494                 return tc_ov_wm;
1495         }
1496
1497         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1498         if (tc_ov_wm > subport->tc_ov_wm_max)
1499                 tc_ov_wm = subport->tc_ov_wm_max;
1500
1501         return tc_ov_wm;
1502 }
1503
1504 static inline void
1505 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1506 {
1507         struct rte_sched_grinder *grinder = port->grinder + pos;
1508         struct rte_sched_subport *subport = grinder->subport;
1509         struct rte_sched_pipe *pipe = grinder->pipe;
1510         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1511         uint64_t n_periods;
1512
1513         /* Subport TB */
1514         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1515         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1516         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1517         subport->tb_time += n_periods * subport->tb_period;
1518
1519         /* Pipe TB */
1520         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1521         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1522         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1523         pipe->tb_time += n_periods * params->tb_period;
1524
1525         /* Subport TCs */
1526         if (unlikely(port->time >= subport->tc_time)) {
1527                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1528
1529                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1530                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1531                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1532                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1533
1534                 subport->tc_time = port->time + subport->tc_period;
1535                 subport->tc_ov_period_id++;
1536         }
1537
1538         /* Pipe TCs */
1539         if (unlikely(port->time >= pipe->tc_time)) {
1540                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1541                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1542                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1543                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1544                 pipe->tc_time = port->time + params->tc_period;
1545         }
1546
1547         /* Pipe TCs - Oversubscription */
1548         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1549                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1550
1551                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1552         }
1553 }
1554
1555 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1556
1557
1558 #ifndef RTE_SCHED_SUBPORT_TC_OV
1559
1560 static inline int
1561 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1562 {
1563         struct rte_sched_grinder *grinder = port->grinder + pos;
1564         struct rte_sched_subport *subport = grinder->subport;
1565         struct rte_sched_pipe *pipe = grinder->pipe;
1566         struct rte_mbuf *pkt = grinder->pkt;
1567         uint32_t tc_index = grinder->tc_index;
1568         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1569         uint32_t subport_tb_credits = subport->tb_credits;
1570         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1571         uint32_t pipe_tb_credits = pipe->tb_credits;
1572         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1573         int enough_credits;
1574
1575         /* Check queue credits */
1576         enough_credits = (pkt_len <= subport_tb_credits) &&
1577                 (pkt_len <= subport_tc_credits) &&
1578                 (pkt_len <= pipe_tb_credits) &&
1579                 (pkt_len <= pipe_tc_credits);
1580
1581         if (!enough_credits)
1582                 return 0;
1583
1584         /* Update port credits */
1585         subport->tb_credits -= pkt_len;
1586         subport->tc_credits[tc_index] -= pkt_len;
1587         pipe->tb_credits -= pkt_len;
1588         pipe->tc_credits[tc_index] -= pkt_len;
1589
1590         return 1;
1591 }
1592
1593 #else
1594
1595 static inline int
1596 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1597 {
1598         struct rte_sched_grinder *grinder = port->grinder + pos;
1599         struct rte_sched_subport *subport = grinder->subport;
1600         struct rte_sched_pipe *pipe = grinder->pipe;
1601         struct rte_mbuf *pkt = grinder->pkt;
1602         uint32_t tc_index = grinder->tc_index;
1603         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1604         uint32_t subport_tb_credits = subport->tb_credits;
1605         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1606         uint32_t pipe_tb_credits = pipe->tb_credits;
1607         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1608         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1609         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1610         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1611         int enough_credits;
1612
1613         /* Check pipe and subport credits */
1614         enough_credits = (pkt_len <= subport_tb_credits) &&
1615                 (pkt_len <= subport_tc_credits) &&
1616                 (pkt_len <= pipe_tb_credits) &&
1617                 (pkt_len <= pipe_tc_credits) &&
1618                 (pkt_len <= pipe_tc_ov_credits);
1619
1620         if (!enough_credits)
1621                 return 0;
1622
1623         /* Update pipe and subport credits */
1624         subport->tb_credits -= pkt_len;
1625         subport->tc_credits[tc_index] -= pkt_len;
1626         pipe->tb_credits -= pkt_len;
1627         pipe->tc_credits[tc_index] -= pkt_len;
1628         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1629
1630         return 1;
1631 }
1632
1633 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1634
1635
1636 static inline int
1637 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1638 {
1639         struct rte_sched_grinder *grinder = port->grinder + pos;
1640         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1641         struct rte_mbuf *pkt = grinder->pkt;
1642         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1643
1644         if (!grinder_credits_check(port, pos))
1645                 return 0;
1646
1647         /* Advance port time */
1648         port->time += pkt_len;
1649
1650         /* Send packet */
1651         port->pkts_out[port->n_pkts_out++] = pkt;
1652         queue->qr++;
1653         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1654         if (queue->qr == queue->qw) {
1655                 uint32_t qindex = grinder->qindex[grinder->qpos];
1656
1657                 rte_bitmap_clear(port->bmp, qindex);
1658                 grinder->qmask &= ~(1 << grinder->qpos);
1659                 grinder->wrr_mask[grinder->qpos] = 0;
1660                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1661         }
1662
1663         /* Reset pipe loop detection */
1664         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1665         grinder->productive = 1;
1666
1667         return 1;
1668 }
1669
1670 #ifdef RTE_SCHED_VECTOR
1671
1672 static inline int
1673 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1674 {
1675         __m128i index = _mm_set1_epi32(base_pipe);
1676         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1677         __m128i res = _mm_cmpeq_epi32(pipes, index);
1678
1679         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1680         pipes = _mm_cmpeq_epi32(pipes, index);
1681         res = _mm_or_si128(res, pipes);
1682
1683         if (_mm_testz_si128(res, res))
1684                 return 0;
1685
1686         return 1;
1687 }
1688
1689 #else
1690
1691 static inline int
1692 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1693 {
1694         uint32_t i;
1695
1696         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1697                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1698                         return 1;
1699         }
1700
1701         return 0;
1702 }
1703
1704 #endif /* RTE_SCHED_OPTIMIZATIONS */
1705
1706 static inline void
1707 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1708 {
1709         struct rte_sched_grinder *grinder = port->grinder + pos;
1710         uint16_t w[4];
1711
1712         grinder->pcache_w = 0;
1713         grinder->pcache_r = 0;
1714
1715         w[0] = (uint16_t) bmp_slab;
1716         w[1] = (uint16_t) (bmp_slab >> 16);
1717         w[2] = (uint16_t) (bmp_slab >> 32);
1718         w[3] = (uint16_t) (bmp_slab >> 48);
1719
1720         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1721         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1722         grinder->pcache_w += (w[0] != 0);
1723
1724         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1725         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1726         grinder->pcache_w += (w[1] != 0);
1727
1728         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1729         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1730         grinder->pcache_w += (w[2] != 0);
1731
1732         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1733         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1734         grinder->pcache_w += (w[3] != 0);
1735 }
1736
1737 static inline void
1738 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1739 {
1740         struct rte_sched_grinder *grinder = port->grinder + pos;
1741         uint8_t b[4];
1742
1743         grinder->tccache_w = 0;
1744         grinder->tccache_r = 0;
1745
1746         b[0] = (uint8_t) (qmask & 0xF);
1747         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1748         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1749         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1750
1751         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1752         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1753         grinder->tccache_w += (b[0] != 0);
1754
1755         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1756         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1757         grinder->tccache_w += (b[1] != 0);
1758
1759         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1760         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1761         grinder->tccache_w += (b[2] != 0);
1762
1763         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1764         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1765         grinder->tccache_w += (b[3] != 0);
1766 }
1767
1768 static inline int
1769 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1770 {
1771         struct rte_sched_grinder *grinder = port->grinder + pos;
1772         struct rte_mbuf **qbase;
1773         uint32_t qindex;
1774         uint16_t qsize;
1775
1776         if (grinder->tccache_r == grinder->tccache_w)
1777                 return 0;
1778
1779         qindex = grinder->tccache_qindex[grinder->tccache_r];
1780         qbase = rte_sched_port_qbase(port, qindex);
1781         qsize = rte_sched_port_qsize(port, qindex);
1782
1783         grinder->tc_index = (qindex >> 2) & 0x3;
1784         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1785         grinder->qsize = qsize;
1786
1787         grinder->qindex[0] = qindex;
1788         grinder->qindex[1] = qindex + 1;
1789         grinder->qindex[2] = qindex + 2;
1790         grinder->qindex[3] = qindex + 3;
1791
1792         grinder->queue[0] = port->queue + qindex;
1793         grinder->queue[1] = port->queue + qindex + 1;
1794         grinder->queue[2] = port->queue + qindex + 2;
1795         grinder->queue[3] = port->queue + qindex + 3;
1796
1797         grinder->qbase[0] = qbase;
1798         grinder->qbase[1] = qbase + qsize;
1799         grinder->qbase[2] = qbase + 2 * qsize;
1800         grinder->qbase[3] = qbase + 3 * qsize;
1801
1802         grinder->tccache_r++;
1803         return 1;
1804 }
1805
1806 static inline int
1807 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1808 {
1809         struct rte_sched_grinder *grinder = port->grinder + pos;
1810         uint32_t pipe_qindex;
1811         uint16_t pipe_qmask;
1812
1813         if (grinder->pcache_r < grinder->pcache_w) {
1814                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1815                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1816                 grinder->pcache_r++;
1817         } else {
1818                 uint64_t bmp_slab = 0;
1819                 uint32_t bmp_pos = 0;
1820
1821                 /* Get another non-empty pipe group */
1822                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1823                         return 0;
1824
1825 #ifdef RTE_SCHED_DEBUG
1826                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1827 #endif
1828
1829                 /* Return if pipe group already in one of the other grinders */
1830                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1831                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1832                         return 0;
1833
1834                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1835
1836                 /* Install new pipe group into grinder's pipe cache */
1837                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1838
1839                 pipe_qmask = grinder->pcache_qmask[0];
1840                 pipe_qindex = grinder->pcache_qindex[0];
1841                 grinder->pcache_r = 1;
1842         }
1843
1844         /* Install new pipe in the grinder */
1845         grinder->pindex = pipe_qindex >> 4;
1846         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1847         grinder->pipe = port->pipe + grinder->pindex;
1848         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1849         grinder->productive = 0;
1850
1851         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1852         grinder_next_tc(port, pos);
1853
1854         /* Check for pipe exhaustion */
1855         if (grinder->pindex == port->pipe_loop) {
1856                 port->pipe_exhaustion = 1;
1857                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1858         }
1859
1860         return 1;
1861 }
1862
1863
1864 static inline void
1865 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1866 {
1867         struct rte_sched_grinder *grinder = port->grinder + pos;
1868         struct rte_sched_pipe *pipe = grinder->pipe;
1869         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1870         uint32_t tc_index = grinder->tc_index;
1871         uint32_t qmask = grinder->qmask;
1872         uint32_t qindex;
1873
1874         qindex = tc_index * 4;
1875
1876         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1877         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1878         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1879         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1880
1881         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1882         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1883         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1884         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1885
1886         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1887         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1888         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1889         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1890 }
1891
1892 static inline void
1893 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1894 {
1895         struct rte_sched_grinder *grinder = port->grinder + pos;
1896         struct rte_sched_pipe *pipe = grinder->pipe;
1897         uint32_t tc_index = grinder->tc_index;
1898         uint32_t qindex;
1899
1900         qindex = tc_index * 4;
1901
1902         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1903                 >> RTE_SCHED_WRR_SHIFT;
1904         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1905                 >> RTE_SCHED_WRR_SHIFT;
1906         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1907                 >> RTE_SCHED_WRR_SHIFT;
1908         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1909                 >> RTE_SCHED_WRR_SHIFT;
1910 }
1911
1912 static inline void
1913 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1914 {
1915         struct rte_sched_grinder *grinder = port->grinder + pos;
1916         uint16_t wrr_tokens_min;
1917
1918         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1919         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1920         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1921         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1922
1923         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1924         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1925
1926         grinder->wrr_tokens[0] -= wrr_tokens_min;
1927         grinder->wrr_tokens[1] -= wrr_tokens_min;
1928         grinder->wrr_tokens[2] -= wrr_tokens_min;
1929         grinder->wrr_tokens[3] -= wrr_tokens_min;
1930 }
1931
1932
1933 #define grinder_evict(port, pos)
1934
1935 static inline void
1936 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1937 {
1938         struct rte_sched_grinder *grinder = port->grinder + pos;
1939
1940         rte_prefetch0(grinder->pipe);
1941         rte_prefetch0(grinder->queue[0]);
1942 }
1943
1944 static inline void
1945 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1946 {
1947         struct rte_sched_grinder *grinder = port->grinder + pos;
1948         uint16_t qsize, qr[4];
1949
1950         qsize = grinder->qsize;
1951         qr[0] = grinder->queue[0]->qr & (qsize - 1);
1952         qr[1] = grinder->queue[1]->qr & (qsize - 1);
1953         qr[2] = grinder->queue[2]->qr & (qsize - 1);
1954         qr[3] = grinder->queue[3]->qr & (qsize - 1);
1955
1956         rte_prefetch0(grinder->qbase[0] + qr[0]);
1957         rte_prefetch0(grinder->qbase[1] + qr[1]);
1958
1959         grinder_wrr_load(port, pos);
1960         grinder_wrr(port, pos);
1961
1962         rte_prefetch0(grinder->qbase[2] + qr[2]);
1963         rte_prefetch0(grinder->qbase[3] + qr[3]);
1964 }
1965
1966 static inline void
1967 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1968 {
1969         struct rte_sched_grinder *grinder = port->grinder + pos;
1970         uint32_t qpos = grinder->qpos;
1971         struct rte_mbuf **qbase = grinder->qbase[qpos];
1972         uint16_t qsize = grinder->qsize;
1973         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1974
1975         grinder->pkt = qbase[qr];
1976         rte_prefetch0(grinder->pkt);
1977
1978         if (unlikely((qr & 0x7) == 7)) {
1979                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1980
1981                 rte_prefetch0(qbase + qr_next);
1982         }
1983 }
1984
1985 static inline uint32_t
1986 grinder_handle(struct rte_sched_port *port, uint32_t pos)
1987 {
1988         struct rte_sched_grinder *grinder = port->grinder + pos;
1989
1990         switch (grinder->state) {
1991         case e_GRINDER_PREFETCH_PIPE:
1992         {
1993                 if (grinder_next_pipe(port, pos)) {
1994                         grinder_prefetch_pipe(port, pos);
1995                         port->busy_grinders++;
1996
1997                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
1998                         return 0;
1999                 }
2000
2001                 return 0;
2002         }
2003
2004         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2005         {
2006                 struct rte_sched_pipe *pipe = grinder->pipe;
2007
2008                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2009                 grinder_prefetch_tc_queue_arrays(port, pos);
2010                 grinder_credits_update(port, pos);
2011
2012                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2013                 return 0;
2014         }
2015
2016         case e_GRINDER_PREFETCH_MBUF:
2017         {
2018                 grinder_prefetch_mbuf(port, pos);
2019
2020                 grinder->state = e_GRINDER_READ_MBUF;
2021                 return 0;
2022         }
2023
2024         case e_GRINDER_READ_MBUF:
2025         {
2026                 uint32_t result = 0;
2027
2028                 result = grinder_schedule(port, pos);
2029
2030                 /* Look for next packet within the same TC */
2031                 if (result && grinder->qmask) {
2032                         grinder_wrr(port, pos);
2033                         grinder_prefetch_mbuf(port, pos);
2034
2035                         return 1;
2036                 }
2037                 grinder_wrr_store(port, pos);
2038
2039                 /* Look for another active TC within same pipe */
2040                 if (grinder_next_tc(port, pos)) {
2041                         grinder_prefetch_tc_queue_arrays(port, pos);
2042
2043                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2044                         return result;
2045                 }
2046
2047                 if (grinder->productive == 0 &&
2048                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2049                         port->pipe_loop = grinder->pindex;
2050
2051                 grinder_evict(port, pos);
2052
2053                 /* Look for another active pipe */
2054                 if (grinder_next_pipe(port, pos)) {
2055                         grinder_prefetch_pipe(port, pos);
2056
2057                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2058                         return result;
2059                 }
2060
2061                 /* No active pipe found */
2062                 port->busy_grinders--;
2063
2064                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2065                 return result;
2066         }
2067
2068         default:
2069                 rte_panic("Algorithmic error (invalid state)\n");
2070                 return 0;
2071         }
2072 }
2073
2074 static inline void
2075 rte_sched_port_time_resync(struct rte_sched_port *port)
2076 {
2077         uint64_t cycles = rte_get_tsc_cycles();
2078         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2079         double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2080
2081         /* Advance port time */
2082         port->time_cpu_cycles = cycles;
2083         port->time_cpu_bytes += (uint64_t) bytes_diff;
2084         if (port->time < port->time_cpu_bytes)
2085                 port->time = port->time_cpu_bytes;
2086
2087         /* Reset pipe loop detection */
2088         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2089 }
2090
2091 static inline int
2092 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2093 {
2094         int exceptions;
2095
2096         /* Check if any exception flag is set */
2097         exceptions = (second_pass && port->busy_grinders == 0) ||
2098                 (port->pipe_exhaustion == 1);
2099
2100         /* Clear exception flags */
2101         port->pipe_exhaustion = 0;
2102
2103         return exceptions;
2104 }
2105
2106 int
2107 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2108 {
2109         uint32_t i, count;
2110
2111         port->pkts_out = pkts;
2112         port->n_pkts_out = 0;
2113
2114         rte_sched_port_time_resync(port);
2115
2116         /* Take each queue in the grinder one step further */
2117         for (i = 0, count = 0; ; i++)  {
2118                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2119                 if ((count == n_pkts) ||
2120                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2121                         break;
2122                 }
2123         }
2124
2125         return count;
2126 }