1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
8 #include <rte_common.h>
10 #include <rte_memory.h>
11 #include <rte_malloc.h>
12 #include <rte_cycles.h>
13 #include <rte_prefetch.h>
14 #include <rte_branch_prediction.h>
16 #include <rte_bitmap.h>
17 #include <rte_reciprocal.h>
19 #include "rte_sched.h"
20 #include "rte_sched_common.h"
21 #include "rte_approx.h"
23 #ifdef __INTEL_COMPILER
24 #pragma warning(disable:2259) /* conversion may lose significant bits */
27 #ifdef RTE_SCHED_VECTOR
31 #define SCHED_VECTOR_SSE4
32 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
33 #define SCHED_VECTOR_NEON
38 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
39 #define RTE_SCHED_WRR_SHIFT 3
40 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
41 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
42 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
44 /* Scaling for cycles_per_byte calculation
45 * Chosen so that minimum rate is 480 bit/sec
47 #define RTE_SCHED_TIME_SHIFT 8
49 struct rte_sched_subport {
50 /* Token bucket (TB) */
51 uint64_t tb_time; /* time of last update */
53 uint32_t tb_credits_per_period;
57 /* Traffic classes (TCs) */
58 uint64_t tc_time; /* time of next update */
59 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
60 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
63 /* TC oversubscription */
65 uint32_t tc_ov_wm_min;
66 uint32_t tc_ov_wm_max;
67 uint8_t tc_ov_period_id;
73 struct rte_sched_subport_stats stats;
76 struct rte_sched_pipe_profile {
77 /* Token bucket (TB) */
79 uint32_t tb_credits_per_period;
82 /* Pipe traffic classes */
84 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
88 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
91 struct rte_sched_pipe {
92 /* Token bucket (TB) */
93 uint64_t tb_time; /* time of last update */
96 /* Pipe profile and flags */
99 /* Traffic classes (TCs) */
100 uint64_t tc_time; /* time of next update */
101 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
103 /* Weighted Round Robin (WRR) */
104 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
106 /* TC oversubscription */
107 uint32_t tc_ov_credits;
108 uint8_t tc_ov_period_id;
110 } __rte_cache_aligned;
112 struct rte_sched_queue {
117 struct rte_sched_queue_extra {
118 struct rte_sched_queue_stats stats;
125 e_GRINDER_PREFETCH_PIPE = 0,
126 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
127 e_GRINDER_PREFETCH_MBUF,
131 struct rte_sched_grinder {
133 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
134 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
139 enum grinder_state state;
142 struct rte_sched_subport *subport;
143 struct rte_sched_pipe *pipe;
144 struct rte_sched_pipe_profile *pipe_params;
147 uint8_t tccache_qmask[4];
148 uint32_t tccache_qindex[4];
154 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
155 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
156 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
160 struct rte_mbuf *pkt;
163 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
164 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
165 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
168 struct rte_sched_port {
169 /* User parameters */
170 uint32_t n_subports_per_port;
171 uint32_t n_pipes_per_subport;
172 uint32_t n_pipes_per_subport_log2;
175 uint32_t frame_overhead;
176 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
177 uint32_t n_pipe_profiles;
178 uint32_t pipe_tc3_rate_max;
180 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
184 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
185 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
186 uint64_t time; /* Current NIC TX time measured in bytes */
187 struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
189 /* Scheduling loop detection */
191 uint32_t pipe_exhaustion;
194 struct rte_bitmap *bmp;
195 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
198 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
199 uint32_t busy_grinders;
200 struct rte_mbuf **pkts_out;
203 /* Queue base calculation */
204 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
207 /* Large data structures */
208 struct rte_sched_subport *subport;
209 struct rte_sched_pipe *pipe;
210 struct rte_sched_queue *queue;
211 struct rte_sched_queue_extra *queue_extra;
212 struct rte_sched_pipe_profile *pipe_profiles;
214 struct rte_mbuf **queue_array;
215 uint8_t memory[0] __rte_cache_aligned;
216 } __rte_cache_aligned;
218 enum rte_sched_port_array {
219 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
220 e_RTE_SCHED_PORT_ARRAY_PIPE,
221 e_RTE_SCHED_PORT_ARRAY_QUEUE,
222 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
223 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
224 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
225 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
226 e_RTE_SCHED_PORT_ARRAY_TOTAL,
229 #ifdef RTE_SCHED_COLLECT_STATS
231 static inline uint32_t
232 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
234 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
239 static inline uint32_t
240 rte_sched_port_queues_per_port(struct rte_sched_port *port)
242 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
245 static inline struct rte_mbuf **
246 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
248 uint32_t pindex = qindex >> 4;
249 uint32_t qpos = qindex & 0xF;
251 return (port->queue_array + pindex *
252 port->qsize_sum + port->qsize_add[qpos]);
255 static inline uint16_t
256 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
258 uint32_t tc = (qindex >> 2) & 0x3;
260 return port->qsize[tc];
264 pipe_profile_check(struct rte_sched_pipe_params *params,
269 /* Pipe parameters */
273 /* TB rate: non-zero, not greater than port rate */
274 if (params->tb_rate == 0 ||
275 params->tb_rate > rate)
278 /* TB size: non-zero */
279 if (params->tb_size == 0)
282 /* TC rate: non-zero, less than pipe rate */
283 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
284 if (params->tc_rate[i] == 0 ||
285 params->tc_rate[i] > params->tb_rate)
289 /* TC period: non-zero */
290 if (params->tc_period == 0)
293 #ifdef RTE_SCHED_SUBPORT_TC_OV
294 /* TC3 oversubscription weight: non-zero */
295 if (params->tc_ov_weight == 0)
299 /* Queue WRR weights: non-zero */
300 for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
301 if (params->wrr_weights[i] == 0)
309 rte_sched_port_check_params(struct rte_sched_port_params *params)
317 if (params->socket < 0)
321 if (params->rate == 0)
325 if (params->mtu == 0)
328 /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
329 if (params->n_subports_per_port == 0 ||
330 params->n_subports_per_port > 1u << 16 ||
331 !rte_is_power_of_2(params->n_subports_per_port))
334 /* n_pipes_per_subport: non-zero, power of 2 */
335 if (params->n_pipes_per_subport == 0 ||
336 !rte_is_power_of_2(params->n_pipes_per_subport))
339 /* qsize: non-zero, power of 2,
340 * no bigger than 32K (due to 16-bit read/write pointers)
342 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
343 uint16_t qsize = params->qsize[i];
345 if (qsize == 0 || !rte_is_power_of_2(qsize))
349 /* pipe_profiles and n_pipe_profiles */
350 if (params->pipe_profiles == NULL ||
351 params->n_pipe_profiles == 0 ||
352 params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
355 for (i = 0; i < params->n_pipe_profiles; i++) {
356 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
359 status = pipe_profile_check(p, params->rate);
368 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
370 uint32_t n_subports_per_port = params->n_subports_per_port;
371 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
372 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
373 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
375 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
376 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
377 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
378 uint32_t size_queue_extra
379 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
380 uint32_t size_pipe_profiles
381 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
382 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
383 uint32_t size_per_pipe_queue_array, size_queue_array;
387 size_per_pipe_queue_array = 0;
388 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
389 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
390 * params->qsize[i] * sizeof(struct rte_mbuf *);
392 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
396 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
398 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
400 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
402 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
404 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
406 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
408 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
410 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
412 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
414 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
416 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
418 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
420 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
422 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
428 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
430 uint32_t size0, size1;
433 status = rte_sched_port_check_params(params);
435 RTE_LOG(NOTICE, SCHED,
436 "Port scheduler params check failed (%d)\n", status);
441 size0 = sizeof(struct rte_sched_port);
442 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
444 return size0 + size1;
448 rte_sched_port_config_qsize(struct rte_sched_port *port)
451 port->qsize_add[0] = 0;
452 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
453 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
454 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
457 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
458 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
459 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
460 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
463 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
464 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
465 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
466 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
469 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
470 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
471 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
472 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
474 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
478 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
480 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
482 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
483 " Token bucket: period = %u, credits per period = %u, size = %u\n"
484 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
485 " Traffic class 3 oversubscription: weight = %hhu\n"
486 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
491 p->tb_credits_per_period,
494 /* Traffic classes */
496 p->tc_credits_per_period[0],
497 p->tc_credits_per_period[1],
498 p->tc_credits_per_period[2],
499 p->tc_credits_per_period[3],
501 /* Traffic class 3 oversubscription */
505 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
506 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
507 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
508 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
511 static inline uint64_t
512 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
514 uint64_t time = time_ms;
516 time = (time * rate) / 1000;
522 rte_sched_pipe_profile_convert(struct rte_sched_pipe_params *src,
523 struct rte_sched_pipe_profile *dst,
529 if (src->tb_rate == rate) {
530 dst->tb_credits_per_period = 1;
533 double tb_rate = (double) src->tb_rate
535 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
537 rte_approx(tb_rate, d,
538 &dst->tb_credits_per_period, &dst->tb_period);
541 dst->tb_size = src->tb_size;
543 /* Traffic Classes */
544 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
547 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
548 dst->tc_credits_per_period[i]
549 = rte_sched_time_ms_to_bytes(src->tc_period,
552 #ifdef RTE_SCHED_SUBPORT_TC_OV
553 dst->tc_ov_weight = src->tc_ov_weight;
557 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
558 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
559 uint32_t lcd, lcd1, lcd2;
562 qindex = i * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
564 wrr_cost[0] = src->wrr_weights[qindex];
565 wrr_cost[1] = src->wrr_weights[qindex + 1];
566 wrr_cost[2] = src->wrr_weights[qindex + 2];
567 wrr_cost[3] = src->wrr_weights[qindex + 3];
569 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
570 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
571 lcd = rte_get_lcd(lcd1, lcd2);
573 wrr_cost[0] = lcd / wrr_cost[0];
574 wrr_cost[1] = lcd / wrr_cost[1];
575 wrr_cost[2] = lcd / wrr_cost[2];
576 wrr_cost[3] = lcd / wrr_cost[3];
578 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
579 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
580 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
581 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
586 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port,
587 struct rte_sched_port_params *params)
591 for (i = 0; i < port->n_pipe_profiles; i++) {
592 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
593 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
595 rte_sched_pipe_profile_convert(src, dst, params->rate);
596 rte_sched_port_log_pipe_profile(port, i);
599 port->pipe_tc3_rate_max = 0;
600 for (i = 0; i < port->n_pipe_profiles; i++) {
601 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
602 uint32_t pipe_tc3_rate = src->tc_rate[3];
604 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
605 port->pipe_tc3_rate_max = pipe_tc3_rate;
609 struct rte_sched_port *
610 rte_sched_port_config(struct rte_sched_port_params *params)
612 struct rte_sched_port *port = NULL;
613 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
615 /* Check user parameters. Determine the amount of memory to allocate */
616 mem_size = rte_sched_port_get_memory_footprint(params);
620 /* Allocate memory to store the data structures */
621 port = rte_zmalloc_socket("qos_params", mem_size, RTE_CACHE_LINE_SIZE,
626 /* compile time checks */
627 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
628 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
630 /* User parameters */
631 port->n_subports_per_port = params->n_subports_per_port;
632 port->n_pipes_per_subport = params->n_pipes_per_subport;
633 port->n_pipes_per_subport_log2 =
634 __builtin_ctz(params->n_pipes_per_subport);
635 port->rate = params->rate;
636 port->mtu = params->mtu + params->frame_overhead;
637 port->frame_overhead = params->frame_overhead;
638 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
639 port->n_pipe_profiles = params->n_pipe_profiles;
642 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
645 for (j = 0; j < e_RTE_METER_COLORS; j++) {
646 /* if min/max are both zero, then RED is disabled */
647 if ((params->red_params[i][j].min_th |
648 params->red_params[i][j].max_th) == 0) {
652 if (rte_red_config_init(&port->red_config[i][j],
653 params->red_params[i][j].wq_log2,
654 params->red_params[i][j].min_th,
655 params->red_params[i][j].max_th,
656 params->red_params[i][j].maxp_inv) != 0) {
664 port->time_cpu_cycles = rte_get_tsc_cycles();
665 port->time_cpu_bytes = 0;
668 cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
670 port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
672 /* Scheduling loop detection */
673 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
674 port->pipe_exhaustion = 0;
677 port->busy_grinders = 0;
678 port->pkts_out = NULL;
679 port->n_pkts_out = 0;
681 /* Queue base calculation */
682 rte_sched_port_config_qsize(port);
684 /* Large data structures */
685 port->subport = (struct rte_sched_subport *)
686 (port->memory + rte_sched_port_get_array_base(params,
687 e_RTE_SCHED_PORT_ARRAY_SUBPORT));
688 port->pipe = (struct rte_sched_pipe *)
689 (port->memory + rte_sched_port_get_array_base(params,
690 e_RTE_SCHED_PORT_ARRAY_PIPE));
691 port->queue = (struct rte_sched_queue *)
692 (port->memory + rte_sched_port_get_array_base(params,
693 e_RTE_SCHED_PORT_ARRAY_QUEUE));
694 port->queue_extra = (struct rte_sched_queue_extra *)
695 (port->memory + rte_sched_port_get_array_base(params,
696 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
697 port->pipe_profiles = (struct rte_sched_pipe_profile *)
698 (port->memory + rte_sched_port_get_array_base(params,
699 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
700 port->bmp_array = port->memory
701 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
702 port->queue_array = (struct rte_mbuf **)
703 (port->memory + rte_sched_port_get_array_base(params,
704 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
706 /* Pipe profile table */
707 rte_sched_port_config_pipe_profile_table(port, params);
710 n_queues_per_port = rte_sched_port_queues_per_port(port);
711 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
712 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
714 if (port->bmp == NULL) {
715 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
719 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
720 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
727 rte_sched_port_free(struct rte_sched_port *port)
730 uint32_t n_queues_per_port;
732 /* Check user parameters */
736 n_queues_per_port = rte_sched_port_queues_per_port(port);
738 /* Free enqueued mbufs */
739 for (qindex = 0; qindex < n_queues_per_port; qindex++) {
740 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
741 uint16_t qsize = rte_sched_port_qsize(port, qindex);
742 struct rte_sched_queue *queue = port->queue + qindex;
743 uint16_t qr = queue->qr & (qsize - 1);
744 uint16_t qw = queue->qw & (qsize - 1);
746 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
747 rte_pktmbuf_free(mbufs[qr]);
750 rte_bitmap_free(port->bmp);
755 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
757 struct rte_sched_subport *s = port->subport + i;
759 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
760 " Token bucket: period = %u, credits per period = %u, size = %u\n"
761 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
762 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
767 s->tb_credits_per_period,
770 /* Traffic classes */
772 s->tc_credits_per_period[0],
773 s->tc_credits_per_period[1],
774 s->tc_credits_per_period[2],
775 s->tc_credits_per_period[3],
777 /* Traffic class 3 oversubscription */
783 rte_sched_subport_config(struct rte_sched_port *port,
785 struct rte_sched_subport_params *params)
787 struct rte_sched_subport *s;
790 /* Check user parameters */
792 subport_id >= port->n_subports_per_port ||
796 if (params->tb_rate == 0 || params->tb_rate > port->rate)
799 if (params->tb_size == 0)
802 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
803 if (params->tc_rate[i] == 0 ||
804 params->tc_rate[i] > params->tb_rate)
808 if (params->tc_period == 0)
811 s = port->subport + subport_id;
813 /* Token Bucket (TB) */
814 if (params->tb_rate == port->rate) {
815 s->tb_credits_per_period = 1;
818 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
819 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
821 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
824 s->tb_size = params->tb_size;
825 s->tb_time = port->time;
826 s->tb_credits = s->tb_size / 2;
828 /* Traffic Classes (TCs) */
829 s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
830 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
831 s->tc_credits_per_period[i]
832 = rte_sched_time_ms_to_bytes(params->tc_period,
835 s->tc_time = port->time + s->tc_period;
836 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
837 s->tc_credits[i] = s->tc_credits_per_period[i];
839 #ifdef RTE_SCHED_SUBPORT_TC_OV
840 /* TC oversubscription */
841 s->tc_ov_wm_min = port->mtu;
842 s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
843 port->pipe_tc3_rate_max);
844 s->tc_ov_wm = s->tc_ov_wm_max;
845 s->tc_ov_period_id = 0;
851 rte_sched_port_log_subport_config(port, subport_id);
857 rte_sched_pipe_config(struct rte_sched_port *port,
860 int32_t pipe_profile)
862 struct rte_sched_subport *s;
863 struct rte_sched_pipe *p;
864 struct rte_sched_pipe_profile *params;
865 uint32_t deactivate, profile, i;
867 /* Check user parameters */
868 profile = (uint32_t) pipe_profile;
869 deactivate = (pipe_profile < 0);
872 subport_id >= port->n_subports_per_port ||
873 pipe_id >= port->n_pipes_per_subport ||
874 (!deactivate && profile >= port->n_pipe_profiles))
878 /* Check that subport configuration is valid */
879 s = port->subport + subport_id;
880 if (s->tb_period == 0)
883 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
885 /* Handle the case when pipe already has a valid configuration */
887 params = port->pipe_profiles + p->profile;
889 #ifdef RTE_SCHED_SUBPORT_TC_OV
890 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
891 / (double) s->tc_period;
892 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
893 / (double) params->tc_period;
894 uint32_t tc3_ov = s->tc_ov;
896 /* Unplug pipe from its subport */
897 s->tc_ov_n -= params->tc_ov_weight;
898 s->tc_ov_rate -= pipe_tc3_rate;
899 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
901 if (s->tc_ov != tc3_ov) {
902 RTE_LOG(DEBUG, SCHED,
903 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
904 subport_id, subport_tc3_rate, s->tc_ov_rate);
909 memset(p, 0, sizeof(struct rte_sched_pipe));
915 /* Apply the new pipe configuration */
916 p->profile = profile;
917 params = port->pipe_profiles + p->profile;
919 /* Token Bucket (TB) */
920 p->tb_time = port->time;
921 p->tb_credits = params->tb_size / 2;
923 /* Traffic Classes (TCs) */
924 p->tc_time = port->time + params->tc_period;
925 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
926 p->tc_credits[i] = params->tc_credits_per_period[i];
928 #ifdef RTE_SCHED_SUBPORT_TC_OV
930 /* Subport TC3 oversubscription */
931 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
932 / (double) s->tc_period;
933 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
934 / (double) params->tc_period;
935 uint32_t tc3_ov = s->tc_ov;
937 s->tc_ov_n += params->tc_ov_weight;
938 s->tc_ov_rate += pipe_tc3_rate;
939 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
941 if (s->tc_ov != tc3_ov) {
942 RTE_LOG(DEBUG, SCHED,
943 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
944 subport_id, subport_tc3_rate, s->tc_ov_rate);
946 p->tc_ov_period_id = s->tc_ov_period_id;
947 p->tc_ov_credits = s->tc_ov_wm;
954 int __rte_experimental
955 rte_sched_port_pipe_profile_add(struct rte_sched_port *port,
956 struct rte_sched_pipe_params *params,
957 uint32_t *pipe_profile_id)
959 struct rte_sched_pipe_profile *pp;
967 /* Pipe profiles not exceeds the max limit */
968 if (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)
972 status = pipe_profile_check(params, port->rate);
976 pp = &port->pipe_profiles[port->n_pipe_profiles];
977 rte_sched_pipe_profile_convert(params, pp, port->rate);
979 /* Pipe profile not exists */
980 for (i = 0; i < port->n_pipe_profiles; i++)
981 if (memcmp(port->pipe_profiles + i, pp, sizeof(*pp)) == 0)
984 /* Pipe profile commit */
985 *pipe_profile_id = port->n_pipe_profiles;
986 port->n_pipe_profiles++;
988 if (port->pipe_tc3_rate_max < params->tc_rate[3])
989 port->pipe_tc3_rate_max = params->tc_rate[3];
991 rte_sched_port_log_pipe_profile(port, *pipe_profile_id);
996 static inline uint32_t
997 rte_sched_port_qindex(struct rte_sched_port *port,
1000 uint32_t traffic_class,
1003 return ((subport & (port->n_subports_per_port - 1)) <<
1004 (port->n_pipes_per_subport_log2 + 4)) |
1005 ((pipe & (port->n_pipes_per_subport - 1)) << 4) |
1007 (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1)) << 2) |
1008 (queue & (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1));
1012 rte_sched_port_pkt_write(struct rte_sched_port *port,
1013 struct rte_mbuf *pkt,
1014 uint32_t subport, uint32_t pipe,
1015 uint32_t traffic_class,
1016 uint32_t queue, enum rte_meter_color color)
1018 uint32_t queue_id = rte_sched_port_qindex(port, subport, pipe,
1019 traffic_class, queue);
1020 rte_mbuf_sched_set(pkt, queue_id, traffic_class, (uint8_t)color);
1024 rte_sched_port_pkt_read_tree_path(struct rte_sched_port *port,
1025 const struct rte_mbuf *pkt,
1026 uint32_t *subport, uint32_t *pipe,
1027 uint32_t *traffic_class, uint32_t *queue)
1029 uint32_t queue_id = rte_mbuf_sched_queue_get(pkt);
1031 *subport = queue_id >> (port->n_pipes_per_subport_log2 + 4);
1032 *pipe = (queue_id >> 4) & (port->n_pipes_per_subport - 1);
1033 *traffic_class = (queue_id >> 2) &
1034 (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1);
1035 *queue = queue_id & (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1);
1038 enum rte_meter_color
1039 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
1041 return (enum rte_meter_color)rte_mbuf_sched_color_get(pkt);
1045 rte_sched_subport_read_stats(struct rte_sched_port *port,
1046 uint32_t subport_id,
1047 struct rte_sched_subport_stats *stats,
1050 struct rte_sched_subport *s;
1052 /* Check user parameters */
1053 if (port == NULL || subport_id >= port->n_subports_per_port ||
1054 stats == NULL || tc_ov == NULL)
1057 s = port->subport + subport_id;
1059 /* Copy subport stats and clear */
1060 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1061 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1063 /* Subport TC oversubscription status */
1070 rte_sched_queue_read_stats(struct rte_sched_port *port,
1072 struct rte_sched_queue_stats *stats,
1075 struct rte_sched_queue *q;
1076 struct rte_sched_queue_extra *qe;
1078 /* Check user parameters */
1079 if ((port == NULL) ||
1080 (queue_id >= rte_sched_port_queues_per_port(port)) ||
1085 q = port->queue + queue_id;
1086 qe = port->queue_extra + queue_id;
1088 /* Copy queue stats and clear */
1089 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1090 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1093 *qlen = q->qw - q->qr;
1098 #ifdef RTE_SCHED_DEBUG
1101 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1103 struct rte_sched_queue *queue = port->queue + qindex;
1105 return queue->qr == queue->qw;
1108 #endif /* RTE_SCHED_DEBUG */
1110 #ifdef RTE_SCHED_COLLECT_STATS
1113 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1115 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1116 uint32_t tc_index = (qindex >> 2) & 0x3;
1117 uint32_t pkt_len = pkt->pkt_len;
1119 s->stats.n_pkts_tc[tc_index] += 1;
1120 s->stats.n_bytes_tc[tc_index] += pkt_len;
1123 #ifdef RTE_SCHED_RED
1125 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1127 struct rte_mbuf *pkt, uint32_t red)
1130 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1132 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1135 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1136 uint32_t tc_index = (qindex >> 2) & 0x3;
1137 uint32_t pkt_len = pkt->pkt_len;
1139 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1140 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1141 #ifdef RTE_SCHED_RED
1142 s->stats.n_pkts_red_dropped[tc_index] += red;
1147 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1149 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1150 uint32_t pkt_len = pkt->pkt_len;
1152 qe->stats.n_pkts += 1;
1153 qe->stats.n_bytes += pkt_len;
1156 #ifdef RTE_SCHED_RED
1158 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1160 struct rte_mbuf *pkt, uint32_t red)
1163 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1165 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1168 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1169 uint32_t pkt_len = pkt->pkt_len;
1171 qe->stats.n_pkts_dropped += 1;
1172 qe->stats.n_bytes_dropped += pkt_len;
1173 #ifdef RTE_SCHED_RED
1174 qe->stats.n_pkts_red_dropped += red;
1178 #endif /* RTE_SCHED_COLLECT_STATS */
1180 #ifdef RTE_SCHED_RED
1183 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1185 struct rte_sched_queue_extra *qe;
1186 struct rte_red_config *red_cfg;
1187 struct rte_red *red;
1189 enum rte_meter_color color;
1191 tc_index = (qindex >> 2) & 0x3;
1192 color = rte_sched_port_pkt_read_color(pkt);
1193 red_cfg = &port->red_config[tc_index][color];
1195 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1198 qe = port->queue_extra + qindex;
1201 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1205 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1207 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1208 struct rte_red *red = &qe->red;
1210 rte_red_mark_queue_empty(red, port->time);
1215 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1217 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1219 #endif /* RTE_SCHED_RED */
1221 #ifdef RTE_SCHED_DEBUG
1224 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1231 rte_panic("Empty slab at position %u\n", bmp_pos);
1234 for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1235 if (mask & bmp_slab) {
1236 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1237 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1244 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1248 #endif /* RTE_SCHED_DEBUG */
1250 static inline uint32_t
1251 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1252 struct rte_mbuf *pkt)
1254 struct rte_sched_queue *q;
1255 #ifdef RTE_SCHED_COLLECT_STATS
1256 struct rte_sched_queue_extra *qe;
1258 uint32_t qindex = rte_mbuf_sched_queue_get(pkt);
1260 q = port->queue + qindex;
1262 #ifdef RTE_SCHED_COLLECT_STATS
1263 qe = port->queue_extra + qindex;
1271 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1272 uint32_t qindex, struct rte_mbuf **qbase)
1274 struct rte_sched_queue *q;
1275 struct rte_mbuf **q_qw;
1278 q = port->queue + qindex;
1279 qsize = rte_sched_port_qsize(port, qindex);
1280 q_qw = qbase + (q->qw & (qsize - 1));
1282 rte_prefetch0(q_qw);
1283 rte_bitmap_prefetch0(port->bmp, qindex);
1287 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1288 struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1290 struct rte_sched_queue *q;
1294 q = port->queue + qindex;
1295 qsize = rte_sched_port_qsize(port, qindex);
1296 qlen = q->qw - q->qr;
1298 /* Drop the packet (and update drop stats) when queue is full */
1299 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1301 rte_pktmbuf_free(pkt);
1302 #ifdef RTE_SCHED_COLLECT_STATS
1303 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1305 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1311 /* Enqueue packet */
1312 qbase[q->qw & (qsize - 1)] = pkt;
1315 /* Activate queue in the port bitmap */
1316 rte_bitmap_set(port->bmp, qindex);
1319 #ifdef RTE_SCHED_COLLECT_STATS
1320 rte_sched_port_update_subport_stats(port, qindex, pkt);
1321 rte_sched_port_update_queue_stats(port, qindex, pkt);
1329 * The enqueue function implements a 4-level pipeline with each stage
1330 * processing two different packets. The purpose of using a pipeline
1331 * is to hide the latency of prefetching the data structures. The
1332 * naming convention is presented in the diagram below:
1334 * p00 _______ p10 _______ p20 _______ p30 _______
1335 * ----->| |----->| |----->| |----->| |----->
1336 * | 0 | | 1 | | 2 | | 3 |
1337 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1342 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1345 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1346 *pkt30, *pkt31, *pkt_last;
1347 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1348 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1349 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1350 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1356 * Less then 6 input packets available, which is not enough to
1359 if (unlikely(n_pkts < 6)) {
1360 struct rte_mbuf **q_base[5];
1363 /* Prefetch the mbuf structure of each packet */
1364 for (i = 0; i < n_pkts; i++)
1365 rte_prefetch0(pkts[i]);
1367 /* Prefetch the queue structure for each queue */
1368 for (i = 0; i < n_pkts; i++)
1369 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1372 /* Prefetch the write pointer location of each queue */
1373 for (i = 0; i < n_pkts; i++) {
1374 q_base[i] = rte_sched_port_qbase(port, q[i]);
1375 rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1379 /* Write each packet to its queue */
1380 for (i = 0; i < n_pkts; i++)
1381 result += rte_sched_port_enqueue_qwa(port, q[i],
1382 q_base[i], pkts[i]);
1387 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1390 rte_prefetch0(pkt20);
1391 rte_prefetch0(pkt21);
1395 rte_prefetch0(pkt10);
1396 rte_prefetch0(pkt11);
1398 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1399 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1403 rte_prefetch0(pkt00);
1404 rte_prefetch0(pkt01);
1406 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1407 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1409 q20_base = rte_sched_port_qbase(port, q20);
1410 q21_base = rte_sched_port_qbase(port, q21);
1411 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1412 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1414 /* Run the pipeline */
1415 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1416 /* Propagate stage inputs */
1427 q30_base = q20_base;
1428 q31_base = q21_base;
1430 /* Stage 0: Get packets in */
1432 pkt01 = pkts[i + 1];
1433 rte_prefetch0(pkt00);
1434 rte_prefetch0(pkt01);
1436 /* Stage 1: Prefetch queue structure storing queue pointers */
1437 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1438 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1440 /* Stage 2: Prefetch queue write location */
1441 q20_base = rte_sched_port_qbase(port, q20);
1442 q21_base = rte_sched_port_qbase(port, q21);
1443 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1444 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1446 /* Stage 3: Write packet to queue and activate queue */
1447 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1448 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1449 result += r30 + r31;
1453 * Drain the pipeline (exactly 6 packets).
1454 * Handle the last packet in the case
1455 * of an odd number of input packets.
1457 pkt_last = pkts[n_pkts - 1];
1458 rte_prefetch0(pkt_last);
1460 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1461 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1463 q10_base = rte_sched_port_qbase(port, q10);
1464 q11_base = rte_sched_port_qbase(port, q11);
1465 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1466 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1468 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1469 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1470 result += r20 + r21;
1472 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1474 q00_base = rte_sched_port_qbase(port, q00);
1475 q01_base = rte_sched_port_qbase(port, q01);
1476 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1477 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1479 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1480 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1481 result += r10 + r11;
1483 q_last_base = rte_sched_port_qbase(port, q_last);
1484 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1486 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1487 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1488 result += r00 + r01;
1491 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1498 #ifndef RTE_SCHED_SUBPORT_TC_OV
1501 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1503 struct rte_sched_grinder *grinder = port->grinder + pos;
1504 struct rte_sched_subport *subport = grinder->subport;
1505 struct rte_sched_pipe *pipe = grinder->pipe;
1506 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1510 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1511 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1512 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1513 subport->tb_time += n_periods * subport->tb_period;
1516 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1517 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1518 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1519 pipe->tb_time += n_periods * params->tb_period;
1522 if (unlikely(port->time >= subport->tc_time)) {
1523 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1524 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1525 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1526 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1527 subport->tc_time = port->time + subport->tc_period;
1531 if (unlikely(port->time >= pipe->tc_time)) {
1532 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1533 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1534 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1535 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1536 pipe->tc_time = port->time + params->tc_period;
1542 static inline uint32_t
1543 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1545 struct rte_sched_grinder *grinder = port->grinder + pos;
1546 struct rte_sched_subport *subport = grinder->subport;
1547 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1548 uint32_t tc_ov_consumption_max;
1549 uint32_t tc_ov_wm = subport->tc_ov_wm;
1551 if (subport->tc_ov == 0)
1552 return subport->tc_ov_wm_max;
1554 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1555 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1556 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1557 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1559 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1560 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1562 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1563 tc_ov_wm -= tc_ov_wm >> 7;
1564 if (tc_ov_wm < subport->tc_ov_wm_min)
1565 tc_ov_wm = subport->tc_ov_wm_min;
1570 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1571 if (tc_ov_wm > subport->tc_ov_wm_max)
1572 tc_ov_wm = subport->tc_ov_wm_max;
1578 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1580 struct rte_sched_grinder *grinder = port->grinder + pos;
1581 struct rte_sched_subport *subport = grinder->subport;
1582 struct rte_sched_pipe *pipe = grinder->pipe;
1583 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1587 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1588 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1589 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1590 subport->tb_time += n_periods * subport->tb_period;
1593 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1594 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1595 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1596 pipe->tb_time += n_periods * params->tb_period;
1599 if (unlikely(port->time >= subport->tc_time)) {
1600 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1602 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1603 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1604 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1605 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1607 subport->tc_time = port->time + subport->tc_period;
1608 subport->tc_ov_period_id++;
1612 if (unlikely(port->time >= pipe->tc_time)) {
1613 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1614 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1615 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1616 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1617 pipe->tc_time = port->time + params->tc_period;
1620 /* Pipe TCs - Oversubscription */
1621 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1622 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1624 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1628 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1631 #ifndef RTE_SCHED_SUBPORT_TC_OV
1634 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1636 struct rte_sched_grinder *grinder = port->grinder + pos;
1637 struct rte_sched_subport *subport = grinder->subport;
1638 struct rte_sched_pipe *pipe = grinder->pipe;
1639 struct rte_mbuf *pkt = grinder->pkt;
1640 uint32_t tc_index = grinder->tc_index;
1641 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1642 uint32_t subport_tb_credits = subport->tb_credits;
1643 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1644 uint32_t pipe_tb_credits = pipe->tb_credits;
1645 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1648 /* Check queue credits */
1649 enough_credits = (pkt_len <= subport_tb_credits) &&
1650 (pkt_len <= subport_tc_credits) &&
1651 (pkt_len <= pipe_tb_credits) &&
1652 (pkt_len <= pipe_tc_credits);
1654 if (!enough_credits)
1657 /* Update port credits */
1658 subport->tb_credits -= pkt_len;
1659 subport->tc_credits[tc_index] -= pkt_len;
1660 pipe->tb_credits -= pkt_len;
1661 pipe->tc_credits[tc_index] -= pkt_len;
1669 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1671 struct rte_sched_grinder *grinder = port->grinder + pos;
1672 struct rte_sched_subport *subport = grinder->subport;
1673 struct rte_sched_pipe *pipe = grinder->pipe;
1674 struct rte_mbuf *pkt = grinder->pkt;
1675 uint32_t tc_index = grinder->tc_index;
1676 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1677 uint32_t subport_tb_credits = subport->tb_credits;
1678 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1679 uint32_t pipe_tb_credits = pipe->tb_credits;
1680 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1681 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1682 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1683 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1686 /* Check pipe and subport credits */
1687 enough_credits = (pkt_len <= subport_tb_credits) &&
1688 (pkt_len <= subport_tc_credits) &&
1689 (pkt_len <= pipe_tb_credits) &&
1690 (pkt_len <= pipe_tc_credits) &&
1691 (pkt_len <= pipe_tc_ov_credits);
1693 if (!enough_credits)
1696 /* Update pipe and subport credits */
1697 subport->tb_credits -= pkt_len;
1698 subport->tc_credits[tc_index] -= pkt_len;
1699 pipe->tb_credits -= pkt_len;
1700 pipe->tc_credits[tc_index] -= pkt_len;
1701 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1706 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1710 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1712 struct rte_sched_grinder *grinder = port->grinder + pos;
1713 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1714 struct rte_mbuf *pkt = grinder->pkt;
1715 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1717 if (!grinder_credits_check(port, pos))
1720 /* Advance port time */
1721 port->time += pkt_len;
1724 port->pkts_out[port->n_pkts_out++] = pkt;
1726 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1727 if (queue->qr == queue->qw) {
1728 uint32_t qindex = grinder->qindex[grinder->qpos];
1730 rte_bitmap_clear(port->bmp, qindex);
1731 grinder->qmask &= ~(1 << grinder->qpos);
1732 grinder->wrr_mask[grinder->qpos] = 0;
1733 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1736 /* Reset pipe loop detection */
1737 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1738 grinder->productive = 1;
1743 #ifdef SCHED_VECTOR_SSE4
1746 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1748 __m128i index = _mm_set1_epi32(base_pipe);
1749 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1750 __m128i res = _mm_cmpeq_epi32(pipes, index);
1752 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1753 pipes = _mm_cmpeq_epi32(pipes, index);
1754 res = _mm_or_si128(res, pipes);
1756 if (_mm_testz_si128(res, res))
1762 #elif defined(SCHED_VECTOR_NEON)
1765 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1767 uint32x4_t index, pipes;
1768 uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1770 index = vmovq_n_u32(base_pipe);
1771 pipes = vld1q_u32(pos);
1772 if (!vminvq_u32(veorq_u32(pipes, index)))
1775 pipes = vld1q_u32(pos + 4);
1776 if (!vminvq_u32(veorq_u32(pipes, index)))
1785 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1789 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1790 if (port->grinder_base_bmp_pos[i] == base_pipe)
1797 #endif /* RTE_SCHED_OPTIMIZATIONS */
1800 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1802 struct rte_sched_grinder *grinder = port->grinder + pos;
1805 grinder->pcache_w = 0;
1806 grinder->pcache_r = 0;
1808 w[0] = (uint16_t) bmp_slab;
1809 w[1] = (uint16_t) (bmp_slab >> 16);
1810 w[2] = (uint16_t) (bmp_slab >> 32);
1811 w[3] = (uint16_t) (bmp_slab >> 48);
1813 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1814 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1815 grinder->pcache_w += (w[0] != 0);
1817 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1818 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1819 grinder->pcache_w += (w[1] != 0);
1821 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1822 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1823 grinder->pcache_w += (w[2] != 0);
1825 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1826 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1827 grinder->pcache_w += (w[3] != 0);
1831 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1833 struct rte_sched_grinder *grinder = port->grinder + pos;
1836 grinder->tccache_w = 0;
1837 grinder->tccache_r = 0;
1839 b[0] = (uint8_t) (qmask & 0xF);
1840 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1841 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1842 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1844 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1845 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1846 grinder->tccache_w += (b[0] != 0);
1848 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1849 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1850 grinder->tccache_w += (b[1] != 0);
1852 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1853 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1854 grinder->tccache_w += (b[2] != 0);
1856 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1857 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1858 grinder->tccache_w += (b[3] != 0);
1862 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1864 struct rte_sched_grinder *grinder = port->grinder + pos;
1865 struct rte_mbuf **qbase;
1869 if (grinder->tccache_r == grinder->tccache_w)
1872 qindex = grinder->tccache_qindex[grinder->tccache_r];
1873 qbase = rte_sched_port_qbase(port, qindex);
1874 qsize = rte_sched_port_qsize(port, qindex);
1876 grinder->tc_index = (qindex >> 2) & 0x3;
1877 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1878 grinder->qsize = qsize;
1880 grinder->qindex[0] = qindex;
1881 grinder->qindex[1] = qindex + 1;
1882 grinder->qindex[2] = qindex + 2;
1883 grinder->qindex[3] = qindex + 3;
1885 grinder->queue[0] = port->queue + qindex;
1886 grinder->queue[1] = port->queue + qindex + 1;
1887 grinder->queue[2] = port->queue + qindex + 2;
1888 grinder->queue[3] = port->queue + qindex + 3;
1890 grinder->qbase[0] = qbase;
1891 grinder->qbase[1] = qbase + qsize;
1892 grinder->qbase[2] = qbase + 2 * qsize;
1893 grinder->qbase[3] = qbase + 3 * qsize;
1895 grinder->tccache_r++;
1900 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1902 struct rte_sched_grinder *grinder = port->grinder + pos;
1903 uint32_t pipe_qindex;
1904 uint16_t pipe_qmask;
1906 if (grinder->pcache_r < grinder->pcache_w) {
1907 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1908 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1909 grinder->pcache_r++;
1911 uint64_t bmp_slab = 0;
1912 uint32_t bmp_pos = 0;
1914 /* Get another non-empty pipe group */
1915 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1918 #ifdef RTE_SCHED_DEBUG
1919 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1922 /* Return if pipe group already in one of the other grinders */
1923 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1924 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1927 port->grinder_base_bmp_pos[pos] = bmp_pos;
1929 /* Install new pipe group into grinder's pipe cache */
1930 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1932 pipe_qmask = grinder->pcache_qmask[0];
1933 pipe_qindex = grinder->pcache_qindex[0];
1934 grinder->pcache_r = 1;
1937 /* Install new pipe in the grinder */
1938 grinder->pindex = pipe_qindex >> 4;
1939 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1940 grinder->pipe = port->pipe + grinder->pindex;
1941 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1942 grinder->productive = 0;
1944 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1945 grinder_next_tc(port, pos);
1947 /* Check for pipe exhaustion */
1948 if (grinder->pindex == port->pipe_loop) {
1949 port->pipe_exhaustion = 1;
1950 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1958 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1960 struct rte_sched_grinder *grinder = port->grinder + pos;
1961 struct rte_sched_pipe *pipe = grinder->pipe;
1962 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1963 uint32_t tc_index = grinder->tc_index;
1964 uint32_t qmask = grinder->qmask;
1967 qindex = tc_index * 4;
1969 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1970 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1971 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1972 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1974 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1975 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1976 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1977 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1979 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1980 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1981 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1982 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1986 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1988 struct rte_sched_grinder *grinder = port->grinder + pos;
1989 struct rte_sched_pipe *pipe = grinder->pipe;
1990 uint32_t tc_index = grinder->tc_index;
1993 qindex = tc_index * 4;
1995 pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1996 >> RTE_SCHED_WRR_SHIFT;
1997 pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1998 >> RTE_SCHED_WRR_SHIFT;
1999 pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
2000 >> RTE_SCHED_WRR_SHIFT;
2001 pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
2002 >> RTE_SCHED_WRR_SHIFT;
2006 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
2008 struct rte_sched_grinder *grinder = port->grinder + pos;
2009 uint16_t wrr_tokens_min;
2011 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
2012 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
2013 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
2014 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
2016 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
2017 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
2019 grinder->wrr_tokens[0] -= wrr_tokens_min;
2020 grinder->wrr_tokens[1] -= wrr_tokens_min;
2021 grinder->wrr_tokens[2] -= wrr_tokens_min;
2022 grinder->wrr_tokens[3] -= wrr_tokens_min;
2026 #define grinder_evict(port, pos)
2029 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2031 struct rte_sched_grinder *grinder = port->grinder + pos;
2033 rte_prefetch0(grinder->pipe);
2034 rte_prefetch0(grinder->queue[0]);
2038 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2040 struct rte_sched_grinder *grinder = port->grinder + pos;
2041 uint16_t qsize, qr[4];
2043 qsize = grinder->qsize;
2044 qr[0] = grinder->queue[0]->qr & (qsize - 1);
2045 qr[1] = grinder->queue[1]->qr & (qsize - 1);
2046 qr[2] = grinder->queue[2]->qr & (qsize - 1);
2047 qr[3] = grinder->queue[3]->qr & (qsize - 1);
2049 rte_prefetch0(grinder->qbase[0] + qr[0]);
2050 rte_prefetch0(grinder->qbase[1] + qr[1]);
2052 grinder_wrr_load(port, pos);
2053 grinder_wrr(port, pos);
2055 rte_prefetch0(grinder->qbase[2] + qr[2]);
2056 rte_prefetch0(grinder->qbase[3] + qr[3]);
2060 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2062 struct rte_sched_grinder *grinder = port->grinder + pos;
2063 uint32_t qpos = grinder->qpos;
2064 struct rte_mbuf **qbase = grinder->qbase[qpos];
2065 uint16_t qsize = grinder->qsize;
2066 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2068 grinder->pkt = qbase[qr];
2069 rte_prefetch0(grinder->pkt);
2071 if (unlikely((qr & 0x7) == 7)) {
2072 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2074 rte_prefetch0(qbase + qr_next);
2078 static inline uint32_t
2079 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2081 struct rte_sched_grinder *grinder = port->grinder + pos;
2083 switch (grinder->state) {
2084 case e_GRINDER_PREFETCH_PIPE:
2086 if (grinder_next_pipe(port, pos)) {
2087 grinder_prefetch_pipe(port, pos);
2088 port->busy_grinders++;
2090 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2097 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2099 struct rte_sched_pipe *pipe = grinder->pipe;
2101 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2102 grinder_prefetch_tc_queue_arrays(port, pos);
2103 grinder_credits_update(port, pos);
2105 grinder->state = e_GRINDER_PREFETCH_MBUF;
2109 case e_GRINDER_PREFETCH_MBUF:
2111 grinder_prefetch_mbuf(port, pos);
2113 grinder->state = e_GRINDER_READ_MBUF;
2117 case e_GRINDER_READ_MBUF:
2119 uint32_t result = 0;
2121 result = grinder_schedule(port, pos);
2123 /* Look for next packet within the same TC */
2124 if (result && grinder->qmask) {
2125 grinder_wrr(port, pos);
2126 grinder_prefetch_mbuf(port, pos);
2130 grinder_wrr_store(port, pos);
2132 /* Look for another active TC within same pipe */
2133 if (grinder_next_tc(port, pos)) {
2134 grinder_prefetch_tc_queue_arrays(port, pos);
2136 grinder->state = e_GRINDER_PREFETCH_MBUF;
2140 if (grinder->productive == 0 &&
2141 port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2142 port->pipe_loop = grinder->pindex;
2144 grinder_evict(port, pos);
2146 /* Look for another active pipe */
2147 if (grinder_next_pipe(port, pos)) {
2148 grinder_prefetch_pipe(port, pos);
2150 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2154 /* No active pipe found */
2155 port->busy_grinders--;
2157 grinder->state = e_GRINDER_PREFETCH_PIPE;
2162 rte_panic("Algorithmic error (invalid state)\n");
2168 rte_sched_port_time_resync(struct rte_sched_port *port)
2170 uint64_t cycles = rte_get_tsc_cycles();
2171 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2172 uint64_t bytes_diff;
2174 /* Compute elapsed time in bytes */
2175 bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2176 port->inv_cycles_per_byte);
2178 /* Advance port time */
2179 port->time_cpu_cycles = cycles;
2180 port->time_cpu_bytes += bytes_diff;
2181 if (port->time < port->time_cpu_bytes)
2182 port->time = port->time_cpu_bytes;
2184 /* Reset pipe loop detection */
2185 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2189 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2193 /* Check if any exception flag is set */
2194 exceptions = (second_pass && port->busy_grinders == 0) ||
2195 (port->pipe_exhaustion == 1);
2197 /* Clear exception flags */
2198 port->pipe_exhaustion = 0;
2204 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2208 port->pkts_out = pkts;
2209 port->n_pkts_out = 0;
2211 rte_sched_port_time_resync(port);
2213 /* Take each queue in the grinder one step further */
2214 for (i = 0, count = 0; ; i++) {
2215 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2216 if ((count == n_pkts) ||
2217 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {