lib/librte_sched/rte_sched.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2014 Intel Corporation
   3  */
   4
   5 #include <stdio.h>
   6 #include <string.h>
   7
   8 #include <rte_common.h>
   9 #include <rte_log.h>
  10 #include <rte_memory.h>
  11 #include <rte_malloc.h>
  12 #include <rte_cycles.h>
  13 #include <rte_prefetch.h>
  14 #include <rte_branch_prediction.h>
  15 #include <rte_mbuf.h>
  16 #include <rte_bitmap.h>
  17 #include <rte_reciprocal.h>
  18
  19 #include "rte_sched.h"
  20 #include "rte_sched_common.h"
  21 #include "rte_approx.h"
  22
  23 #ifdef __INTEL_COMPILER
  24 #pragma warning(disable:2259) /* conversion may lose significant bits */
  25 #endif
  26
  27 #ifdef RTE_SCHED_VECTOR
  28 #include <rte_vect.h>
  29
  30 #ifdef RTE_ARCH_X86
  31 #define SCHED_VECTOR_SSE4
  32 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
  33 #define SCHED_VECTOR_NEON
  34 #endif
  35
  36 #endif
  37
  38 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  39 #define RTE_SCHED_WRR_SHIFT                   3
  40 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  41 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  42 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  43
  44 /* Scaling for cycles_per_byte calculation
  45  * Chosen so that minimum rate is 480 bit/sec
  46  */
  47 #define RTE_SCHED_TIME_SHIFT                  8
  48
  49 struct rte_sched_subport {
  50         /* Token bucket (TB) */
  51         uint64_t tb_time; /* time of last update */
  52         uint32_t tb_period;
  53         uint32_t tb_credits_per_period;
  54         uint32_t tb_size;
  55         uint32_t tb_credits;
  56
  57         /* Traffic classes (TCs) */
  58         uint64_t tc_time; /* time of next update */
  59         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  60         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  61         uint32_t tc_period;
  62
  63         /* TC oversubscription */
  64         uint32_t tc_ov_wm;
  65         uint32_t tc_ov_wm_min;
  66         uint32_t tc_ov_wm_max;
  67         uint8_t tc_ov_period_id;
  68         uint8_t tc_ov;
  69         uint32_t tc_ov_n;
  70         double tc_ov_rate;
  71
  72         /* Statistics */
  73         struct rte_sched_subport_stats stats;
  74 };
  75
  76 struct rte_sched_pipe_profile {
  77         /* Token bucket (TB) */
  78         uint32_t tb_period;
  79         uint32_t tb_credits_per_period;
  80         uint32_t tb_size;
  81
  82         /* Pipe traffic classes */
  83         uint32_t tc_period;
  84         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  85         uint8_t tc_ov_weight;
  86
  87         /* Pipe queues */
  88         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
  89 };
  90
  91 struct rte_sched_pipe {
  92         /* Token bucket (TB) */
  93         uint64_t tb_time; /* time of last update */
  94         uint32_t tb_credits;
  95
  96         /* Pipe profile and flags */
  97         uint32_t profile;
  98
  99         /* Traffic classes (TCs) */
 100         uint64_t tc_time; /* time of next update */
 101         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 102
 103         /* Weighted Round Robin (WRR) */
 104         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 105
 106         /* TC oversubscription */
 107         uint32_t tc_ov_credits;
 108         uint8_t tc_ov_period_id;
 109         uint8_t reserved[3];
 110 } __rte_cache_aligned;
 111
 112 struct rte_sched_queue {
 113         uint16_t qw;
 114         uint16_t qr;
 115 };
 116
 117 struct rte_sched_queue_extra {
 118         struct rte_sched_queue_stats stats;
 119 #ifdef RTE_SCHED_RED
 120         struct rte_red red;
 121 #endif
 122 };
 123
 124 enum grinder_state {
 125         e_GRINDER_PREFETCH_PIPE = 0,
 126         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 127         e_GRINDER_PREFETCH_MBUF,
 128         e_GRINDER_READ_MBUF
 129 };
 130
 131 struct rte_sched_grinder {
 132         /* Pipe cache */
 133         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 134         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 135         uint32_t pcache_w;
 136         uint32_t pcache_r;
 137
 138         /* Current pipe */
 139         enum grinder_state state;
 140         uint32_t productive;
 141         uint32_t pindex;
 142         struct rte_sched_subport *subport;
 143         struct rte_sched_pipe *pipe;
 144         struct rte_sched_pipe_profile *pipe_params;
 145
 146         /* TC cache */
 147         uint8_t tccache_qmask[4];
 148         uint32_t tccache_qindex[4];
 149         uint32_t tccache_w;
 150         uint32_t tccache_r;
 151
 152         /* Current TC */
 153         uint32_t tc_index;
 154         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 155         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 156         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 157         uint16_t qsize;
 158         uint32_t qmask;
 159         uint32_t qpos;
 160         struct rte_mbuf *pkt;
 161
 162         /* WRR */
 163         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 164         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 165         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 166 };
 167
 168 struct rte_sched_port {
 169         /* User parameters */
 170         uint32_t n_subports_per_port;
 171         uint32_t n_pipes_per_subport;
 172         uint32_t n_pipes_per_subport_log2;
 173         uint32_t rate;
 174         uint32_t mtu;
 175         uint32_t frame_overhead;
 176         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 177         uint32_t n_pipe_profiles;
 178         uint32_t pipe_tc3_rate_max;
 179 #ifdef RTE_SCHED_RED
 180         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 181 #endif
 182
 183         /* Timing */
 184         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 185         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 186         uint64_t time;                /* Current NIC TX time measured in bytes */
 187         struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
 188
 189         /* Scheduling loop detection */
 190         uint32_t pipe_loop;
 191         uint32_t pipe_exhaustion;
 192
 193         /* Bitmap */
 194         struct rte_bitmap *bmp;
 195         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 196
 197         /* Grinders */
 198         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 199         uint32_t busy_grinders;
 200         struct rte_mbuf **pkts_out;
 201         uint32_t n_pkts_out;
 202
 203         /* Queue base calculation */
 204         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 205         uint32_t qsize_sum;
 206
 207         /* Large data structures */
 208         struct rte_sched_subport *subport;
 209         struct rte_sched_pipe *pipe;
 210         struct rte_sched_queue *queue;
 211         struct rte_sched_queue_extra *queue_extra;
 212         struct rte_sched_pipe_profile *pipe_profiles;
 213         uint8_t *bmp_array;
 214         struct rte_mbuf **queue_array;
 215         uint8_t memory[0] __rte_cache_aligned;
 216 } __rte_cache_aligned;
 217
 218 enum rte_sched_port_array {
 219         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 220         e_RTE_SCHED_PORT_ARRAY_PIPE,
 221         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 222         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 223         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 224         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 225         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 226         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 227 };
 228
 229 #ifdef RTE_SCHED_COLLECT_STATS
 230
 231 static inline uint32_t
 232 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 233 {
 234         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 235 }
 236
 237 #endif
 238
 239 static inline uint32_t
 240 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 241 {
 242         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 243 }
 244
 245 static inline struct rte_mbuf **
 246 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 247 {
 248         uint32_t pindex = qindex >> 4;
 249         uint32_t qpos = qindex & 0xF;
 250
 251         return (port->queue_array + pindex *
 252                 port->qsize_sum + port->qsize_add[qpos]);
 253 }
 254
 255 static inline uint16_t
 256 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 257 {
 258         uint32_t tc = (qindex >> 2) & 0x3;
 259
 260         return port->qsize[tc];
 261 }
 262
 263 static int
 264 pipe_profile_check(struct rte_sched_pipe_params *params,
 265         uint32_t rate)
 266 {
 267         uint32_t i;
 268
 269         /* Pipe parameters */
 270         if (params == NULL)
 271                 return -10;
 272
 273         /* TB rate: non-zero, not greater than port rate */
 274         if (params->tb_rate == 0 ||
 275                 params->tb_rate > rate)
 276                 return -11;
 277
 278         /* TB size: non-zero */
 279         if (params->tb_size == 0)
 280                 return -12;
 281
 282         /* TC rate: non-zero, less than pipe rate */
 283         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 284                 if (params->tc_rate[i] == 0 ||
 285                         params->tc_rate[i] > params->tb_rate)
 286                         return -13;
 287         }
 288
 289         /* TC period: non-zero */
 290         if (params->tc_period == 0)
 291                 return -14;
 292
 293 #ifdef RTE_SCHED_SUBPORT_TC_OV
 294         /* TC3 oversubscription weight: non-zero */
 295         if (params->tc_ov_weight == 0)
 296                 return -15;
 297 #endif
 298
 299         /* Queue WRR weights: non-zero */
 300         for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
 301                 if (params->wrr_weights[i] == 0)
 302                         return -16;
 303         }
 304
 305         return 0;
 306 }
 307
 308 static int
 309 rte_sched_port_check_params(struct rte_sched_port_params *params)
 310 {
 311         uint32_t i;
 312
 313         if (params == NULL)
 314                 return -1;
 315
 316         /* socket */
 317         if (params->socket < 0)
 318                 return -3;
 319
 320         /* rate */
 321         if (params->rate == 0)
 322                 return -4;
 323
 324         /* mtu */
 325         if (params->mtu == 0)
 326                 return -5;
 327
 328         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 329         if (params->n_subports_per_port == 0 ||
 330             params->n_subports_per_port > 1u << 16 ||
 331             !rte_is_power_of_2(params->n_subports_per_port))
 332                 return -6;
 333
 334         /* n_pipes_per_subport: non-zero, power of 2 */
 335         if (params->n_pipes_per_subport == 0 ||
 336             !rte_is_power_of_2(params->n_pipes_per_subport))
 337                 return -7;
 338
 339         /* qsize: non-zero, power of 2,
 340          * no bigger than 32K (due to 16-bit read/write pointers)
 341          */
 342         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 343                 uint16_t qsize = params->qsize[i];
 344
 345                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 346                         return -8;
 347         }
 348
 349         /* pipe_profiles and n_pipe_profiles */
 350         if (params->pipe_profiles == NULL ||
 351             params->n_pipe_profiles == 0 ||
 352             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 353                 return -9;
 354
 355         for (i = 0; i < params->n_pipe_profiles; i++) {
 356                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 357                 int status;
 358
 359                 status = pipe_profile_check(p, params->rate);
 360                 if (status != 0)
 361                         return status;
 362         }
 363
 364         return 0;
 365 }
 366
 367 static uint32_t
 368 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 369 {
 370         uint32_t n_subports_per_port = params->n_subports_per_port;
 371         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 372         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 373         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 374
 375         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 376         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 377         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 378         uint32_t size_queue_extra
 379                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 380         uint32_t size_pipe_profiles
 381                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 382         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 383         uint32_t size_per_pipe_queue_array, size_queue_array;
 384
 385         uint32_t base, i;
 386
 387         size_per_pipe_queue_array = 0;
 388         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 389                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 390                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 391         }
 392         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 393
 394         base = 0;
 395
 396         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 397                 return base;
 398         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 399
 400         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 401                 return base;
 402         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 403
 404         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 405                 return base;
 406         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 407
 408         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 409                 return base;
 410         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 411
 412         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 413                 return base;
 414         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 415
 416         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 417                 return base;
 418         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 419
 420         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 421                 return base;
 422         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 423
 424         return base;
 425 }
 426
 427 uint32_t
 428 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 429 {
 430         uint32_t size0, size1;
 431         int status;
 432
 433         status = rte_sched_port_check_params(params);
 434         if (status != 0) {
 435                 RTE_LOG(NOTICE, SCHED,
 436                         "Port scheduler params check failed (%d)\n", status);
 437
 438                 return 0;
 439         }
 440
 441         size0 = sizeof(struct rte_sched_port);
 442         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 443
 444         return size0 + size1;
 445 }
 446
 447 static void
 448 rte_sched_port_config_qsize(struct rte_sched_port *port)
 449 {
 450         /* TC 0 */
 451         port->qsize_add[0] = 0;
 452         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 453         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 454         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 455
 456         /* TC 1 */
 457         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 458         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 459         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 460         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 461
 462         /* TC 2 */
 463         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 464         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 465         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 466         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 467
 468         /* TC 3 */
 469         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 470         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 471         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 472         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 473
 474         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 475 }
 476
 477 static void
 478 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 479 {
 480         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 481
 482         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 483                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 484                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 485                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 486                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 487                 i,
 488
 489                 /* Token bucket */
 490                 p->tb_period,
 491                 p->tb_credits_per_period,
 492                 p->tb_size,
 493
 494                 /* Traffic classes */
 495                 p->tc_period,
 496                 p->tc_credits_per_period[0],
 497                 p->tc_credits_per_period[1],
 498                 p->tc_credits_per_period[2],
 499                 p->tc_credits_per_period[3],
 500
 501                 /* Traffic class 3 oversubscription */
 502                 p->tc_ov_weight,
 503
 504                 /* WRR */
 505                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 506                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 507                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 508                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 509 }
 510
 511 static inline uint64_t
 512 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 513 {
 514         uint64_t time = time_ms;
 515
 516         time = (time * rate) / 1000;
 517
 518         return time;
 519 }
 520
 521 static void
 522 rte_sched_pipe_profile_convert(struct rte_sched_pipe_params *src,
 523         struct rte_sched_pipe_profile *dst,
 524         uint32_t rate)
 525 {
 526         uint32_t i;
 527
 528         /* Token Bucket */
 529         if (src->tb_rate == rate) {
 530                 dst->tb_credits_per_period = 1;
 531                 dst->tb_period = 1;
 532         } else {
 533                 double tb_rate = (double) src->tb_rate
 534                                 / (double) rate;
 535                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 536
 537                 rte_approx(tb_rate, d,
 538                         &dst->tb_credits_per_period, &dst->tb_period);
 539         }
 540
 541         dst->tb_size = src->tb_size;
 542
 543         /* Traffic Classes */
 544         dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 545                                                 rate);
 546
 547         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 548                 dst->tc_credits_per_period[i]
 549                         = rte_sched_time_ms_to_bytes(src->tc_period,
 550                                 src->tc_rate[i]);
 551
 552 #ifdef RTE_SCHED_SUBPORT_TC_OV
 553         dst->tc_ov_weight = src->tc_ov_weight;
 554 #endif
 555
 556         /* WRR */
 557         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 558                 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 559                 uint32_t lcd, lcd1, lcd2;
 560                 uint32_t qindex;
 561
 562                 qindex = i * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 563
 564                 wrr_cost[0] = src->wrr_weights[qindex];
 565                 wrr_cost[1] = src->wrr_weights[qindex + 1];
 566                 wrr_cost[2] = src->wrr_weights[qindex + 2];
 567                 wrr_cost[3] = src->wrr_weights[qindex + 3];
 568
 569                 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 570                 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 571                 lcd = rte_get_lcd(lcd1, lcd2);
 572
 573                 wrr_cost[0] = lcd / wrr_cost[0];
 574                 wrr_cost[1] = lcd / wrr_cost[1];
 575                 wrr_cost[2] = lcd / wrr_cost[2];
 576                 wrr_cost[3] = lcd / wrr_cost[3];
 577
 578                 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 579                 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 580                 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 581                 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 582         }
 583 }
 584
 585 static void
 586 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port,
 587         struct rte_sched_port_params *params)
 588 {
 589         uint32_t i;
 590
 591         for (i = 0; i < port->n_pipe_profiles; i++) {
 592                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 593                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 594
 595                 rte_sched_pipe_profile_convert(src, dst, params->rate);
 596                 rte_sched_port_log_pipe_profile(port, i);
 597         }
 598
 599         port->pipe_tc3_rate_max = 0;
 600         for (i = 0; i < port->n_pipe_profiles; i++) {
 601                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 602                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 603
 604                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 605                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 606         }
 607 }
 608
 609 struct rte_sched_port *
 610 rte_sched_port_config(struct rte_sched_port_params *params)
 611 {
 612         struct rte_sched_port *port = NULL;
 613         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
 614
 615         /* Check user parameters. Determine the amount of memory to allocate */
 616         mem_size = rte_sched_port_get_memory_footprint(params);
 617         if (mem_size == 0)
 618                 return NULL;
 619
 620         /* Allocate memory to store the data structures */
 621         port = rte_zmalloc_socket("qos_params", mem_size, RTE_CACHE_LINE_SIZE,
 622                 params->socket);
 623         if (port == NULL)
 624                 return NULL;
 625
 626         /* compile time checks */
 627         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 628         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 629
 630         /* User parameters */
 631         port->n_subports_per_port = params->n_subports_per_port;
 632         port->n_pipes_per_subport = params->n_pipes_per_subport;
 633         port->n_pipes_per_subport_log2 =
 634                         __builtin_ctz(params->n_pipes_per_subport);
 635         port->rate = params->rate;
 636         port->mtu = params->mtu + params->frame_overhead;
 637         port->frame_overhead = params->frame_overhead;
 638         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 639         port->n_pipe_profiles = params->n_pipe_profiles;
 640
 641 #ifdef RTE_SCHED_RED
 642         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 643                 uint32_t j;
 644
 645                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 646                         /* if min/max are both zero, then RED is disabled */
 647                         if ((params->red_params[i][j].min_th |
 648                              params->red_params[i][j].max_th) == 0) {
 649                                 continue;
 650                         }
 651
 652                         if (rte_red_config_init(&port->red_config[i][j],
 653                                 params->red_params[i][j].wq_log2,
 654                                 params->red_params[i][j].min_th,
 655                                 params->red_params[i][j].max_th,
 656                                 params->red_params[i][j].maxp_inv) != 0) {
 657                                 return NULL;
 658                         }
 659                 }
 660         }
 661 #endif
 662
 663         /* Timing */
 664         port->time_cpu_cycles = rte_get_tsc_cycles();
 665         port->time_cpu_bytes = 0;
 666         port->time = 0;
 667
 668         cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
 669                 / params->rate;
 670         port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
 671
 672         /* Scheduling loop detection */
 673         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 674         port->pipe_exhaustion = 0;
 675
 676         /* Grinders */
 677         port->busy_grinders = 0;
 678         port->pkts_out = NULL;
 679         port->n_pkts_out = 0;
 680
 681         /* Queue base calculation */
 682         rte_sched_port_config_qsize(port);
 683
 684         /* Large data structures */
 685         port->subport = (struct rte_sched_subport *)
 686                 (port->memory + rte_sched_port_get_array_base(params,
 687                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 688         port->pipe = (struct rte_sched_pipe *)
 689                 (port->memory + rte_sched_port_get_array_base(params,
 690                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 691         port->queue = (struct rte_sched_queue *)
 692                 (port->memory + rte_sched_port_get_array_base(params,
 693                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 694         port->queue_extra = (struct rte_sched_queue_extra *)
 695                 (port->memory + rte_sched_port_get_array_base(params,
 696                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 697         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 698                 (port->memory + rte_sched_port_get_array_base(params,
 699                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 700         port->bmp_array =  port->memory
 701                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 702         port->queue_array = (struct rte_mbuf **)
 703                 (port->memory + rte_sched_port_get_array_base(params,
 704                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 705
 706         /* Pipe profile table */
 707         rte_sched_port_config_pipe_profile_table(port, params);
 708
 709         /* Bitmap */
 710         n_queues_per_port = rte_sched_port_queues_per_port(port);
 711         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 712         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 713                                     bmp_mem_size);
 714         if (port->bmp == NULL) {
 715                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 716                 return NULL;
 717         }
 718
 719         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 720                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 721
 722
 723         return port;
 724 }
 725
 726 void
 727 rte_sched_port_free(struct rte_sched_port *port)
 728 {
 729         uint32_t qindex;
 730         uint32_t n_queues_per_port;
 731
 732         /* Check user parameters */
 733         if (port == NULL)
 734                 return;
 735
 736         n_queues_per_port = rte_sched_port_queues_per_port(port);
 737
 738         /* Free enqueued mbufs */
 739         for (qindex = 0; qindex < n_queues_per_port; qindex++) {
 740                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
 741                 uint16_t qsize = rte_sched_port_qsize(port, qindex);
 742                 struct rte_sched_queue *queue = port->queue + qindex;
 743                 uint16_t qr = queue->qr & (qsize - 1);
 744                 uint16_t qw = queue->qw & (qsize - 1);
 745
 746                 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
 747                         rte_pktmbuf_free(mbufs[qr]);
 748         }
 749
 750         rte_bitmap_free(port->bmp);
 751         rte_free(port);
 752 }
 753
 754 static void
 755 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 756 {
 757         struct rte_sched_subport *s = port->subport + i;
 758
 759         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 760                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 761                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 762                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 763                 i,
 764
 765                 /* Token bucket */
 766                 s->tb_period,
 767                 s->tb_credits_per_period,
 768                 s->tb_size,
 769
 770                 /* Traffic classes */
 771                 s->tc_period,
 772                 s->tc_credits_per_period[0],
 773                 s->tc_credits_per_period[1],
 774                 s->tc_credits_per_period[2],
 775                 s->tc_credits_per_period[3],
 776
 777                 /* Traffic class 3 oversubscription */
 778                 s->tc_ov_wm_min,
 779                 s->tc_ov_wm_max);
 780 }
 781
 782 int
 783 rte_sched_subport_config(struct rte_sched_port *port,
 784         uint32_t subport_id,
 785         struct rte_sched_subport_params *params)
 786 {
 787         struct rte_sched_subport *s;
 788         uint32_t i;
 789
 790         /* Check user parameters */
 791         if (port == NULL ||
 792             subport_id >= port->n_subports_per_port ||
 793             params == NULL)
 794                 return -1;
 795
 796         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 797                 return -2;
 798
 799         if (params->tb_size == 0)
 800                 return -3;
 801
 802         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 803                 if (params->tc_rate[i] == 0 ||
 804                     params->tc_rate[i] > params->tb_rate)
 805                         return -4;
 806         }
 807
 808         if (params->tc_period == 0)
 809                 return -5;
 810
 811         s = port->subport + subport_id;
 812
 813         /* Token Bucket (TB) */
 814         if (params->tb_rate == port->rate) {
 815                 s->tb_credits_per_period = 1;
 816                 s->tb_period = 1;
 817         } else {
 818                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 819                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 820
 821                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 822         }
 823
 824         s->tb_size = params->tb_size;
 825         s->tb_time = port->time;
 826         s->tb_credits = s->tb_size / 2;
 827
 828         /* Traffic Classes (TCs) */
 829         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 830         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 831                 s->tc_credits_per_period[i]
 832                         = rte_sched_time_ms_to_bytes(params->tc_period,
 833                                                      params->tc_rate[i]);
 834         }
 835         s->tc_time = port->time + s->tc_period;
 836         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 837                 s->tc_credits[i] = s->tc_credits_per_period[i];
 838
 839 #ifdef RTE_SCHED_SUBPORT_TC_OV
 840         /* TC oversubscription */
 841         s->tc_ov_wm_min = port->mtu;
 842         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 843                                                      port->pipe_tc3_rate_max);
 844         s->tc_ov_wm = s->tc_ov_wm_max;
 845         s->tc_ov_period_id = 0;
 846         s->tc_ov = 0;
 847         s->tc_ov_n = 0;
 848         s->tc_ov_rate = 0;
 849 #endif
 850
 851         rte_sched_port_log_subport_config(port, subport_id);
 852
 853         return 0;
 854 }
 855
 856 int
 857 rte_sched_pipe_config(struct rte_sched_port *port,
 858         uint32_t subport_id,
 859         uint32_t pipe_id,
 860         int32_t pipe_profile)
 861 {
 862         struct rte_sched_subport *s;
 863         struct rte_sched_pipe *p;
 864         struct rte_sched_pipe_profile *params;
 865         uint32_t deactivate, profile, i;
 866
 867         /* Check user parameters */
 868         profile = (uint32_t) pipe_profile;
 869         deactivate = (pipe_profile < 0);
 870
 871         if (port == NULL ||
 872             subport_id >= port->n_subports_per_port ||
 873             pipe_id >= port->n_pipes_per_subport ||
 874             (!deactivate && profile >= port->n_pipe_profiles))
 875                 return -1;
 876
 877
 878         /* Check that subport configuration is valid */
 879         s = port->subport + subport_id;
 880         if (s->tb_period == 0)
 881                 return -2;
 882
 883         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 884
 885         /* Handle the case when pipe already has a valid configuration */
 886         if (p->tb_time) {
 887                 params = port->pipe_profiles + p->profile;
 888
 889 #ifdef RTE_SCHED_SUBPORT_TC_OV
 890                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 891                         / (double) s->tc_period;
 892                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 893                         / (double) params->tc_period;
 894                 uint32_t tc3_ov = s->tc_ov;
 895
 896                 /* Unplug pipe from its subport */
 897                 s->tc_ov_n -= params->tc_ov_weight;
 898                 s->tc_ov_rate -= pipe_tc3_rate;
 899                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 900
 901                 if (s->tc_ov != tc3_ov) {
 902                         RTE_LOG(DEBUG, SCHED,
 903                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 904                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 905                 }
 906 #endif
 907
 908                 /* Reset the pipe */
 909                 memset(p, 0, sizeof(struct rte_sched_pipe));
 910         }
 911
 912         if (deactivate)
 913                 return 0;
 914
 915         /* Apply the new pipe configuration */
 916         p->profile = profile;
 917         params = port->pipe_profiles + p->profile;
 918
 919         /* Token Bucket (TB) */
 920         p->tb_time = port->time;
 921         p->tb_credits = params->tb_size / 2;
 922
 923         /* Traffic Classes (TCs) */
 924         p->tc_time = port->time + params->tc_period;
 925         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 926                 p->tc_credits[i] = params->tc_credits_per_period[i];
 927
 928 #ifdef RTE_SCHED_SUBPORT_TC_OV
 929         {
 930                 /* Subport TC3 oversubscription */
 931                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 932                         / (double) s->tc_period;
 933                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 934                         / (double) params->tc_period;
 935                 uint32_t tc3_ov = s->tc_ov;
 936
 937                 s->tc_ov_n += params->tc_ov_weight;
 938                 s->tc_ov_rate += pipe_tc3_rate;
 939                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 940
 941                 if (s->tc_ov != tc3_ov) {
 942                         RTE_LOG(DEBUG, SCHED,
 943                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 944                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 945                 }
 946                 p->tc_ov_period_id = s->tc_ov_period_id;
 947                 p->tc_ov_credits = s->tc_ov_wm;
 948         }
 949 #endif
 950
 951         return 0;
 952 }
 953
 954 int __rte_experimental
 955 rte_sched_port_pipe_profile_add(struct rte_sched_port *port,
 956         struct rte_sched_pipe_params *params,
 957         uint32_t *pipe_profile_id)
 958 {
 959         struct rte_sched_pipe_profile *pp;
 960         uint32_t i;
 961         int status;
 962
 963         /* Port */
 964         if (port == NULL)
 965                 return -1;
 966
 967         /* Pipe profiles not exceeds the max limit */
 968         if (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)
 969                 return -2;
 970
 971         /* Pipe params */
 972         status = pipe_profile_check(params, port->rate);
 973         if (status != 0)
 974                 return status;
 975
 976         pp = &port->pipe_profiles[port->n_pipe_profiles];
 977         rte_sched_pipe_profile_convert(params, pp, port->rate);
 978
 979         /* Pipe profile not exists */
 980         for (i = 0; i < port->n_pipe_profiles; i++)
 981                 if (memcmp(port->pipe_profiles + i, pp, sizeof(*pp)) == 0)
 982                         return -3;
 983
 984         /* Pipe profile commit */
 985         *pipe_profile_id = port->n_pipe_profiles;
 986         port->n_pipe_profiles++;
 987
 988         if (port->pipe_tc3_rate_max < params->tc_rate[3])
 989                 port->pipe_tc3_rate_max = params->tc_rate[3];
 990
 991         rte_sched_port_log_pipe_profile(port, *pipe_profile_id);
 992
 993         return 0;
 994 }
 995
 996 static inline uint32_t
 997 rte_sched_port_qindex(struct rte_sched_port *port,
 998         uint32_t subport,
 999         uint32_t pipe,
1000         uint32_t traffic_class,
1001         uint32_t queue)
1002 {
1003         return ((subport & (port->n_subports_per_port - 1)) <<
1004                         (port->n_pipes_per_subport_log2 + 4)) |
1005                         ((pipe & (port->n_pipes_per_subport - 1)) << 4) |
1006                         ((traffic_class &
1007                             (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1)) << 2) |
1008                         (queue & (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1));
1009 }
1010
1011 void
1012 rte_sched_port_pkt_write(struct rte_sched_port *port,
1013                          struct rte_mbuf *pkt,
1014                          uint32_t subport, uint32_t pipe,
1015                          uint32_t traffic_class,
1016                          uint32_t queue, enum rte_meter_color color)
1017 {
1018         uint32_t queue_id = rte_sched_port_qindex(port, subport, pipe,
1019                         traffic_class, queue);
1020         rte_mbuf_sched_set(pkt, queue_id, traffic_class, (uint8_t)color);
1021 }
1022
1023 void
1024 rte_sched_port_pkt_read_tree_path(struct rte_sched_port *port,
1025                                   const struct rte_mbuf *pkt,
1026                                   uint32_t *subport, uint32_t *pipe,
1027                                   uint32_t *traffic_class, uint32_t *queue)
1028 {
1029         uint32_t queue_id = rte_mbuf_sched_queue_get(pkt);
1030
1031         *subport = queue_id >> (port->n_pipes_per_subport_log2 + 4);
1032         *pipe = (queue_id >> 4) & (port->n_pipes_per_subport - 1);
1033         *traffic_class = (queue_id >> 2) &
1034                                 (RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE - 1);
1035         *queue = queue_id & (RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS - 1);
1036 }
1037
1038 enum rte_meter_color
1039 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
1040 {
1041         return (enum rte_meter_color)rte_mbuf_sched_color_get(pkt);
1042 }
1043
1044 int
1045 rte_sched_subport_read_stats(struct rte_sched_port *port,
1046                              uint32_t subport_id,
1047                              struct rte_sched_subport_stats *stats,
1048                              uint32_t *tc_ov)
1049 {
1050         struct rte_sched_subport *s;
1051
1052         /* Check user parameters */
1053         if (port == NULL || subport_id >= port->n_subports_per_port ||
1054             stats == NULL || tc_ov == NULL)
1055                 return -1;
1056
1057         s = port->subport + subport_id;
1058
1059         /* Copy subport stats and clear */
1060         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1061         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1062
1063         /* Subport TC oversubscription status */
1064         *tc_ov = s->tc_ov;
1065
1066         return 0;
1067 }
1068
1069 int
1070 rte_sched_queue_read_stats(struct rte_sched_port *port,
1071         uint32_t queue_id,
1072         struct rte_sched_queue_stats *stats,
1073         uint16_t *qlen)
1074 {
1075         struct rte_sched_queue *q;
1076         struct rte_sched_queue_extra *qe;
1077
1078         /* Check user parameters */
1079         if ((port == NULL) ||
1080             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1081                 (stats == NULL) ||
1082                 (qlen == NULL)) {
1083                 return -1;
1084         }
1085         q = port->queue + queue_id;
1086         qe = port->queue_extra + queue_id;
1087
1088         /* Copy queue stats and clear */
1089         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1090         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1091
1092         /* Queue length */
1093         *qlen = q->qw - q->qr;
1094
1095         return 0;
1096 }
1097
1098 #ifdef RTE_SCHED_DEBUG
1099
1100 static inline int
1101 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1102 {
1103         struct rte_sched_queue *queue = port->queue + qindex;
1104
1105         return queue->qr == queue->qw;
1106 }
1107
1108 #endif /* RTE_SCHED_DEBUG */
1109
1110 #ifdef RTE_SCHED_COLLECT_STATS
1111
1112 static inline void
1113 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1114 {
1115         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1116         uint32_t tc_index = (qindex >> 2) & 0x3;
1117         uint32_t pkt_len = pkt->pkt_len;
1118
1119         s->stats.n_pkts_tc[tc_index] += 1;
1120         s->stats.n_bytes_tc[tc_index] += pkt_len;
1121 }
1122
1123 #ifdef RTE_SCHED_RED
1124 static inline void
1125 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1126                                                 uint32_t qindex,
1127                                                 struct rte_mbuf *pkt, uint32_t red)
1128 #else
1129 static inline void
1130 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1131                                                 uint32_t qindex,
1132                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1133 #endif
1134 {
1135         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1136         uint32_t tc_index = (qindex >> 2) & 0x3;
1137         uint32_t pkt_len = pkt->pkt_len;
1138
1139         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1140         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1141 #ifdef RTE_SCHED_RED
1142         s->stats.n_pkts_red_dropped[tc_index] += red;
1143 #endif
1144 }
1145
1146 static inline void
1147 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1148 {
1149         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1150         uint32_t pkt_len = pkt->pkt_len;
1151
1152         qe->stats.n_pkts += 1;
1153         qe->stats.n_bytes += pkt_len;
1154 }
1155
1156 #ifdef RTE_SCHED_RED
1157 static inline void
1158 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1159                                                 uint32_t qindex,
1160                                                 struct rte_mbuf *pkt, uint32_t red)
1161 #else
1162 static inline void
1163 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1164                                                 uint32_t qindex,
1165                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1166 #endif
1167 {
1168         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1169         uint32_t pkt_len = pkt->pkt_len;
1170
1171         qe->stats.n_pkts_dropped += 1;
1172         qe->stats.n_bytes_dropped += pkt_len;
1173 #ifdef RTE_SCHED_RED
1174         qe->stats.n_pkts_red_dropped += red;
1175 #endif
1176 }
1177
1178 #endif /* RTE_SCHED_COLLECT_STATS */
1179
1180 #ifdef RTE_SCHED_RED
1181
1182 static inline int
1183 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1184 {
1185         struct rte_sched_queue_extra *qe;
1186         struct rte_red_config *red_cfg;
1187         struct rte_red *red;
1188         uint32_t tc_index;
1189         enum rte_meter_color color;
1190
1191         tc_index = (qindex >> 2) & 0x3;
1192         color = rte_sched_port_pkt_read_color(pkt);
1193         red_cfg = &port->red_config[tc_index][color];
1194
1195         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1196                 return 0;
1197
1198         qe = port->queue_extra + qindex;
1199         red = &qe->red;
1200
1201         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1202 }
1203
1204 static inline void
1205 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1206 {
1207         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1208         struct rte_red *red = &qe->red;
1209
1210         rte_red_mark_queue_empty(red, port->time);
1211 }
1212
1213 #else
1214
1215 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1216
1217 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1218
1219 #endif /* RTE_SCHED_RED */
1220
1221 #ifdef RTE_SCHED_DEBUG
1222
1223 static inline void
1224 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1225                        uint64_t bmp_slab)
1226 {
1227         uint64_t mask;
1228         uint32_t i, panic;
1229
1230         if (bmp_slab == 0)
1231                 rte_panic("Empty slab at position %u\n", bmp_pos);
1232
1233         panic = 0;
1234         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1235                 if (mask & bmp_slab) {
1236                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1237                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1238                                 panic = 1;
1239                         }
1240                 }
1241         }
1242
1243         if (panic)
1244                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1245                         bmp_slab, bmp_pos);
1246 }
1247
1248 #endif /* RTE_SCHED_DEBUG */
1249
1250 static inline uint32_t
1251 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1252                                        struct rte_mbuf *pkt)
1253 {
1254         struct rte_sched_queue *q;
1255 #ifdef RTE_SCHED_COLLECT_STATS
1256         struct rte_sched_queue_extra *qe;
1257 #endif
1258         uint32_t qindex = rte_mbuf_sched_queue_get(pkt);
1259
1260         q = port->queue + qindex;
1261         rte_prefetch0(q);
1262 #ifdef RTE_SCHED_COLLECT_STATS
1263         qe = port->queue_extra + qindex;
1264         rte_prefetch0(qe);
1265 #endif
1266
1267         return qindex;
1268 }
1269
1270 static inline void
1271 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1272                                      uint32_t qindex, struct rte_mbuf **qbase)
1273 {
1274         struct rte_sched_queue *q;
1275         struct rte_mbuf **q_qw;
1276         uint16_t qsize;
1277
1278         q = port->queue + qindex;
1279         qsize = rte_sched_port_qsize(port, qindex);
1280         q_qw = qbase + (q->qw & (qsize - 1));
1281
1282         rte_prefetch0(q_qw);
1283         rte_bitmap_prefetch0(port->bmp, qindex);
1284 }
1285
1286 static inline int
1287 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1288                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1289 {
1290         struct rte_sched_queue *q;
1291         uint16_t qsize;
1292         uint16_t qlen;
1293
1294         q = port->queue + qindex;
1295         qsize = rte_sched_port_qsize(port, qindex);
1296         qlen = q->qw - q->qr;
1297
1298         /* Drop the packet (and update drop stats) when queue is full */
1299         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1300                      (qlen >= qsize))) {
1301                 rte_pktmbuf_free(pkt);
1302 #ifdef RTE_SCHED_COLLECT_STATS
1303                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1304                                                             qlen < qsize);
1305                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1306                                                           qlen < qsize);
1307 #endif
1308                 return 0;
1309         }
1310
1311         /* Enqueue packet */
1312         qbase[q->qw & (qsize - 1)] = pkt;
1313         q->qw++;
1314
1315         /* Activate queue in the port bitmap */
1316         rte_bitmap_set(port->bmp, qindex);
1317
1318         /* Statistics */
1319 #ifdef RTE_SCHED_COLLECT_STATS
1320         rte_sched_port_update_subport_stats(port, qindex, pkt);
1321         rte_sched_port_update_queue_stats(port, qindex, pkt);
1322 #endif
1323
1324         return 1;
1325 }
1326
1327
1328 /*
1329  * The enqueue function implements a 4-level pipeline with each stage
1330  * processing two different packets. The purpose of using a pipeline
1331  * is to hide the latency of prefetching the data structures. The
1332  * naming convention is presented in the diagram below:
1333  *
1334  *   p00  _______   p10  _______   p20  _______   p30  _______
1335  * ----->|       |----->|       |----->|       |----->|       |----->
1336  *       |   0   |      |   1   |      |   2   |      |   3   |
1337  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1338  *   p01            p11            p21            p31
1339  *
1340  */
1341 int
1342 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1343                        uint32_t n_pkts)
1344 {
1345         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1346                 *pkt30, *pkt31, *pkt_last;
1347         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1348                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1349         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1350         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1351         uint32_t result, i;
1352
1353         result = 0;
1354
1355         /*
1356          * Less then 6 input packets available, which is not enough to
1357          * feed the pipeline
1358          */
1359         if (unlikely(n_pkts < 6)) {
1360                 struct rte_mbuf **q_base[5];
1361                 uint32_t q[5];
1362
1363                 /* Prefetch the mbuf structure of each packet */
1364                 for (i = 0; i < n_pkts; i++)
1365                         rte_prefetch0(pkts[i]);
1366
1367                 /* Prefetch the queue structure for each queue */
1368                 for (i = 0; i < n_pkts; i++)
1369                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1370                                                                       pkts[i]);
1371
1372                 /* Prefetch the write pointer location of each queue */
1373                 for (i = 0; i < n_pkts; i++) {
1374                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1375                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1376                                                              q_base[i]);
1377                 }
1378
1379                 /* Write each packet to its queue */
1380                 for (i = 0; i < n_pkts; i++)
1381                         result += rte_sched_port_enqueue_qwa(port, q[i],
1382                                                              q_base[i], pkts[i]);
1383
1384                 return result;
1385         }
1386
1387         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1388         pkt20 = pkts[0];
1389         pkt21 = pkts[1];
1390         rte_prefetch0(pkt20);
1391         rte_prefetch0(pkt21);
1392
1393         pkt10 = pkts[2];
1394         pkt11 = pkts[3];
1395         rte_prefetch0(pkt10);
1396         rte_prefetch0(pkt11);
1397
1398         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1399         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1400
1401         pkt00 = pkts[4];
1402         pkt01 = pkts[5];
1403         rte_prefetch0(pkt00);
1404         rte_prefetch0(pkt01);
1405
1406         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1407         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1408
1409         q20_base = rte_sched_port_qbase(port, q20);
1410         q21_base = rte_sched_port_qbase(port, q21);
1411         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1412         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1413
1414         /* Run the pipeline */
1415         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1416                 /* Propagate stage inputs */
1417                 pkt30 = pkt20;
1418                 pkt31 = pkt21;
1419                 pkt20 = pkt10;
1420                 pkt21 = pkt11;
1421                 pkt10 = pkt00;
1422                 pkt11 = pkt01;
1423                 q30 = q20;
1424                 q31 = q21;
1425                 q20 = q10;
1426                 q21 = q11;
1427                 q30_base = q20_base;
1428                 q31_base = q21_base;
1429
1430                 /* Stage 0: Get packets in */
1431                 pkt00 = pkts[i];
1432                 pkt01 = pkts[i + 1];
1433                 rte_prefetch0(pkt00);
1434                 rte_prefetch0(pkt01);
1435
1436                 /* Stage 1: Prefetch queue structure storing queue pointers */
1437                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1438                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1439
1440                 /* Stage 2: Prefetch queue write location */
1441                 q20_base = rte_sched_port_qbase(port, q20);
1442                 q21_base = rte_sched_port_qbase(port, q21);
1443                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1444                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1445
1446                 /* Stage 3: Write packet to queue and activate queue */
1447                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1448                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1449                 result += r30 + r31;
1450         }
1451
1452         /*
1453          * Drain the pipeline (exactly 6 packets).
1454          * Handle the last packet in the case
1455          * of an odd number of input packets.
1456          */
1457         pkt_last = pkts[n_pkts - 1];
1458         rte_prefetch0(pkt_last);
1459
1460         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1461         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1462
1463         q10_base = rte_sched_port_qbase(port, q10);
1464         q11_base = rte_sched_port_qbase(port, q11);
1465         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1466         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1467
1468         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1469         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1470         result += r20 + r21;
1471
1472         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1473
1474         q00_base = rte_sched_port_qbase(port, q00);
1475         q01_base = rte_sched_port_qbase(port, q01);
1476         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1477         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1478
1479         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1480         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1481         result += r10 + r11;
1482
1483         q_last_base = rte_sched_port_qbase(port, q_last);
1484         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1485
1486         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1487         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1488         result += r00 + r01;
1489
1490         if (n_pkts & 1) {
1491                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1492                 result += r_last;
1493         }
1494
1495         return result;
1496 }
1497
1498 #ifndef RTE_SCHED_SUBPORT_TC_OV
1499
1500 static inline void
1501 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1502 {
1503         struct rte_sched_grinder *grinder = port->grinder + pos;
1504         struct rte_sched_subport *subport = grinder->subport;
1505         struct rte_sched_pipe *pipe = grinder->pipe;
1506         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1507         uint64_t n_periods;
1508
1509         /* Subport TB */
1510         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1511         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1512         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1513         subport->tb_time += n_periods * subport->tb_period;
1514
1515         /* Pipe TB */
1516         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1517         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1518         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1519         pipe->tb_time += n_periods * params->tb_period;
1520
1521         /* Subport TCs */
1522         if (unlikely(port->time >= subport->tc_time)) {
1523                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1524                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1525                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1526                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1527                 subport->tc_time = port->time + subport->tc_period;
1528         }
1529
1530         /* Pipe TCs */
1531         if (unlikely(port->time >= pipe->tc_time)) {
1532                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1533                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1534                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1535                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1536                 pipe->tc_time = port->time + params->tc_period;
1537         }
1538 }
1539
1540 #else
1541
1542 static inline uint32_t
1543 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1544 {
1545         struct rte_sched_grinder *grinder = port->grinder + pos;
1546         struct rte_sched_subport *subport = grinder->subport;
1547         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1548         uint32_t tc_ov_consumption_max;
1549         uint32_t tc_ov_wm = subport->tc_ov_wm;
1550
1551         if (subport->tc_ov == 0)
1552                 return subport->tc_ov_wm_max;
1553
1554         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1555         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1556         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1557         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1558
1559         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1560                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1561
1562         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1563                 tc_ov_wm  -= tc_ov_wm >> 7;
1564                 if (tc_ov_wm < subport->tc_ov_wm_min)
1565                         tc_ov_wm = subport->tc_ov_wm_min;
1566
1567                 return tc_ov_wm;
1568         }
1569
1570         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1571         if (tc_ov_wm > subport->tc_ov_wm_max)
1572                 tc_ov_wm = subport->tc_ov_wm_max;
1573
1574         return tc_ov_wm;
1575 }
1576
1577 static inline void
1578 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1579 {
1580         struct rte_sched_grinder *grinder = port->grinder + pos;
1581         struct rte_sched_subport *subport = grinder->subport;
1582         struct rte_sched_pipe *pipe = grinder->pipe;
1583         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1584         uint64_t n_periods;
1585
1586         /* Subport TB */
1587         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1588         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1589         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1590         subport->tb_time += n_periods * subport->tb_period;
1591
1592         /* Pipe TB */
1593         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1594         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1595         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1596         pipe->tb_time += n_periods * params->tb_period;
1597
1598         /* Subport TCs */
1599         if (unlikely(port->time >= subport->tc_time)) {
1600                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1601
1602                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1603                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1604                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1605                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1606
1607                 subport->tc_time = port->time + subport->tc_period;
1608                 subport->tc_ov_period_id++;
1609         }
1610
1611         /* Pipe TCs */
1612         if (unlikely(port->time >= pipe->tc_time)) {
1613                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1614                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1615                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1616                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1617                 pipe->tc_time = port->time + params->tc_period;
1618         }
1619
1620         /* Pipe TCs - Oversubscription */
1621         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1622                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1623
1624                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1625         }
1626 }
1627
1628 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1629
1630
1631 #ifndef RTE_SCHED_SUBPORT_TC_OV
1632
1633 static inline int
1634 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1635 {
1636         struct rte_sched_grinder *grinder = port->grinder + pos;
1637         struct rte_sched_subport *subport = grinder->subport;
1638         struct rte_sched_pipe *pipe = grinder->pipe;
1639         struct rte_mbuf *pkt = grinder->pkt;
1640         uint32_t tc_index = grinder->tc_index;
1641         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1642         uint32_t subport_tb_credits = subport->tb_credits;
1643         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1644         uint32_t pipe_tb_credits = pipe->tb_credits;
1645         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1646         int enough_credits;
1647
1648         /* Check queue credits */
1649         enough_credits = (pkt_len <= subport_tb_credits) &&
1650                 (pkt_len <= subport_tc_credits) &&
1651                 (pkt_len <= pipe_tb_credits) &&
1652                 (pkt_len <= pipe_tc_credits);
1653
1654         if (!enough_credits)
1655                 return 0;
1656
1657         /* Update port credits */
1658         subport->tb_credits -= pkt_len;
1659         subport->tc_credits[tc_index] -= pkt_len;
1660         pipe->tb_credits -= pkt_len;
1661         pipe->tc_credits[tc_index] -= pkt_len;
1662
1663         return 1;
1664 }
1665
1666 #else
1667
1668 static inline int
1669 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1670 {
1671         struct rte_sched_grinder *grinder = port->grinder + pos;
1672         struct rte_sched_subport *subport = grinder->subport;
1673         struct rte_sched_pipe *pipe = grinder->pipe;
1674         struct rte_mbuf *pkt = grinder->pkt;
1675         uint32_t tc_index = grinder->tc_index;
1676         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1677         uint32_t subport_tb_credits = subport->tb_credits;
1678         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1679         uint32_t pipe_tb_credits = pipe->tb_credits;
1680         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1681         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1682         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1683         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1684         int enough_credits;
1685
1686         /* Check pipe and subport credits */
1687         enough_credits = (pkt_len <= subport_tb_credits) &&
1688                 (pkt_len <= subport_tc_credits) &&
1689                 (pkt_len <= pipe_tb_credits) &&
1690                 (pkt_len <= pipe_tc_credits) &&
1691                 (pkt_len <= pipe_tc_ov_credits);
1692
1693         if (!enough_credits)
1694                 return 0;
1695
1696         /* Update pipe and subport credits */
1697         subport->tb_credits -= pkt_len;
1698         subport->tc_credits[tc_index] -= pkt_len;
1699         pipe->tb_credits -= pkt_len;
1700         pipe->tc_credits[tc_index] -= pkt_len;
1701         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1702
1703         return 1;
1704 }
1705
1706 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1707
1708
1709 static inline int
1710 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1711 {
1712         struct rte_sched_grinder *grinder = port->grinder + pos;
1713         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1714         struct rte_mbuf *pkt = grinder->pkt;
1715         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1716
1717         if (!grinder_credits_check(port, pos))
1718                 return 0;
1719
1720         /* Advance port time */
1721         port->time += pkt_len;
1722
1723         /* Send packet */
1724         port->pkts_out[port->n_pkts_out++] = pkt;
1725         queue->qr++;
1726         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1727         if (queue->qr == queue->qw) {
1728                 uint32_t qindex = grinder->qindex[grinder->qpos];
1729
1730                 rte_bitmap_clear(port->bmp, qindex);
1731                 grinder->qmask &= ~(1 << grinder->qpos);
1732                 grinder->wrr_mask[grinder->qpos] = 0;
1733                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1734         }
1735
1736         /* Reset pipe loop detection */
1737         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1738         grinder->productive = 1;
1739
1740         return 1;
1741 }
1742
1743 #ifdef SCHED_VECTOR_SSE4
1744
1745 static inline int
1746 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1747 {
1748         __m128i index = _mm_set1_epi32(base_pipe);
1749         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1750         __m128i res = _mm_cmpeq_epi32(pipes, index);
1751
1752         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1753         pipes = _mm_cmpeq_epi32(pipes, index);
1754         res = _mm_or_si128(res, pipes);
1755
1756         if (_mm_testz_si128(res, res))
1757                 return 0;
1758
1759         return 1;
1760 }
1761
1762 #elif defined(SCHED_VECTOR_NEON)
1763
1764 static inline int
1765 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1766 {
1767         uint32x4_t index, pipes;
1768         uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1769
1770         index = vmovq_n_u32(base_pipe);
1771         pipes = vld1q_u32(pos);
1772         if (!vminvq_u32(veorq_u32(pipes, index)))
1773                 return 1;
1774
1775         pipes = vld1q_u32(pos + 4);
1776         if (!vminvq_u32(veorq_u32(pipes, index)))
1777                 return 1;
1778
1779         return 0;
1780 }
1781
1782 #else
1783
1784 static inline int
1785 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1786 {
1787         uint32_t i;
1788
1789         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1790                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1791                         return 1;
1792         }
1793
1794         return 0;
1795 }
1796
1797 #endif /* RTE_SCHED_OPTIMIZATIONS */
1798
1799 static inline void
1800 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1801 {
1802         struct rte_sched_grinder *grinder = port->grinder + pos;
1803         uint16_t w[4];
1804
1805         grinder->pcache_w = 0;
1806         grinder->pcache_r = 0;
1807
1808         w[0] = (uint16_t) bmp_slab;
1809         w[1] = (uint16_t) (bmp_slab >> 16);
1810         w[2] = (uint16_t) (bmp_slab >> 32);
1811         w[3] = (uint16_t) (bmp_slab >> 48);
1812
1813         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1814         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1815         grinder->pcache_w += (w[0] != 0);
1816
1817         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1818         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1819         grinder->pcache_w += (w[1] != 0);
1820
1821         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1822         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1823         grinder->pcache_w += (w[2] != 0);
1824
1825         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1826         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1827         grinder->pcache_w += (w[3] != 0);
1828 }
1829
1830 static inline void
1831 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1832 {
1833         struct rte_sched_grinder *grinder = port->grinder + pos;
1834         uint8_t b[4];
1835
1836         grinder->tccache_w = 0;
1837         grinder->tccache_r = 0;
1838
1839         b[0] = (uint8_t) (qmask & 0xF);
1840         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1841         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1842         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1843
1844         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1845         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1846         grinder->tccache_w += (b[0] != 0);
1847
1848         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1849         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1850         grinder->tccache_w += (b[1] != 0);
1851
1852         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1853         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1854         grinder->tccache_w += (b[2] != 0);
1855
1856         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1857         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1858         grinder->tccache_w += (b[3] != 0);
1859 }
1860
1861 static inline int
1862 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1863 {
1864         struct rte_sched_grinder *grinder = port->grinder + pos;
1865         struct rte_mbuf **qbase;
1866         uint32_t qindex;
1867         uint16_t qsize;
1868
1869         if (grinder->tccache_r == grinder->tccache_w)
1870                 return 0;
1871
1872         qindex = grinder->tccache_qindex[grinder->tccache_r];
1873         qbase = rte_sched_port_qbase(port, qindex);
1874         qsize = rte_sched_port_qsize(port, qindex);
1875
1876         grinder->tc_index = (qindex >> 2) & 0x3;
1877         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1878         grinder->qsize = qsize;
1879
1880         grinder->qindex[0] = qindex;
1881         grinder->qindex[1] = qindex + 1;
1882         grinder->qindex[2] = qindex + 2;
1883         grinder->qindex[3] = qindex + 3;
1884
1885         grinder->queue[0] = port->queue + qindex;
1886         grinder->queue[1] = port->queue + qindex + 1;
1887         grinder->queue[2] = port->queue + qindex + 2;
1888         grinder->queue[3] = port->queue + qindex + 3;
1889
1890         grinder->qbase[0] = qbase;
1891         grinder->qbase[1] = qbase + qsize;
1892         grinder->qbase[2] = qbase + 2 * qsize;
1893         grinder->qbase[3] = qbase + 3 * qsize;
1894
1895         grinder->tccache_r++;
1896         return 1;
1897 }
1898
1899 static inline int
1900 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1901 {
1902         struct rte_sched_grinder *grinder = port->grinder + pos;
1903         uint32_t pipe_qindex;
1904         uint16_t pipe_qmask;
1905
1906         if (grinder->pcache_r < grinder->pcache_w) {
1907                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1908                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1909                 grinder->pcache_r++;
1910         } else {
1911                 uint64_t bmp_slab = 0;
1912                 uint32_t bmp_pos = 0;
1913
1914                 /* Get another non-empty pipe group */
1915                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1916                         return 0;
1917
1918 #ifdef RTE_SCHED_DEBUG
1919                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1920 #endif
1921
1922                 /* Return if pipe group already in one of the other grinders */
1923                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1924                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1925                         return 0;
1926
1927                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1928
1929                 /* Install new pipe group into grinder's pipe cache */
1930                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1931
1932                 pipe_qmask = grinder->pcache_qmask[0];
1933                 pipe_qindex = grinder->pcache_qindex[0];
1934                 grinder->pcache_r = 1;
1935         }
1936
1937         /* Install new pipe in the grinder */
1938         grinder->pindex = pipe_qindex >> 4;
1939         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1940         grinder->pipe = port->pipe + grinder->pindex;
1941         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1942         grinder->productive = 0;
1943
1944         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1945         grinder_next_tc(port, pos);
1946
1947         /* Check for pipe exhaustion */
1948         if (grinder->pindex == port->pipe_loop) {
1949                 port->pipe_exhaustion = 1;
1950                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1951         }
1952
1953         return 1;
1954 }
1955
1956
1957 static inline void
1958 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1959 {
1960         struct rte_sched_grinder *grinder = port->grinder + pos;
1961         struct rte_sched_pipe *pipe = grinder->pipe;
1962         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1963         uint32_t tc_index = grinder->tc_index;
1964         uint32_t qmask = grinder->qmask;
1965         uint32_t qindex;
1966
1967         qindex = tc_index * 4;
1968
1969         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1970         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1971         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1972         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1973
1974         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1975         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1976         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1977         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1978
1979         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1980         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1981         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1982         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1983 }
1984
1985 static inline void
1986 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1987 {
1988         struct rte_sched_grinder *grinder = port->grinder + pos;
1989         struct rte_sched_pipe *pipe = grinder->pipe;
1990         uint32_t tc_index = grinder->tc_index;
1991         uint32_t qindex;
1992
1993         qindex = tc_index * 4;
1994
1995         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1996                 >> RTE_SCHED_WRR_SHIFT;
1997         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1998                 >> RTE_SCHED_WRR_SHIFT;
1999         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
2000                 >> RTE_SCHED_WRR_SHIFT;
2001         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
2002                 >> RTE_SCHED_WRR_SHIFT;
2003 }
2004
2005 static inline void
2006 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
2007 {
2008         struct rte_sched_grinder *grinder = port->grinder + pos;
2009         uint16_t wrr_tokens_min;
2010
2011         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
2012         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
2013         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
2014         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
2015
2016         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
2017         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
2018
2019         grinder->wrr_tokens[0] -= wrr_tokens_min;
2020         grinder->wrr_tokens[1] -= wrr_tokens_min;
2021         grinder->wrr_tokens[2] -= wrr_tokens_min;
2022         grinder->wrr_tokens[3] -= wrr_tokens_min;
2023 }
2024
2025
2026 #define grinder_evict(port, pos)
2027
2028 static inline void
2029 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2030 {
2031         struct rte_sched_grinder *grinder = port->grinder + pos;
2032
2033         rte_prefetch0(grinder->pipe);
2034         rte_prefetch0(grinder->queue[0]);
2035 }
2036
2037 static inline void
2038 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2039 {
2040         struct rte_sched_grinder *grinder = port->grinder + pos;
2041         uint16_t qsize, qr[4];
2042
2043         qsize = grinder->qsize;
2044         qr[0] = grinder->queue[0]->qr & (qsize - 1);
2045         qr[1] = grinder->queue[1]->qr & (qsize - 1);
2046         qr[2] = grinder->queue[2]->qr & (qsize - 1);
2047         qr[3] = grinder->queue[3]->qr & (qsize - 1);
2048
2049         rte_prefetch0(grinder->qbase[0] + qr[0]);
2050         rte_prefetch0(grinder->qbase[1] + qr[1]);
2051
2052         grinder_wrr_load(port, pos);
2053         grinder_wrr(port, pos);
2054
2055         rte_prefetch0(grinder->qbase[2] + qr[2]);
2056         rte_prefetch0(grinder->qbase[3] + qr[3]);
2057 }
2058
2059 static inline void
2060 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2061 {
2062         struct rte_sched_grinder *grinder = port->grinder + pos;
2063         uint32_t qpos = grinder->qpos;
2064         struct rte_mbuf **qbase = grinder->qbase[qpos];
2065         uint16_t qsize = grinder->qsize;
2066         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2067
2068         grinder->pkt = qbase[qr];
2069         rte_prefetch0(grinder->pkt);
2070
2071         if (unlikely((qr & 0x7) == 7)) {
2072                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2073
2074                 rte_prefetch0(qbase + qr_next);
2075         }
2076 }
2077
2078 static inline uint32_t
2079 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2080 {
2081         struct rte_sched_grinder *grinder = port->grinder + pos;
2082
2083         switch (grinder->state) {
2084         case e_GRINDER_PREFETCH_PIPE:
2085         {
2086                 if (grinder_next_pipe(port, pos)) {
2087                         grinder_prefetch_pipe(port, pos);
2088                         port->busy_grinders++;
2089
2090                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2091                         return 0;
2092                 }
2093
2094                 return 0;
2095         }
2096
2097         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2098         {
2099                 struct rte_sched_pipe *pipe = grinder->pipe;
2100
2101                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2102                 grinder_prefetch_tc_queue_arrays(port, pos);
2103                 grinder_credits_update(port, pos);
2104
2105                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2106                 return 0;
2107         }
2108
2109         case e_GRINDER_PREFETCH_MBUF:
2110         {
2111                 grinder_prefetch_mbuf(port, pos);
2112
2113                 grinder->state = e_GRINDER_READ_MBUF;
2114                 return 0;
2115         }
2116
2117         case e_GRINDER_READ_MBUF:
2118         {
2119                 uint32_t result = 0;
2120
2121                 result = grinder_schedule(port, pos);
2122
2123                 /* Look for next packet within the same TC */
2124                 if (result && grinder->qmask) {
2125                         grinder_wrr(port, pos);
2126                         grinder_prefetch_mbuf(port, pos);
2127
2128                         return 1;
2129                 }
2130                 grinder_wrr_store(port, pos);
2131
2132                 /* Look for another active TC within same pipe */
2133                 if (grinder_next_tc(port, pos)) {
2134                         grinder_prefetch_tc_queue_arrays(port, pos);
2135
2136                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2137                         return result;
2138                 }
2139
2140                 if (grinder->productive == 0 &&
2141                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2142                         port->pipe_loop = grinder->pindex;
2143
2144                 grinder_evict(port, pos);
2145
2146                 /* Look for another active pipe */
2147                 if (grinder_next_pipe(port, pos)) {
2148                         grinder_prefetch_pipe(port, pos);
2149
2150                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2151                         return result;
2152                 }
2153
2154                 /* No active pipe found */
2155                 port->busy_grinders--;
2156
2157                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2158                 return result;
2159         }
2160
2161         default:
2162                 rte_panic("Algorithmic error (invalid state)\n");
2163                 return 0;
2164         }
2165 }
2166
2167 static inline void
2168 rte_sched_port_time_resync(struct rte_sched_port *port)
2169 {
2170         uint64_t cycles = rte_get_tsc_cycles();
2171         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2172         uint64_t bytes_diff;
2173
2174         /* Compute elapsed time in bytes */
2175         bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2176                                            port->inv_cycles_per_byte);
2177
2178         /* Advance port time */
2179         port->time_cpu_cycles = cycles;
2180         port->time_cpu_bytes += bytes_diff;
2181         if (port->time < port->time_cpu_bytes)
2182                 port->time = port->time_cpu_bytes;
2183
2184         /* Reset pipe loop detection */
2185         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2186 }
2187
2188 static inline int
2189 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2190 {
2191         int exceptions;
2192
2193         /* Check if any exception flag is set */
2194         exceptions = (second_pass && port->busy_grinders == 0) ||
2195                 (port->pipe_exhaustion == 1);
2196
2197         /* Clear exception flags */
2198         port->pipe_exhaustion = 0;
2199
2200         return exceptions;
2201 }
2202
2203 int
2204 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2205 {
2206         uint32_t i, count;
2207
2208         port->pkts_out = pkts;
2209         port->n_pkts_out = 0;
2210
2211         rte_sched_port_time_resync(port);
2212
2213         /* Take each queue in the grinder one step further */
2214         for (i = 0, count = 0; ; i++)  {
2215                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2216                 if ((count == n_pkts) ||
2217                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2218                         break;
2219                 }
2220         }
2221
2222         return count;
2223 }