4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
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14 * notice, this list of conditions and the following disclaimer in
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <rte_common.h>
39 #include <rte_memory.h>
40 #include <rte_malloc.h>
41 #include <rte_cycles.h>
42 #include <rte_prefetch.h>
43 #include <rte_branch_prediction.h>
46 #include "rte_sched.h"
47 #include "rte_bitmap.h"
48 #include "rte_sched_common.h"
49 #include "rte_approx.h"
51 #ifdef __INTEL_COMPILER
52 #pragma warning(disable:2259) /* conversion may lose significant bits */
55 #ifdef RTE_SCHED_VECTOR
56 #include <immintrin.h>
59 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
60 #define RTE_SCHED_WRR_SHIFT 3
61 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
62 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
63 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
65 struct rte_sched_subport {
66 /* Token bucket (TB) */
67 uint64_t tb_time; /* time of last update */
69 uint32_t tb_credits_per_period;
73 /* Traffic classes (TCs) */
74 uint64_t tc_time; /* time of next update */
75 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
76 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
79 /* TC oversubscription */
81 uint32_t tc_ov_wm_min;
82 uint32_t tc_ov_wm_max;
83 uint8_t tc_ov_period_id;
89 struct rte_sched_subport_stats stats;
92 struct rte_sched_pipe_profile {
93 /* Token bucket (TB) */
95 uint32_t tb_credits_per_period;
98 /* Pipe traffic classes */
100 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
101 uint8_t tc_ov_weight;
104 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
107 struct rte_sched_pipe {
108 /* Token bucket (TB) */
109 uint64_t tb_time; /* time of last update */
112 /* Pipe profile and flags */
115 /* Traffic classes (TCs) */
116 uint64_t tc_time; /* time of next update */
117 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
119 /* Weighted Round Robin (WRR) */
120 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
122 /* TC oversubscription */
123 uint32_t tc_ov_credits;
124 uint8_t tc_ov_period_id;
126 } __rte_cache_aligned;
128 struct rte_sched_queue {
133 struct rte_sched_queue_extra {
134 struct rte_sched_queue_stats stats;
141 e_GRINDER_PREFETCH_PIPE = 0,
142 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
143 e_GRINDER_PREFETCH_MBUF,
148 * Path through the scheduler hierarchy used by the scheduler enqueue
149 * operation to identify the destination queue for the current
150 * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
151 * each packet, typically written by the classification stage and read
152 * by scheduler enqueue.
154 struct rte_sched_port_hierarchy {
155 uint32_t queue:2; /**< Queue ID (0 .. 3) */
156 uint32_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/
157 uint32_t pipe:20; /**< Pipe ID */
158 uint32_t subport:6; /**< Subport ID */
159 uint32_t color:2; /**< Color */
162 struct rte_sched_grinder {
164 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
165 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
170 enum grinder_state state;
173 struct rte_sched_subport *subport;
174 struct rte_sched_pipe *pipe;
175 struct rte_sched_pipe_profile *pipe_params;
178 uint8_t tccache_qmask[4];
179 uint32_t tccache_qindex[4];
185 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
186 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
187 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
191 struct rte_mbuf *pkt;
194 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
195 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
196 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
199 struct rte_sched_port {
200 /* User parameters */
201 uint32_t n_subports_per_port;
202 uint32_t n_pipes_per_subport;
205 uint32_t frame_overhead;
206 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
207 uint32_t n_pipe_profiles;
208 uint32_t pipe_tc3_rate_max;
210 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
214 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
215 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
216 uint64_t time; /* Current NIC TX time measured in bytes */
217 double cycles_per_byte; /* CPU cycles per byte */
219 /* Scheduling loop detection */
221 uint32_t pipe_exhaustion;
224 struct rte_bitmap *bmp;
225 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
228 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
229 uint32_t busy_grinders;
230 struct rte_mbuf **pkts_out;
233 /* Queue base calculation */
234 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
237 /* Large data structures */
238 struct rte_sched_subport *subport;
239 struct rte_sched_pipe *pipe;
240 struct rte_sched_queue *queue;
241 struct rte_sched_queue_extra *queue_extra;
242 struct rte_sched_pipe_profile *pipe_profiles;
244 struct rte_mbuf **queue_array;
245 uint8_t memory[0] __rte_cache_aligned;
246 } __rte_cache_aligned;
248 enum rte_sched_port_array {
249 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
250 e_RTE_SCHED_PORT_ARRAY_PIPE,
251 e_RTE_SCHED_PORT_ARRAY_QUEUE,
252 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
253 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
254 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
255 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
256 e_RTE_SCHED_PORT_ARRAY_TOTAL,
259 #ifdef RTE_SCHED_COLLECT_STATS
261 static inline uint32_t
262 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
264 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
269 static inline uint32_t
270 rte_sched_port_queues_per_port(struct rte_sched_port *port)
272 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
276 rte_sched_port_check_params(struct rte_sched_port_params *params)
284 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
288 if (params->rate == 0)
292 if (params->mtu == 0)
295 /* n_subports_per_port: non-zero, power of 2 */
296 if (params->n_subports_per_port == 0 ||
297 !rte_is_power_of_2(params->n_subports_per_port))
300 /* n_pipes_per_subport: non-zero, power of 2 */
301 if (params->n_pipes_per_subport == 0 ||
302 !rte_is_power_of_2(params->n_pipes_per_subport))
305 /* qsize: non-zero, power of 2,
306 * no bigger than 32K (due to 16-bit read/write pointers)
308 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
309 uint16_t qsize = params->qsize[i];
311 if (qsize == 0 || !rte_is_power_of_2(qsize))
315 /* pipe_profiles and n_pipe_profiles */
316 if (params->pipe_profiles == NULL ||
317 params->n_pipe_profiles == 0 ||
318 params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
321 for (i = 0; i < params->n_pipe_profiles; i++) {
322 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
324 /* TB rate: non-zero, not greater than port rate */
325 if (p->tb_rate == 0 || p->tb_rate > params->rate)
328 /* TB size: non-zero */
332 /* TC rate: non-zero, less than pipe rate */
333 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
334 if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
338 /* TC period: non-zero */
339 if (p->tc_period == 0)
342 #ifdef RTE_SCHED_SUBPORT_TC_OV
343 /* TC3 oversubscription weight: non-zero */
344 if (p->tc_ov_weight == 0)
348 /* Queue WRR weights: non-zero */
349 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
350 if (p->wrr_weights[j] == 0)
359 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
361 uint32_t n_subports_per_port = params->n_subports_per_port;
362 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
363 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
364 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
366 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
367 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
368 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
369 uint32_t size_queue_extra
370 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
371 uint32_t size_pipe_profiles
372 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
373 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
374 uint32_t size_per_pipe_queue_array, size_queue_array;
378 size_per_pipe_queue_array = 0;
379 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
380 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
381 * params->qsize[i] * sizeof(struct rte_mbuf *);
383 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
387 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
389 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
391 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
393 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
395 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
397 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
399 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
401 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
403 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
405 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
407 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
409 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
411 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
413 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
419 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
421 uint32_t size0, size1;
424 status = rte_sched_port_check_params(params);
426 RTE_LOG(NOTICE, SCHED,
427 "Port scheduler params check failed (%d)\n", status);
432 size0 = sizeof(struct rte_sched_port);
433 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
435 return (size0 + size1);
439 rte_sched_port_config_qsize(struct rte_sched_port *port)
442 port->qsize_add[0] = 0;
443 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
444 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
445 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
448 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
449 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
450 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
451 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
454 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
455 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
456 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
457 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
460 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
461 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
462 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
463 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
465 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
469 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
471 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
473 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
474 " Token bucket: period = %u, credits per period = %u, size = %u\n"
475 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
476 " Traffic class 3 oversubscription: weight = %hhu\n"
477 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
482 p->tb_credits_per_period,
485 /* Traffic classes */
487 p->tc_credits_per_period[0],
488 p->tc_credits_per_period[1],
489 p->tc_credits_per_period[2],
490 p->tc_credits_per_period[3],
492 /* Traffic class 3 oversubscription */
496 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
497 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
498 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
499 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
502 static inline uint64_t
503 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
505 uint64_t time = time_ms;
507 time = (time * rate) / 1000;
513 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
517 for (i = 0; i < port->n_pipe_profiles; i++) {
518 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
519 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
522 if (src->tb_rate == params->rate) {
523 dst->tb_credits_per_period = 1;
526 double tb_rate = (double) src->tb_rate
527 / (double) params->rate;
528 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
530 rte_approx(tb_rate, d,
531 &dst->tb_credits_per_period, &dst->tb_period);
533 dst->tb_size = src->tb_size;
535 /* Traffic Classes */
536 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
539 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
540 dst->tc_credits_per_period[j]
541 = rte_sched_time_ms_to_bytes(src->tc_period,
544 #ifdef RTE_SCHED_SUBPORT_TC_OV
545 dst->tc_ov_weight = src->tc_ov_weight;
549 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
550 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
551 uint32_t lcd, lcd1, lcd2;
554 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
556 wrr_cost[0] = src->wrr_weights[qindex];
557 wrr_cost[1] = src->wrr_weights[qindex + 1];
558 wrr_cost[2] = src->wrr_weights[qindex + 2];
559 wrr_cost[3] = src->wrr_weights[qindex + 3];
561 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
562 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
563 lcd = rte_get_lcd(lcd1, lcd2);
565 wrr_cost[0] = lcd / wrr_cost[0];
566 wrr_cost[1] = lcd / wrr_cost[1];
567 wrr_cost[2] = lcd / wrr_cost[2];
568 wrr_cost[3] = lcd / wrr_cost[3];
570 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
571 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
572 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
573 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
576 rte_sched_port_log_pipe_profile(port, i);
579 port->pipe_tc3_rate_max = 0;
580 for (i = 0; i < port->n_pipe_profiles; i++) {
581 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
582 uint32_t pipe_tc3_rate = src->tc_rate[3];
584 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
585 port->pipe_tc3_rate_max = pipe_tc3_rate;
589 struct rte_sched_port *
590 rte_sched_port_config(struct rte_sched_port_params *params)
592 struct rte_sched_port *port = NULL;
593 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
595 /* Check user parameters. Determine the amount of memory to allocate */
596 mem_size = rte_sched_port_get_memory_footprint(params);
600 /* Allocate memory to store the data structures */
601 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
605 /* compile time checks */
606 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
607 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
609 /* User parameters */
610 port->n_subports_per_port = params->n_subports_per_port;
611 port->n_pipes_per_subport = params->n_pipes_per_subport;
612 port->rate = params->rate;
613 port->mtu = params->mtu + params->frame_overhead;
614 port->frame_overhead = params->frame_overhead;
615 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
616 port->n_pipe_profiles = params->n_pipe_profiles;
619 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
622 for (j = 0; j < e_RTE_METER_COLORS; j++) {
623 /* if min/max are both zero, then RED is disabled */
624 if ((params->red_params[i][j].min_th |
625 params->red_params[i][j].max_th) == 0) {
629 if (rte_red_config_init(&port->red_config[i][j],
630 params->red_params[i][j].wq_log2,
631 params->red_params[i][j].min_th,
632 params->red_params[i][j].max_th,
633 params->red_params[i][j].maxp_inv) != 0) {
641 port->time_cpu_cycles = rte_get_tsc_cycles();
642 port->time_cpu_bytes = 0;
644 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
646 /* Scheduling loop detection */
647 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
648 port->pipe_exhaustion = 0;
651 port->busy_grinders = 0;
652 port->pkts_out = NULL;
653 port->n_pkts_out = 0;
655 /* Queue base calculation */
656 rte_sched_port_config_qsize(port);
658 /* Large data structures */
659 port->subport = (struct rte_sched_subport *)
660 (port->memory + rte_sched_port_get_array_base(params,
661 e_RTE_SCHED_PORT_ARRAY_SUBPORT));
662 port->pipe = (struct rte_sched_pipe *)
663 (port->memory + rte_sched_port_get_array_base(params,
664 e_RTE_SCHED_PORT_ARRAY_PIPE));
665 port->queue = (struct rte_sched_queue *)
666 (port->memory + rte_sched_port_get_array_base(params,
667 e_RTE_SCHED_PORT_ARRAY_QUEUE));
668 port->queue_extra = (struct rte_sched_queue_extra *)
669 (port->memory + rte_sched_port_get_array_base(params,
670 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
671 port->pipe_profiles = (struct rte_sched_pipe_profile *)
672 (port->memory + rte_sched_port_get_array_base(params,
673 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
674 port->bmp_array = port->memory
675 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
676 port->queue_array = (struct rte_mbuf **)
677 (port->memory + rte_sched_port_get_array_base(params,
678 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
680 /* Pipe profile table */
681 rte_sched_port_config_pipe_profile_table(port, params);
684 n_queues_per_port = rte_sched_port_queues_per_port(port);
685 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
686 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
688 if (port->bmp == NULL) {
689 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
693 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
694 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
701 rte_sched_port_free(struct rte_sched_port *port)
703 /* Check user parameters */
707 rte_bitmap_free(port->bmp);
712 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
714 struct rte_sched_subport *s = port->subport + i;
716 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
717 " Token bucket: period = %u, credits per period = %u, size = %u\n"
718 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
719 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
724 s->tb_credits_per_period,
727 /* Traffic classes */
729 s->tc_credits_per_period[0],
730 s->tc_credits_per_period[1],
731 s->tc_credits_per_period[2],
732 s->tc_credits_per_period[3],
734 /* Traffic class 3 oversubscription */
740 rte_sched_subport_config(struct rte_sched_port *port,
742 struct rte_sched_subport_params *params)
744 struct rte_sched_subport *s;
747 /* Check user parameters */
749 subport_id >= port->n_subports_per_port ||
753 if (params->tb_rate == 0 || params->tb_rate > port->rate)
756 if (params->tb_size == 0)
759 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
760 if (params->tc_rate[i] == 0 ||
761 params->tc_rate[i] > params->tb_rate)
765 if (params->tc_period == 0)
768 s = port->subport + subport_id;
770 /* Token Bucket (TB) */
771 if (params->tb_rate == port->rate) {
772 s->tb_credits_per_period = 1;
775 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
776 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
778 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
781 s->tb_size = params->tb_size;
782 s->tb_time = port->time;
783 s->tb_credits = s->tb_size / 2;
785 /* Traffic Classes (TCs) */
786 s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
787 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
788 s->tc_credits_per_period[i]
789 = rte_sched_time_ms_to_bytes(params->tc_period,
792 s->tc_time = port->time + s->tc_period;
793 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
794 s->tc_credits[i] = s->tc_credits_per_period[i];
796 #ifdef RTE_SCHED_SUBPORT_TC_OV
797 /* TC oversubscription */
798 s->tc_ov_wm_min = port->mtu;
799 s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
800 port->pipe_tc3_rate_max);
801 s->tc_ov_wm = s->tc_ov_wm_max;
802 s->tc_ov_period_id = 0;
808 rte_sched_port_log_subport_config(port, subport_id);
814 rte_sched_pipe_config(struct rte_sched_port *port,
817 int32_t pipe_profile)
819 struct rte_sched_subport *s;
820 struct rte_sched_pipe *p;
821 struct rte_sched_pipe_profile *params;
822 uint32_t deactivate, profile, i;
824 /* Check user parameters */
825 profile = (uint32_t) pipe_profile;
826 deactivate = (pipe_profile < 0);
829 subport_id >= port->n_subports_per_port ||
830 pipe_id >= port->n_pipes_per_subport ||
831 (!deactivate && profile >= port->n_pipe_profiles))
835 /* Check that subport configuration is valid */
836 s = port->subport + subport_id;
837 if (s->tb_period == 0)
840 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
842 /* Handle the case when pipe already has a valid configuration */
844 params = port->pipe_profiles + p->profile;
846 #ifdef RTE_SCHED_SUBPORT_TC_OV
847 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
848 / (double) s->tc_period;
849 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
850 / (double) params->tc_period;
851 uint32_t tc3_ov = s->tc_ov;
853 /* Unplug pipe from its subport */
854 s->tc_ov_n -= params->tc_ov_weight;
855 s->tc_ov_rate -= pipe_tc3_rate;
856 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
858 if (s->tc_ov != tc3_ov) {
859 RTE_LOG(DEBUG, SCHED,
860 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
861 subport_id, subport_tc3_rate, s->tc_ov_rate);
866 memset(p, 0, sizeof(struct rte_sched_pipe));
872 /* Apply the new pipe configuration */
873 p->profile = profile;
874 params = port->pipe_profiles + p->profile;
876 /* Token Bucket (TB) */
877 p->tb_time = port->time;
878 p->tb_credits = params->tb_size / 2;
880 /* Traffic Classes (TCs) */
881 p->tc_time = port->time + params->tc_period;
882 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
883 p->tc_credits[i] = params->tc_credits_per_period[i];
885 #ifdef RTE_SCHED_SUBPORT_TC_OV
887 /* Subport TC3 oversubscription */
888 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
889 / (double) s->tc_period;
890 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
891 / (double) params->tc_period;
892 uint32_t tc3_ov = s->tc_ov;
894 s->tc_ov_n += params->tc_ov_weight;
895 s->tc_ov_rate += pipe_tc3_rate;
896 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
898 if (s->tc_ov != tc3_ov) {
899 RTE_LOG(DEBUG, SCHED,
900 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
901 subport_id, subport_tc3_rate, s->tc_ov_rate);
903 p->tc_ov_period_id = s->tc_ov_period_id;
904 p->tc_ov_credits = s->tc_ov_wm;
912 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
913 uint32_t subport, uint32_t pipe, uint32_t traffic_class,
914 uint32_t queue, enum rte_meter_color color)
916 struct rte_sched_port_hierarchy *sched
917 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
919 sched->color = (uint32_t) color;
920 sched->subport = subport;
922 sched->traffic_class = traffic_class;
923 sched->queue = queue;
927 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
928 uint32_t *subport, uint32_t *pipe,
929 uint32_t *traffic_class, uint32_t *queue)
931 const struct rte_sched_port_hierarchy *sched
932 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
934 *subport = sched->subport;
936 *traffic_class = sched->traffic_class;
937 *queue = sched->queue;
941 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
943 const struct rte_sched_port_hierarchy *sched
944 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
946 return (enum rte_meter_color) sched->color;
950 rte_sched_subport_read_stats(struct rte_sched_port *port,
952 struct rte_sched_subport_stats *stats,
955 struct rte_sched_subport *s;
957 /* Check user parameters */
958 if (port == NULL || subport_id >= port->n_subports_per_port ||
959 stats == NULL || tc_ov == NULL)
962 s = port->subport + subport_id;
964 /* Copy subport stats and clear */
965 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
966 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
968 /* Subport TC ovesubscription status */
975 rte_sched_queue_read_stats(struct rte_sched_port *port,
977 struct rte_sched_queue_stats *stats,
980 struct rte_sched_queue *q;
981 struct rte_sched_queue_extra *qe;
983 /* Check user parameters */
984 if ((port == NULL) ||
985 (queue_id >= rte_sched_port_queues_per_port(port)) ||
990 q = port->queue + queue_id;
991 qe = port->queue_extra + queue_id;
993 /* Copy queue stats and clear */
994 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
995 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
998 *qlen = q->qw - q->qr;
1003 static inline uint32_t
1004 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1008 result = subport * port->n_pipes_per_subport + pipe;
1009 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1010 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1015 static inline struct rte_mbuf **
1016 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
1018 uint32_t pindex = qindex >> 4;
1019 uint32_t qpos = qindex & 0xF;
1021 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
1024 static inline uint16_t
1025 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
1027 uint32_t tc = (qindex >> 2) & 0x3;
1029 return port->qsize[tc];
1032 #ifdef RTE_SCHED_DEBUG
1035 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1037 struct rte_sched_queue *queue = port->queue + qindex;
1039 return (queue->qr == queue->qw);
1043 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1045 struct rte_sched_queue *queue = port->queue + qindex;
1046 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1047 uint16_t qlen = queue->qw - queue->qr;
1049 return (qlen >= qsize);
1052 #endif /* RTE_SCHED_DEBUG */
1054 #ifdef RTE_SCHED_COLLECT_STATS
1057 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1059 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1060 uint32_t tc_index = (qindex >> 2) & 0x3;
1061 uint32_t pkt_len = pkt->pkt_len;
1063 s->stats.n_pkts_tc[tc_index] += 1;
1064 s->stats.n_bytes_tc[tc_index] += pkt_len;
1068 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1070 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1071 uint32_t tc_index = (qindex >> 2) & 0x3;
1072 uint32_t pkt_len = pkt->pkt_len;
1074 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1075 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1079 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1081 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1082 uint32_t pkt_len = pkt->pkt_len;
1084 qe->stats.n_pkts += 1;
1085 qe->stats.n_bytes += pkt_len;
1089 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1091 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1092 uint32_t pkt_len = pkt->pkt_len;
1094 qe->stats.n_pkts_dropped += 1;
1095 qe->stats.n_bytes_dropped += pkt_len;
1098 #endif /* RTE_SCHED_COLLECT_STATS */
1100 #ifdef RTE_SCHED_RED
1103 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1105 struct rte_sched_queue_extra *qe;
1106 struct rte_red_config *red_cfg;
1107 struct rte_red *red;
1109 enum rte_meter_color color;
1111 tc_index = (qindex >> 2) & 0x3;
1112 color = rte_sched_port_pkt_read_color(pkt);
1113 red_cfg = &port->red_config[tc_index][color];
1115 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1118 qe = port->queue_extra + qindex;
1121 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1125 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1127 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1128 struct rte_red *red = &qe->red;
1130 rte_red_mark_queue_empty(red, port->time);
1135 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1137 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1139 #endif /* RTE_SCHED_RED */
1141 #ifdef RTE_SCHED_DEBUG
1144 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1148 qindex = pindex << 4;
1150 for (i = 0; i < 16; i++) {
1151 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1152 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1154 if (queue_empty != bmp_bit_clear)
1155 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1165 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1172 rte_panic("Empty slab at position %u\n", bmp_pos);
1175 for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1176 if (mask & bmp_slab) {
1177 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1178 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1185 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1189 #endif /* RTE_SCHED_DEBUG */
1191 static inline uint32_t
1192 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1193 struct rte_mbuf *pkt)
1195 struct rte_sched_queue *q;
1196 #ifdef RTE_SCHED_COLLECT_STATS
1197 struct rte_sched_queue_extra *qe;
1199 uint32_t subport, pipe, traffic_class, queue, qindex;
1201 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1203 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1204 q = port->queue + qindex;
1206 #ifdef RTE_SCHED_COLLECT_STATS
1207 qe = port->queue_extra + qindex;
1215 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1216 uint32_t qindex, struct rte_mbuf **qbase)
1218 struct rte_sched_queue *q;
1219 struct rte_mbuf **q_qw;
1222 q = port->queue + qindex;
1223 qsize = rte_sched_port_qsize(port, qindex);
1224 q_qw = qbase + (q->qw & (qsize - 1));
1226 rte_prefetch0(q_qw);
1227 rte_bitmap_prefetch0(port->bmp, qindex);
1231 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1232 struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1234 struct rte_sched_queue *q;
1238 q = port->queue + qindex;
1239 qsize = rte_sched_port_qsize(port, qindex);
1240 qlen = q->qw - q->qr;
1242 /* Drop the packet (and update drop stats) when queue is full */
1243 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1245 rte_pktmbuf_free(pkt);
1246 #ifdef RTE_SCHED_COLLECT_STATS
1247 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1248 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1253 /* Enqueue packet */
1254 qbase[q->qw & (qsize - 1)] = pkt;
1257 /* Activate queue in the port bitmap */
1258 rte_bitmap_set(port->bmp, qindex);
1261 #ifdef RTE_SCHED_COLLECT_STATS
1262 rte_sched_port_update_subport_stats(port, qindex, pkt);
1263 rte_sched_port_update_queue_stats(port, qindex, pkt);
1271 * The enqueue function implements a 4-level pipeline with each stage
1272 * processing two different packets. The purpose of using a pipeline
1273 * is to hide the latency of prefetching the data structures. The
1274 * naming convention is presented in the diagram below:
1276 * p00 _______ p10 _______ p20 _______ p30 _______
1277 * ----->| |----->| |----->| |----->| |----->
1278 * | 0 | | 1 | | 2 | | 3 |
1279 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1284 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1287 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1288 *pkt30, *pkt31, *pkt_last;
1289 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1290 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1291 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1292 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1298 * Less then 6 input packets available, which is not enough to
1301 if (unlikely(n_pkts < 6)) {
1302 struct rte_mbuf **q_base[5];
1305 /* Prefetch the mbuf structure of each packet */
1306 for (i = 0; i < n_pkts; i++)
1307 rte_prefetch0(pkts[i]);
1309 /* Prefetch the queue structure for each queue */
1310 for (i = 0; i < n_pkts; i++)
1311 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1314 /* Prefetch the write pointer location of each queue */
1315 for (i = 0; i < n_pkts; i++) {
1316 q_base[i] = rte_sched_port_qbase(port, q[i]);
1317 rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1321 /* Write each packet to its queue */
1322 for (i = 0; i < n_pkts; i++)
1323 result += rte_sched_port_enqueue_qwa(port, q[i],
1324 q_base[i], pkts[i]);
1329 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1332 rte_prefetch0(pkt20);
1333 rte_prefetch0(pkt21);
1337 rte_prefetch0(pkt10);
1338 rte_prefetch0(pkt11);
1340 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1341 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1345 rte_prefetch0(pkt00);
1346 rte_prefetch0(pkt01);
1348 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1349 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1351 q20_base = rte_sched_port_qbase(port, q20);
1352 q21_base = rte_sched_port_qbase(port, q21);
1353 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1354 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1356 /* Run the pipeline */
1357 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1358 /* Propagate stage inputs */
1369 q30_base = q20_base;
1370 q31_base = q21_base;
1372 /* Stage 0: Get packets in */
1374 pkt01 = pkts[i + 1];
1375 rte_prefetch0(pkt00);
1376 rte_prefetch0(pkt01);
1378 /* Stage 1: Prefetch queue structure storing queue pointers */
1379 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1380 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1382 /* Stage 2: Prefetch queue write location */
1383 q20_base = rte_sched_port_qbase(port, q20);
1384 q21_base = rte_sched_port_qbase(port, q21);
1385 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1386 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1388 /* Stage 3: Write packet to queue and activate queue */
1389 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1390 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1391 result += r30 + r31;
1395 * Drain the pipeline (exactly 6 packets).
1396 * Handle the last packet in the case
1397 * of an odd number of input packets.
1399 pkt_last = pkts[n_pkts - 1];
1400 rte_prefetch0(pkt_last);
1402 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1403 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1405 q10_base = rte_sched_port_qbase(port, q10);
1406 q11_base = rte_sched_port_qbase(port, q11);
1407 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1408 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1410 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1411 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1412 result += r20 + r21;
1414 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1416 q00_base = rte_sched_port_qbase(port, q00);
1417 q01_base = rte_sched_port_qbase(port, q01);
1418 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1419 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1421 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1422 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1423 result += r10 + r11;
1425 q_last_base = rte_sched_port_qbase(port, q_last);
1426 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1428 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1429 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1430 result += r00 + r01;
1433 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1440 #ifndef RTE_SCHED_SUBPORT_TC_OV
1443 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1445 struct rte_sched_grinder *grinder = port->grinder + pos;
1446 struct rte_sched_subport *subport = grinder->subport;
1447 struct rte_sched_pipe *pipe = grinder->pipe;
1448 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1452 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1453 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1454 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1455 subport->tb_time += n_periods * subport->tb_period;
1458 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1459 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1460 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1461 pipe->tb_time += n_periods * params->tb_period;
1464 if (unlikely(port->time >= subport->tc_time)) {
1465 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1466 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1467 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1468 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1469 subport->tc_time = port->time + subport->tc_period;
1473 if (unlikely(port->time >= pipe->tc_time)) {
1474 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1475 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1476 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1477 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1478 pipe->tc_time = port->time + params->tc_period;
1484 static inline uint32_t
1485 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1487 struct rte_sched_grinder *grinder = port->grinder + pos;
1488 struct rte_sched_subport *subport = grinder->subport;
1489 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1490 uint32_t tc_ov_consumption_max;
1491 uint32_t tc_ov_wm = subport->tc_ov_wm;
1493 if (subport->tc_ov == 0)
1494 return subport->tc_ov_wm_max;
1496 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1497 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1498 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1499 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1501 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1502 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1504 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1505 tc_ov_wm -= tc_ov_wm >> 7;
1506 if (tc_ov_wm < subport->tc_ov_wm_min)
1507 tc_ov_wm = subport->tc_ov_wm_min;
1512 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1513 if (tc_ov_wm > subport->tc_ov_wm_max)
1514 tc_ov_wm = subport->tc_ov_wm_max;
1520 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1522 struct rte_sched_grinder *grinder = port->grinder + pos;
1523 struct rte_sched_subport *subport = grinder->subport;
1524 struct rte_sched_pipe *pipe = grinder->pipe;
1525 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1529 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1530 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1531 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1532 subport->tb_time += n_periods * subport->tb_period;
1535 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1536 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1537 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1538 pipe->tb_time += n_periods * params->tb_period;
1541 if (unlikely(port->time >= subport->tc_time)) {
1542 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1544 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1545 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1546 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1547 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1549 subport->tc_time = port->time + subport->tc_period;
1550 subport->tc_ov_period_id++;
1554 if (unlikely(port->time >= pipe->tc_time)) {
1555 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1556 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1557 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1558 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1559 pipe->tc_time = port->time + params->tc_period;
1562 /* Pipe TCs - Oversubscription */
1563 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1564 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1566 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1570 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1573 #ifndef RTE_SCHED_SUBPORT_TC_OV
1576 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1578 struct rte_sched_grinder *grinder = port->grinder + pos;
1579 struct rte_sched_subport *subport = grinder->subport;
1580 struct rte_sched_pipe *pipe = grinder->pipe;
1581 struct rte_mbuf *pkt = grinder->pkt;
1582 uint32_t tc_index = grinder->tc_index;
1583 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1584 uint32_t subport_tb_credits = subport->tb_credits;
1585 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1586 uint32_t pipe_tb_credits = pipe->tb_credits;
1587 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1590 /* Check queue credits */
1591 enough_credits = (pkt_len <= subport_tb_credits) &&
1592 (pkt_len <= subport_tc_credits) &&
1593 (pkt_len <= pipe_tb_credits) &&
1594 (pkt_len <= pipe_tc_credits);
1596 if (!enough_credits)
1599 /* Update port credits */
1600 subport->tb_credits -= pkt_len;
1601 subport->tc_credits[tc_index] -= pkt_len;
1602 pipe->tb_credits -= pkt_len;
1603 pipe->tc_credits[tc_index] -= pkt_len;
1611 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1613 struct rte_sched_grinder *grinder = port->grinder + pos;
1614 struct rte_sched_subport *subport = grinder->subport;
1615 struct rte_sched_pipe *pipe = grinder->pipe;
1616 struct rte_mbuf *pkt = grinder->pkt;
1617 uint32_t tc_index = grinder->tc_index;
1618 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1619 uint32_t subport_tb_credits = subport->tb_credits;
1620 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1621 uint32_t pipe_tb_credits = pipe->tb_credits;
1622 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1623 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1624 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1625 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1628 /* Check pipe and subport credits */
1629 enough_credits = (pkt_len <= subport_tb_credits) &&
1630 (pkt_len <= subport_tc_credits) &&
1631 (pkt_len <= pipe_tb_credits) &&
1632 (pkt_len <= pipe_tc_credits) &&
1633 (pkt_len <= pipe_tc_ov_credits);
1635 if (!enough_credits)
1638 /* Update pipe and subport credits */
1639 subport->tb_credits -= pkt_len;
1640 subport->tc_credits[tc_index] -= pkt_len;
1641 pipe->tb_credits -= pkt_len;
1642 pipe->tc_credits[tc_index] -= pkt_len;
1643 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1648 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1652 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1654 struct rte_sched_grinder *grinder = port->grinder + pos;
1655 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1656 struct rte_mbuf *pkt = grinder->pkt;
1657 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1659 if (!grinder_credits_check(port, pos))
1662 /* Advance port time */
1663 port->time += pkt_len;
1666 port->pkts_out[port->n_pkts_out++] = pkt;
1668 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1669 if (queue->qr == queue->qw) {
1670 uint32_t qindex = grinder->qindex[grinder->qpos];
1672 rte_bitmap_clear(port->bmp, qindex);
1673 grinder->qmask &= ~(1 << grinder->qpos);
1674 grinder->wrr_mask[grinder->qpos] = 0;
1675 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1678 /* Reset pipe loop detection */
1679 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1680 grinder->productive = 1;
1685 #ifdef RTE_SCHED_VECTOR
1688 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1690 __m128i index = _mm_set1_epi32(base_pipe);
1691 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1692 __m128i res = _mm_cmpeq_epi32(pipes, index);
1694 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1695 pipes = _mm_cmpeq_epi32(pipes, index);
1696 res = _mm_or_si128(res, pipes);
1698 if (_mm_testz_si128(res, res))
1707 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1711 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1712 if (port->grinder_base_bmp_pos[i] == base_pipe)
1719 #endif /* RTE_SCHED_OPTIMIZATIONS */
1722 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1724 struct rte_sched_grinder *grinder = port->grinder + pos;
1727 grinder->pcache_w = 0;
1728 grinder->pcache_r = 0;
1730 w[0] = (uint16_t) bmp_slab;
1731 w[1] = (uint16_t) (bmp_slab >> 16);
1732 w[2] = (uint16_t) (bmp_slab >> 32);
1733 w[3] = (uint16_t) (bmp_slab >> 48);
1735 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1736 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1737 grinder->pcache_w += (w[0] != 0);
1739 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1740 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1741 grinder->pcache_w += (w[1] != 0);
1743 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1744 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1745 grinder->pcache_w += (w[2] != 0);
1747 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1748 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1749 grinder->pcache_w += (w[3] != 0);
1753 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1755 struct rte_sched_grinder *grinder = port->grinder + pos;
1758 grinder->tccache_w = 0;
1759 grinder->tccache_r = 0;
1761 b[0] = (uint8_t) (qmask & 0xF);
1762 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1763 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1764 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1766 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1767 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1768 grinder->tccache_w += (b[0] != 0);
1770 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1771 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1772 grinder->tccache_w += (b[1] != 0);
1774 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1775 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1776 grinder->tccache_w += (b[2] != 0);
1778 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1779 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1780 grinder->tccache_w += (b[3] != 0);
1784 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1786 struct rte_sched_grinder *grinder = port->grinder + pos;
1787 struct rte_mbuf **qbase;
1791 if (grinder->tccache_r == grinder->tccache_w)
1794 qindex = grinder->tccache_qindex[grinder->tccache_r];
1795 qbase = rte_sched_port_qbase(port, qindex);
1796 qsize = rte_sched_port_qsize(port, qindex);
1798 grinder->tc_index = (qindex >> 2) & 0x3;
1799 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1800 grinder->qsize = qsize;
1802 grinder->qindex[0] = qindex;
1803 grinder->qindex[1] = qindex + 1;
1804 grinder->qindex[2] = qindex + 2;
1805 grinder->qindex[3] = qindex + 3;
1807 grinder->queue[0] = port->queue + qindex;
1808 grinder->queue[1] = port->queue + qindex + 1;
1809 grinder->queue[2] = port->queue + qindex + 2;
1810 grinder->queue[3] = port->queue + qindex + 3;
1812 grinder->qbase[0] = qbase;
1813 grinder->qbase[1] = qbase + qsize;
1814 grinder->qbase[2] = qbase + 2 * qsize;
1815 grinder->qbase[3] = qbase + 3 * qsize;
1817 grinder->tccache_r++;
1822 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1824 struct rte_sched_grinder *grinder = port->grinder + pos;
1825 uint32_t pipe_qindex;
1826 uint16_t pipe_qmask;
1828 if (grinder->pcache_r < grinder->pcache_w) {
1829 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1830 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1831 grinder->pcache_r++;
1833 uint64_t bmp_slab = 0;
1834 uint32_t bmp_pos = 0;
1836 /* Get another non-empty pipe group */
1837 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1840 #ifdef RTE_SCHED_DEBUG
1841 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1844 /* Return if pipe group already in one of the other grinders */
1845 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1846 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1849 port->grinder_base_bmp_pos[pos] = bmp_pos;
1851 /* Install new pipe group into grinder's pipe cache */
1852 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1854 pipe_qmask = grinder->pcache_qmask[0];
1855 pipe_qindex = grinder->pcache_qindex[0];
1856 grinder->pcache_r = 1;
1859 /* Install new pipe in the grinder */
1860 grinder->pindex = pipe_qindex >> 4;
1861 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1862 grinder->pipe = port->pipe + grinder->pindex;
1863 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1864 grinder->productive = 0;
1866 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1867 grinder_next_tc(port, pos);
1869 /* Check for pipe exhaustion */
1870 if (grinder->pindex == port->pipe_loop) {
1871 port->pipe_exhaustion = 1;
1872 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1880 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1882 struct rte_sched_grinder *grinder = port->grinder + pos;
1883 struct rte_sched_pipe *pipe = grinder->pipe;
1884 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1885 uint32_t tc_index = grinder->tc_index;
1886 uint32_t qmask = grinder->qmask;
1889 qindex = tc_index * 4;
1891 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1892 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1893 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1894 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1896 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1897 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1898 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1899 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1901 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1902 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1903 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1904 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1908 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1910 struct rte_sched_grinder *grinder = port->grinder + pos;
1911 struct rte_sched_pipe *pipe = grinder->pipe;
1912 uint32_t tc_index = grinder->tc_index;
1915 qindex = tc_index * 4;
1917 pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1918 >> RTE_SCHED_WRR_SHIFT;
1919 pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1920 >> RTE_SCHED_WRR_SHIFT;
1921 pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1922 >> RTE_SCHED_WRR_SHIFT;
1923 pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1924 >> RTE_SCHED_WRR_SHIFT;
1928 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1930 struct rte_sched_grinder *grinder = port->grinder + pos;
1931 uint16_t wrr_tokens_min;
1933 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1934 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1935 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1936 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1938 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1939 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1941 grinder->wrr_tokens[0] -= wrr_tokens_min;
1942 grinder->wrr_tokens[1] -= wrr_tokens_min;
1943 grinder->wrr_tokens[2] -= wrr_tokens_min;
1944 grinder->wrr_tokens[3] -= wrr_tokens_min;
1948 #define grinder_evict(port, pos)
1951 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1953 struct rte_sched_grinder *grinder = port->grinder + pos;
1955 rte_prefetch0(grinder->pipe);
1956 rte_prefetch0(grinder->queue[0]);
1960 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1962 struct rte_sched_grinder *grinder = port->grinder + pos;
1963 uint16_t qsize, qr[4];
1965 qsize = grinder->qsize;
1966 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1967 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1968 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1969 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1971 rte_prefetch0(grinder->qbase[0] + qr[0]);
1972 rte_prefetch0(grinder->qbase[1] + qr[1]);
1974 grinder_wrr_load(port, pos);
1975 grinder_wrr(port, pos);
1977 rte_prefetch0(grinder->qbase[2] + qr[2]);
1978 rte_prefetch0(grinder->qbase[3] + qr[3]);
1982 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1984 struct rte_sched_grinder *grinder = port->grinder + pos;
1985 uint32_t qpos = grinder->qpos;
1986 struct rte_mbuf **qbase = grinder->qbase[qpos];
1987 uint16_t qsize = grinder->qsize;
1988 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1990 grinder->pkt = qbase[qr];
1991 rte_prefetch0(grinder->pkt);
1993 if (unlikely((qr & 0x7) == 7)) {
1994 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1996 rte_prefetch0(qbase + qr_next);
2000 static inline uint32_t
2001 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2003 struct rte_sched_grinder *grinder = port->grinder + pos;
2005 switch (grinder->state) {
2006 case e_GRINDER_PREFETCH_PIPE:
2008 if (grinder_next_pipe(port, pos)) {
2009 grinder_prefetch_pipe(port, pos);
2010 port->busy_grinders++;
2012 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2019 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2021 struct rte_sched_pipe *pipe = grinder->pipe;
2023 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2024 grinder_prefetch_tc_queue_arrays(port, pos);
2025 grinder_credits_update(port, pos);
2027 grinder->state = e_GRINDER_PREFETCH_MBUF;
2031 case e_GRINDER_PREFETCH_MBUF:
2033 grinder_prefetch_mbuf(port, pos);
2035 grinder->state = e_GRINDER_READ_MBUF;
2039 case e_GRINDER_READ_MBUF:
2041 uint32_t result = 0;
2043 result = grinder_schedule(port, pos);
2045 /* Look for next packet within the same TC */
2046 if (result && grinder->qmask) {
2047 grinder_wrr(port, pos);
2048 grinder_prefetch_mbuf(port, pos);
2052 grinder_wrr_store(port, pos);
2054 /* Look for another active TC within same pipe */
2055 if (grinder_next_tc(port, pos)) {
2056 grinder_prefetch_tc_queue_arrays(port, pos);
2058 grinder->state = e_GRINDER_PREFETCH_MBUF;
2062 if (grinder->productive == 0 &&
2063 port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2064 port->pipe_loop = grinder->pindex;
2066 grinder_evict(port, pos);
2068 /* Look for another active pipe */
2069 if (grinder_next_pipe(port, pos)) {
2070 grinder_prefetch_pipe(port, pos);
2072 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2076 /* No active pipe found */
2077 port->busy_grinders--;
2079 grinder->state = e_GRINDER_PREFETCH_PIPE;
2084 rte_panic("Algorithmic error (invalid state)\n");
2090 rte_sched_port_time_resync(struct rte_sched_port *port)
2092 uint64_t cycles = rte_get_tsc_cycles();
2093 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2094 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2096 /* Advance port time */
2097 port->time_cpu_cycles = cycles;
2098 port->time_cpu_bytes += (uint64_t) bytes_diff;
2099 if (port->time < port->time_cpu_bytes)
2100 port->time = port->time_cpu_bytes;
2102 /* Reset pipe loop detection */
2103 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2107 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2111 /* Check if any exception flag is set */
2112 exceptions = (second_pass && port->busy_grinders == 0) ||
2113 (port->pipe_exhaustion == 1);
2115 /* Clear exception flags */
2116 port->pipe_exhaustion = 0;
2122 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2126 port->pkts_out = pkts;
2127 port->n_pkts_out = 0;
2129 rte_sched_port_time_resync(port);
2131 /* Take each queue in the grinder one step further */
2132 for (i = 0, count = 0; ; i++) {
2133 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2134 if ((count == n_pkts) ||
2135 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {