1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
5 #ifndef _RTE_VHOST_ASYNC_H_
6 #define _RTE_VHOST_ASYNC_H_
13 struct rte_vhost_iov_iter {
14 /** offset to the first byte of interesting data */
16 /** total bytes of data in this iterator */
18 /** pointer to the iovec array */
20 /** number of iovec in this iterator */
21 unsigned long nr_segs;
25 * dma transfer descriptor pair
27 struct rte_vhost_async_desc {
28 /** source memory iov_iter */
29 struct rte_vhost_iov_iter *src;
30 /** destination memory iov_iter */
31 struct rte_vhost_iov_iter *dst;
37 struct rte_vhost_async_status {
38 /** An array of application specific data for source memory */
39 uintptr_t *src_opaque_data;
40 /** An array of application specific data for destination memory */
41 uintptr_t *dst_opaque_data;
45 * dma operation callbacks to be implemented by applications
47 struct rte_vhost_async_channel_ops {
49 * instruct async engines to perform copies for a batch of packets
52 * id of vhost device to perform data copies
54 * queue id to perform data copies
56 * an array of DMA transfer memory descriptors
58 * opaque data pair sending to DMA engine
60 * number of elements in the "descs" array
62 * number of descs processed
64 uint32_t (*transfer_data)(int vid, uint16_t queue_id,
65 struct rte_vhost_async_desc *descs,
66 struct rte_vhost_async_status *opaque_data,
69 * check copy-completed packets from the async engine
71 * id of vhost device to check copy completion
73 * queue id to check copy completion
75 * buffer to receive the opaque data pair from DMA engine
77 * max number of packets could be completed
79 * number of async descs completed
81 uint32_t (*check_completed_copies)(int vid, uint16_t queue_id,
82 struct rte_vhost_async_status *opaque_data,
83 uint16_t max_packets);
87 * inflight async packet information
89 struct async_inflight_info {
93 uint16_t descs; /* num of descs inflight */
94 uint16_t segs; /* iov segs inflight */
100 * dma channel feature bit definition
102 struct rte_vhost_async_features {
106 uint32_t async_inorder:1;
108 uint32_t async_threshold:12;
115 * register a async channel for vhost
118 * vhost device id async channel to be attached to
120 * vhost queue id async channel to be attached to
122 * DMA channel feature bit
123 * b0 : DMA supports inorder data transfer
125 * b16 - b27: Packet length threshold for DMA transfer
126 * b28 - b31: reserved
128 * DMA operation callbacks
130 * 0 on success, -1 on failures
133 int rte_vhost_async_channel_register(int vid, uint16_t queue_id,
134 uint32_t features, struct rte_vhost_async_channel_ops *ops);
137 * unregister a dma channel for vhost
140 * vhost device id DMA channel to be detached
142 * vhost queue id DMA channel to be detached
144 * 0 on success, -1 on failures
147 int rte_vhost_async_channel_unregister(int vid, uint16_t queue_id);
150 * This function submit enqueue data to async engine. This function has
151 * no guranttee to the transfer completion upon return. Applications
152 * should poll transfer status by rte_vhost_poll_enqueue_completed()
155 * id of vhost device to enqueue data
157 * queue id to enqueue data
159 * array of packets to be enqueued
161 * packets num to be enqueued
163 * num of packets enqueued
166 uint16_t rte_vhost_submit_enqueue_burst(int vid, uint16_t queue_id,
167 struct rte_mbuf **pkts, uint16_t count);
170 * This function check async completion status for a specific vhost
171 * device queue. Packets which finish copying (enqueue) operation
172 * will be returned in an array.
175 * id of vhost device to enqueue data
177 * queue id to enqueue data
179 * blank array to get return packet pointer
181 * size of the packet array
183 * num of packets returned
186 uint16_t rte_vhost_poll_enqueue_completed(int vid, uint16_t queue_id,
187 struct rte_mbuf **pkts, uint16_t count);
189 #endif /* _RTE_VHOST_ASYNC_H_ */