1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
8 #include <rte_common.h>
10 #include <rte_memory.h>
11 #include <rte_malloc.h>
12 #include <rte_cycles.h>
13 #include <rte_prefetch.h>
14 #include <rte_branch_prediction.h>
16 #include <rte_bitmap.h>
18 #include "rte_sched.h"
19 #include "rte_sched_common.h"
20 #include "rte_approx.h"
21 #include "rte_reciprocal.h"
23 #ifdef __INTEL_COMPILER
24 #pragma warning(disable:2259) /* conversion may lose significant bits */
27 #ifdef RTE_SCHED_VECTOR
31 #define SCHED_VECTOR_SSE4
32 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
33 #define SCHED_VECTOR_NEON
38 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
39 #define RTE_SCHED_WRR_SHIFT 3
40 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
41 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
42 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
44 /* Scaling for cycles_per_byte calculation
45 * Chosen so that minimum rate is 480 bit/sec
47 #define RTE_SCHED_TIME_SHIFT 8
49 struct rte_sched_subport {
50 /* Token bucket (TB) */
51 uint64_t tb_time; /* time of last update */
53 uint32_t tb_credits_per_period;
57 /* Traffic classes (TCs) */
58 uint64_t tc_time; /* time of next update */
59 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
60 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
63 /* TC oversubscription */
65 uint32_t tc_ov_wm_min;
66 uint32_t tc_ov_wm_max;
67 uint8_t tc_ov_period_id;
73 struct rte_sched_subport_stats stats;
76 struct rte_sched_pipe_profile {
77 /* Token bucket (TB) */
79 uint32_t tb_credits_per_period;
82 /* Pipe traffic classes */
84 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
88 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
91 struct rte_sched_pipe {
92 /* Token bucket (TB) */
93 uint64_t tb_time; /* time of last update */
96 /* Pipe profile and flags */
99 /* Traffic classes (TCs) */
100 uint64_t tc_time; /* time of next update */
101 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
103 /* Weighted Round Robin (WRR) */
104 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
106 /* TC oversubscription */
107 uint32_t tc_ov_credits;
108 uint8_t tc_ov_period_id;
110 } __rte_cache_aligned;
112 struct rte_sched_queue {
117 struct rte_sched_queue_extra {
118 struct rte_sched_queue_stats stats;
125 e_GRINDER_PREFETCH_PIPE = 0,
126 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
127 e_GRINDER_PREFETCH_MBUF,
132 * Path through the scheduler hierarchy used by the scheduler enqueue
133 * operation to identify the destination queue for the current
134 * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
135 * each packet, typically written by the classification stage and read
136 * by scheduler enqueue.
138 struct rte_sched_port_hierarchy {
139 uint16_t queue:2; /**< Queue ID (0 .. 3) */
140 uint16_t traffic_class:2; /**< Traffic class ID (0 .. 3)*/
141 uint32_t color:2; /**< Color */
143 uint16_t subport; /**< Subport ID */
144 uint32_t pipe; /**< Pipe ID */
147 struct rte_sched_grinder {
149 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
150 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
155 enum grinder_state state;
158 struct rte_sched_subport *subport;
159 struct rte_sched_pipe *pipe;
160 struct rte_sched_pipe_profile *pipe_params;
163 uint8_t tccache_qmask[4];
164 uint32_t tccache_qindex[4];
170 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
171 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
172 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
176 struct rte_mbuf *pkt;
179 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
180 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
181 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
184 struct rte_sched_port {
185 /* User parameters */
186 uint32_t n_subports_per_port;
187 uint32_t n_pipes_per_subport;
190 uint32_t frame_overhead;
191 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
192 uint32_t n_pipe_profiles;
193 uint32_t pipe_tc3_rate_max;
195 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
199 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
200 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
201 uint64_t time; /* Current NIC TX time measured in bytes */
202 struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
204 /* Scheduling loop detection */
206 uint32_t pipe_exhaustion;
209 struct rte_bitmap *bmp;
210 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
213 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
214 uint32_t busy_grinders;
215 struct rte_mbuf **pkts_out;
218 /* Queue base calculation */
219 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
222 /* Large data structures */
223 struct rte_sched_subport *subport;
224 struct rte_sched_pipe *pipe;
225 struct rte_sched_queue *queue;
226 struct rte_sched_queue_extra *queue_extra;
227 struct rte_sched_pipe_profile *pipe_profiles;
229 struct rte_mbuf **queue_array;
230 uint8_t memory[0] __rte_cache_aligned;
231 } __rte_cache_aligned;
233 enum rte_sched_port_array {
234 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
235 e_RTE_SCHED_PORT_ARRAY_PIPE,
236 e_RTE_SCHED_PORT_ARRAY_QUEUE,
237 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
238 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
239 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
240 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
241 e_RTE_SCHED_PORT_ARRAY_TOTAL,
244 #ifdef RTE_SCHED_COLLECT_STATS
246 static inline uint32_t
247 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
249 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
254 static inline uint32_t
255 rte_sched_port_queues_per_port(struct rte_sched_port *port)
257 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
260 static inline struct rte_mbuf **
261 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
263 uint32_t pindex = qindex >> 4;
264 uint32_t qpos = qindex & 0xF;
266 return (port->queue_array + pindex *
267 port->qsize_sum + port->qsize_add[qpos]);
270 static inline uint16_t
271 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
273 uint32_t tc = (qindex >> 2) & 0x3;
275 return port->qsize[tc];
279 rte_sched_port_check_params(struct rte_sched_port_params *params)
287 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
291 if (params->rate == 0)
295 if (params->mtu == 0)
298 /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
299 if (params->n_subports_per_port == 0 ||
300 params->n_subports_per_port > 1u << 16 ||
301 !rte_is_power_of_2(params->n_subports_per_port))
304 /* n_pipes_per_subport: non-zero, power of 2 */
305 if (params->n_pipes_per_subport == 0 ||
306 !rte_is_power_of_2(params->n_pipes_per_subport))
309 /* qsize: non-zero, power of 2,
310 * no bigger than 32K (due to 16-bit read/write pointers)
312 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
313 uint16_t qsize = params->qsize[i];
315 if (qsize == 0 || !rte_is_power_of_2(qsize))
319 /* pipe_profiles and n_pipe_profiles */
320 if (params->pipe_profiles == NULL ||
321 params->n_pipe_profiles == 0 ||
322 params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
325 for (i = 0; i < params->n_pipe_profiles; i++) {
326 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
328 /* TB rate: non-zero, not greater than port rate */
329 if (p->tb_rate == 0 || p->tb_rate > params->rate)
332 /* TB size: non-zero */
336 /* TC rate: non-zero, less than pipe rate */
337 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
338 if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
342 /* TC period: non-zero */
343 if (p->tc_period == 0)
346 #ifdef RTE_SCHED_SUBPORT_TC_OV
347 /* TC3 oversubscription weight: non-zero */
348 if (p->tc_ov_weight == 0)
352 /* Queue WRR weights: non-zero */
353 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
354 if (p->wrr_weights[j] == 0)
363 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
365 uint32_t n_subports_per_port = params->n_subports_per_port;
366 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
367 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
368 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
370 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
371 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
372 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
373 uint32_t size_queue_extra
374 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
375 uint32_t size_pipe_profiles
376 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
377 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
378 uint32_t size_per_pipe_queue_array, size_queue_array;
382 size_per_pipe_queue_array = 0;
383 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
384 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
385 * params->qsize[i] * sizeof(struct rte_mbuf *);
387 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
391 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
393 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
395 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
397 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
399 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
401 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
403 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
405 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
407 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
409 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
411 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
413 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
415 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
417 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
423 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
425 uint32_t size0, size1;
428 status = rte_sched_port_check_params(params);
430 RTE_LOG(NOTICE, SCHED,
431 "Port scheduler params check failed (%d)\n", status);
436 size0 = sizeof(struct rte_sched_port);
437 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
439 return size0 + size1;
443 rte_sched_port_config_qsize(struct rte_sched_port *port)
446 port->qsize_add[0] = 0;
447 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
448 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
449 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
452 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
453 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
454 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
455 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
458 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
459 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
460 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
461 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
464 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
465 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
466 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
467 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
469 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
473 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
475 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
477 RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
478 " Token bucket: period = %u, credits per period = %u, size = %u\n"
479 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
480 " Traffic class 3 oversubscription: weight = %hhu\n"
481 " WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
486 p->tb_credits_per_period,
489 /* Traffic classes */
491 p->tc_credits_per_period[0],
492 p->tc_credits_per_period[1],
493 p->tc_credits_per_period[2],
494 p->tc_credits_per_period[3],
496 /* Traffic class 3 oversubscription */
500 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
501 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
502 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
503 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
506 static inline uint64_t
507 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
509 uint64_t time = time_ms;
511 time = (time * rate) / 1000;
517 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
521 for (i = 0; i < port->n_pipe_profiles; i++) {
522 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
523 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
526 if (src->tb_rate == params->rate) {
527 dst->tb_credits_per_period = 1;
530 double tb_rate = (double) src->tb_rate
531 / (double) params->rate;
532 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
534 rte_approx(tb_rate, d,
535 &dst->tb_credits_per_period, &dst->tb_period);
537 dst->tb_size = src->tb_size;
539 /* Traffic Classes */
540 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
543 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
544 dst->tc_credits_per_period[j]
545 = rte_sched_time_ms_to_bytes(src->tc_period,
548 #ifdef RTE_SCHED_SUBPORT_TC_OV
549 dst->tc_ov_weight = src->tc_ov_weight;
553 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
554 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
555 uint32_t lcd, lcd1, lcd2;
558 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
560 wrr_cost[0] = src->wrr_weights[qindex];
561 wrr_cost[1] = src->wrr_weights[qindex + 1];
562 wrr_cost[2] = src->wrr_weights[qindex + 2];
563 wrr_cost[3] = src->wrr_weights[qindex + 3];
565 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
566 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
567 lcd = rte_get_lcd(lcd1, lcd2);
569 wrr_cost[0] = lcd / wrr_cost[0];
570 wrr_cost[1] = lcd / wrr_cost[1];
571 wrr_cost[2] = lcd / wrr_cost[2];
572 wrr_cost[3] = lcd / wrr_cost[3];
574 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
575 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
576 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
577 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
580 rte_sched_port_log_pipe_profile(port, i);
583 port->pipe_tc3_rate_max = 0;
584 for (i = 0; i < port->n_pipe_profiles; i++) {
585 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
586 uint32_t pipe_tc3_rate = src->tc_rate[3];
588 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
589 port->pipe_tc3_rate_max = pipe_tc3_rate;
593 struct rte_sched_port *
594 rte_sched_port_config(struct rte_sched_port_params *params)
596 struct rte_sched_port *port = NULL;
597 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
599 /* Check user parameters. Determine the amount of memory to allocate */
600 mem_size = rte_sched_port_get_memory_footprint(params);
604 /* Allocate memory to store the data structures */
605 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
609 /* compile time checks */
610 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
611 RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
613 /* User parameters */
614 port->n_subports_per_port = params->n_subports_per_port;
615 port->n_pipes_per_subport = params->n_pipes_per_subport;
616 port->rate = params->rate;
617 port->mtu = params->mtu + params->frame_overhead;
618 port->frame_overhead = params->frame_overhead;
619 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
620 port->n_pipe_profiles = params->n_pipe_profiles;
623 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
626 for (j = 0; j < e_RTE_METER_COLORS; j++) {
627 /* if min/max are both zero, then RED is disabled */
628 if ((params->red_params[i][j].min_th |
629 params->red_params[i][j].max_th) == 0) {
633 if (rte_red_config_init(&port->red_config[i][j],
634 params->red_params[i][j].wq_log2,
635 params->red_params[i][j].min_th,
636 params->red_params[i][j].max_th,
637 params->red_params[i][j].maxp_inv) != 0) {
645 port->time_cpu_cycles = rte_get_tsc_cycles();
646 port->time_cpu_bytes = 0;
649 cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
651 port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
653 /* Scheduling loop detection */
654 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
655 port->pipe_exhaustion = 0;
658 port->busy_grinders = 0;
659 port->pkts_out = NULL;
660 port->n_pkts_out = 0;
662 /* Queue base calculation */
663 rte_sched_port_config_qsize(port);
665 /* Large data structures */
666 port->subport = (struct rte_sched_subport *)
667 (port->memory + rte_sched_port_get_array_base(params,
668 e_RTE_SCHED_PORT_ARRAY_SUBPORT));
669 port->pipe = (struct rte_sched_pipe *)
670 (port->memory + rte_sched_port_get_array_base(params,
671 e_RTE_SCHED_PORT_ARRAY_PIPE));
672 port->queue = (struct rte_sched_queue *)
673 (port->memory + rte_sched_port_get_array_base(params,
674 e_RTE_SCHED_PORT_ARRAY_QUEUE));
675 port->queue_extra = (struct rte_sched_queue_extra *)
676 (port->memory + rte_sched_port_get_array_base(params,
677 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
678 port->pipe_profiles = (struct rte_sched_pipe_profile *)
679 (port->memory + rte_sched_port_get_array_base(params,
680 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
681 port->bmp_array = port->memory
682 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
683 port->queue_array = (struct rte_mbuf **)
684 (port->memory + rte_sched_port_get_array_base(params,
685 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
687 /* Pipe profile table */
688 rte_sched_port_config_pipe_profile_table(port, params);
691 n_queues_per_port = rte_sched_port_queues_per_port(port);
692 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
693 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
695 if (port->bmp == NULL) {
696 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
700 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
701 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
708 rte_sched_port_free(struct rte_sched_port *port)
711 uint32_t n_queues_per_port;
713 /* Check user parameters */
717 n_queues_per_port = rte_sched_port_queues_per_port(port);
719 /* Free enqueued mbufs */
720 for (qindex = 0; qindex < n_queues_per_port; qindex++) {
721 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
722 uint16_t qsize = rte_sched_port_qsize(port, qindex);
723 struct rte_sched_queue *queue = port->queue + qindex;
724 uint16_t qr = queue->qr & (qsize - 1);
725 uint16_t qw = queue->qw & (qsize - 1);
727 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
728 rte_pktmbuf_free(mbufs[qr]);
731 rte_bitmap_free(port->bmp);
736 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
738 struct rte_sched_subport *s = port->subport + i;
740 RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
741 " Token bucket: period = %u, credits per period = %u, size = %u\n"
742 " Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
743 " Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
748 s->tb_credits_per_period,
751 /* Traffic classes */
753 s->tc_credits_per_period[0],
754 s->tc_credits_per_period[1],
755 s->tc_credits_per_period[2],
756 s->tc_credits_per_period[3],
758 /* Traffic class 3 oversubscription */
764 rte_sched_subport_config(struct rte_sched_port *port,
766 struct rte_sched_subport_params *params)
768 struct rte_sched_subport *s;
771 /* Check user parameters */
773 subport_id >= port->n_subports_per_port ||
777 if (params->tb_rate == 0 || params->tb_rate > port->rate)
780 if (params->tb_size == 0)
783 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
784 if (params->tc_rate[i] == 0 ||
785 params->tc_rate[i] > params->tb_rate)
789 if (params->tc_period == 0)
792 s = port->subport + subport_id;
794 /* Token Bucket (TB) */
795 if (params->tb_rate == port->rate) {
796 s->tb_credits_per_period = 1;
799 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
800 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
802 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
805 s->tb_size = params->tb_size;
806 s->tb_time = port->time;
807 s->tb_credits = s->tb_size / 2;
809 /* Traffic Classes (TCs) */
810 s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
811 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
812 s->tc_credits_per_period[i]
813 = rte_sched_time_ms_to_bytes(params->tc_period,
816 s->tc_time = port->time + s->tc_period;
817 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
818 s->tc_credits[i] = s->tc_credits_per_period[i];
820 #ifdef RTE_SCHED_SUBPORT_TC_OV
821 /* TC oversubscription */
822 s->tc_ov_wm_min = port->mtu;
823 s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
824 port->pipe_tc3_rate_max);
825 s->tc_ov_wm = s->tc_ov_wm_max;
826 s->tc_ov_period_id = 0;
832 rte_sched_port_log_subport_config(port, subport_id);
838 rte_sched_pipe_config(struct rte_sched_port *port,
841 int32_t pipe_profile)
843 struct rte_sched_subport *s;
844 struct rte_sched_pipe *p;
845 struct rte_sched_pipe_profile *params;
846 uint32_t deactivate, profile, i;
848 /* Check user parameters */
849 profile = (uint32_t) pipe_profile;
850 deactivate = (pipe_profile < 0);
853 subport_id >= port->n_subports_per_port ||
854 pipe_id >= port->n_pipes_per_subport ||
855 (!deactivate && profile >= port->n_pipe_profiles))
859 /* Check that subport configuration is valid */
860 s = port->subport + subport_id;
861 if (s->tb_period == 0)
864 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
866 /* Handle the case when pipe already has a valid configuration */
868 params = port->pipe_profiles + p->profile;
870 #ifdef RTE_SCHED_SUBPORT_TC_OV
871 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
872 / (double) s->tc_period;
873 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
874 / (double) params->tc_period;
875 uint32_t tc3_ov = s->tc_ov;
877 /* Unplug pipe from its subport */
878 s->tc_ov_n -= params->tc_ov_weight;
879 s->tc_ov_rate -= pipe_tc3_rate;
880 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
882 if (s->tc_ov != tc3_ov) {
883 RTE_LOG(DEBUG, SCHED,
884 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
885 subport_id, subport_tc3_rate, s->tc_ov_rate);
890 memset(p, 0, sizeof(struct rte_sched_pipe));
896 /* Apply the new pipe configuration */
897 p->profile = profile;
898 params = port->pipe_profiles + p->profile;
900 /* Token Bucket (TB) */
901 p->tb_time = port->time;
902 p->tb_credits = params->tb_size / 2;
904 /* Traffic Classes (TCs) */
905 p->tc_time = port->time + params->tc_period;
906 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
907 p->tc_credits[i] = params->tc_credits_per_period[i];
909 #ifdef RTE_SCHED_SUBPORT_TC_OV
911 /* Subport TC3 oversubscription */
912 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
913 / (double) s->tc_period;
914 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
915 / (double) params->tc_period;
916 uint32_t tc3_ov = s->tc_ov;
918 s->tc_ov_n += params->tc_ov_weight;
919 s->tc_ov_rate += pipe_tc3_rate;
920 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
922 if (s->tc_ov != tc3_ov) {
923 RTE_LOG(DEBUG, SCHED,
924 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
925 subport_id, subport_tc3_rate, s->tc_ov_rate);
927 p->tc_ov_period_id = s->tc_ov_period_id;
928 p->tc_ov_credits = s->tc_ov_wm;
936 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
937 uint32_t subport, uint32_t pipe, uint32_t traffic_class,
938 uint32_t queue, enum rte_meter_color color)
940 struct rte_sched_port_hierarchy *sched
941 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
943 RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
945 sched->color = (uint32_t) color;
946 sched->subport = subport;
948 sched->traffic_class = traffic_class;
949 sched->queue = queue;
953 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
954 uint32_t *subport, uint32_t *pipe,
955 uint32_t *traffic_class, uint32_t *queue)
957 const struct rte_sched_port_hierarchy *sched
958 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
960 *subport = sched->subport;
962 *traffic_class = sched->traffic_class;
963 *queue = sched->queue;
967 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
969 const struct rte_sched_port_hierarchy *sched
970 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
972 return (enum rte_meter_color) sched->color;
976 rte_sched_subport_read_stats(struct rte_sched_port *port,
978 struct rte_sched_subport_stats *stats,
981 struct rte_sched_subport *s;
983 /* Check user parameters */
984 if (port == NULL || subport_id >= port->n_subports_per_port ||
985 stats == NULL || tc_ov == NULL)
988 s = port->subport + subport_id;
990 /* Copy subport stats and clear */
991 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
992 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
994 /* Subport TC oversubscription status */
1001 rte_sched_queue_read_stats(struct rte_sched_port *port,
1003 struct rte_sched_queue_stats *stats,
1006 struct rte_sched_queue *q;
1007 struct rte_sched_queue_extra *qe;
1009 /* Check user parameters */
1010 if ((port == NULL) ||
1011 (queue_id >= rte_sched_port_queues_per_port(port)) ||
1016 q = port->queue + queue_id;
1017 qe = port->queue_extra + queue_id;
1019 /* Copy queue stats and clear */
1020 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1021 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1024 *qlen = q->qw - q->qr;
1029 static inline uint32_t
1030 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1034 result = subport * port->n_pipes_per_subport + pipe;
1035 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1036 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1041 #ifdef RTE_SCHED_DEBUG
1044 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1046 struct rte_sched_queue *queue = port->queue + qindex;
1048 return queue->qr == queue->qw;
1051 #endif /* RTE_SCHED_DEBUG */
1053 #ifdef RTE_SCHED_COLLECT_STATS
1056 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1058 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1059 uint32_t tc_index = (qindex >> 2) & 0x3;
1060 uint32_t pkt_len = pkt->pkt_len;
1062 s->stats.n_pkts_tc[tc_index] += 1;
1063 s->stats.n_bytes_tc[tc_index] += pkt_len;
1066 #ifdef RTE_SCHED_RED
1068 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1070 struct rte_mbuf *pkt, uint32_t red)
1073 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1075 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1078 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1079 uint32_t tc_index = (qindex >> 2) & 0x3;
1080 uint32_t pkt_len = pkt->pkt_len;
1082 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1083 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1084 #ifdef RTE_SCHED_RED
1085 s->stats.n_pkts_red_dropped[tc_index] += red;
1090 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1092 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1093 uint32_t pkt_len = pkt->pkt_len;
1095 qe->stats.n_pkts += 1;
1096 qe->stats.n_bytes += pkt_len;
1099 #ifdef RTE_SCHED_RED
1101 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1103 struct rte_mbuf *pkt, uint32_t red)
1106 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1108 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1111 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1112 uint32_t pkt_len = pkt->pkt_len;
1114 qe->stats.n_pkts_dropped += 1;
1115 qe->stats.n_bytes_dropped += pkt_len;
1116 #ifdef RTE_SCHED_RED
1117 qe->stats.n_pkts_red_dropped += red;
1121 #endif /* RTE_SCHED_COLLECT_STATS */
1123 #ifdef RTE_SCHED_RED
1126 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1128 struct rte_sched_queue_extra *qe;
1129 struct rte_red_config *red_cfg;
1130 struct rte_red *red;
1132 enum rte_meter_color color;
1134 tc_index = (qindex >> 2) & 0x3;
1135 color = rte_sched_port_pkt_read_color(pkt);
1136 red_cfg = &port->red_config[tc_index][color];
1138 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1141 qe = port->queue_extra + qindex;
1144 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1148 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1150 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1151 struct rte_red *red = &qe->red;
1153 rte_red_mark_queue_empty(red, port->time);
1158 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1160 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1162 #endif /* RTE_SCHED_RED */
1164 #ifdef RTE_SCHED_DEBUG
1167 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1174 rte_panic("Empty slab at position %u\n", bmp_pos);
1177 for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1178 if (mask & bmp_slab) {
1179 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1180 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1187 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1191 #endif /* RTE_SCHED_DEBUG */
1193 static inline uint32_t
1194 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1195 struct rte_mbuf *pkt)
1197 struct rte_sched_queue *q;
1198 #ifdef RTE_SCHED_COLLECT_STATS
1199 struct rte_sched_queue_extra *qe;
1201 uint32_t subport, pipe, traffic_class, queue, qindex;
1203 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1205 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1206 q = port->queue + qindex;
1208 #ifdef RTE_SCHED_COLLECT_STATS
1209 qe = port->queue_extra + qindex;
1217 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1218 uint32_t qindex, struct rte_mbuf **qbase)
1220 struct rte_sched_queue *q;
1221 struct rte_mbuf **q_qw;
1224 q = port->queue + qindex;
1225 qsize = rte_sched_port_qsize(port, qindex);
1226 q_qw = qbase + (q->qw & (qsize - 1));
1228 rte_prefetch0(q_qw);
1229 rte_bitmap_prefetch0(port->bmp, qindex);
1233 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1234 struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1236 struct rte_sched_queue *q;
1240 q = port->queue + qindex;
1241 qsize = rte_sched_port_qsize(port, qindex);
1242 qlen = q->qw - q->qr;
1244 /* Drop the packet (and update drop stats) when queue is full */
1245 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1247 rte_pktmbuf_free(pkt);
1248 #ifdef RTE_SCHED_COLLECT_STATS
1249 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1251 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1257 /* Enqueue packet */
1258 qbase[q->qw & (qsize - 1)] = pkt;
1261 /* Activate queue in the port bitmap */
1262 rte_bitmap_set(port->bmp, qindex);
1265 #ifdef RTE_SCHED_COLLECT_STATS
1266 rte_sched_port_update_subport_stats(port, qindex, pkt);
1267 rte_sched_port_update_queue_stats(port, qindex, pkt);
1275 * The enqueue function implements a 4-level pipeline with each stage
1276 * processing two different packets. The purpose of using a pipeline
1277 * is to hide the latency of prefetching the data structures. The
1278 * naming convention is presented in the diagram below:
1280 * p00 _______ p10 _______ p20 _______ p30 _______
1281 * ----->| |----->| |----->| |----->| |----->
1282 * | 0 | | 1 | | 2 | | 3 |
1283 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1288 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1291 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1292 *pkt30, *pkt31, *pkt_last;
1293 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1294 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1295 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1296 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1302 * Less then 6 input packets available, which is not enough to
1305 if (unlikely(n_pkts < 6)) {
1306 struct rte_mbuf **q_base[5];
1309 /* Prefetch the mbuf structure of each packet */
1310 for (i = 0; i < n_pkts; i++)
1311 rte_prefetch0(pkts[i]);
1313 /* Prefetch the queue structure for each queue */
1314 for (i = 0; i < n_pkts; i++)
1315 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1318 /* Prefetch the write pointer location of each queue */
1319 for (i = 0; i < n_pkts; i++) {
1320 q_base[i] = rte_sched_port_qbase(port, q[i]);
1321 rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1325 /* Write each packet to its queue */
1326 for (i = 0; i < n_pkts; i++)
1327 result += rte_sched_port_enqueue_qwa(port, q[i],
1328 q_base[i], pkts[i]);
1333 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1336 rte_prefetch0(pkt20);
1337 rte_prefetch0(pkt21);
1341 rte_prefetch0(pkt10);
1342 rte_prefetch0(pkt11);
1344 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1345 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1349 rte_prefetch0(pkt00);
1350 rte_prefetch0(pkt01);
1352 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1353 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1355 q20_base = rte_sched_port_qbase(port, q20);
1356 q21_base = rte_sched_port_qbase(port, q21);
1357 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1358 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1360 /* Run the pipeline */
1361 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1362 /* Propagate stage inputs */
1373 q30_base = q20_base;
1374 q31_base = q21_base;
1376 /* Stage 0: Get packets in */
1378 pkt01 = pkts[i + 1];
1379 rte_prefetch0(pkt00);
1380 rte_prefetch0(pkt01);
1382 /* Stage 1: Prefetch queue structure storing queue pointers */
1383 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1384 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1386 /* Stage 2: Prefetch queue write location */
1387 q20_base = rte_sched_port_qbase(port, q20);
1388 q21_base = rte_sched_port_qbase(port, q21);
1389 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1390 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1392 /* Stage 3: Write packet to queue and activate queue */
1393 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1394 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1395 result += r30 + r31;
1399 * Drain the pipeline (exactly 6 packets).
1400 * Handle the last packet in the case
1401 * of an odd number of input packets.
1403 pkt_last = pkts[n_pkts - 1];
1404 rte_prefetch0(pkt_last);
1406 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1407 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1409 q10_base = rte_sched_port_qbase(port, q10);
1410 q11_base = rte_sched_port_qbase(port, q11);
1411 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1412 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1414 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1415 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1416 result += r20 + r21;
1418 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1420 q00_base = rte_sched_port_qbase(port, q00);
1421 q01_base = rte_sched_port_qbase(port, q01);
1422 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1423 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1425 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1426 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1427 result += r10 + r11;
1429 q_last_base = rte_sched_port_qbase(port, q_last);
1430 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1432 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1433 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1434 result += r00 + r01;
1437 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1444 #ifndef RTE_SCHED_SUBPORT_TC_OV
1447 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1449 struct rte_sched_grinder *grinder = port->grinder + pos;
1450 struct rte_sched_subport *subport = grinder->subport;
1451 struct rte_sched_pipe *pipe = grinder->pipe;
1452 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1456 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1457 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1458 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1459 subport->tb_time += n_periods * subport->tb_period;
1462 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1463 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1464 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1465 pipe->tb_time += n_periods * params->tb_period;
1468 if (unlikely(port->time >= subport->tc_time)) {
1469 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1470 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1471 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1472 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1473 subport->tc_time = port->time + subport->tc_period;
1477 if (unlikely(port->time >= pipe->tc_time)) {
1478 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1479 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1480 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1481 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1482 pipe->tc_time = port->time + params->tc_period;
1488 static inline uint32_t
1489 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1491 struct rte_sched_grinder *grinder = port->grinder + pos;
1492 struct rte_sched_subport *subport = grinder->subport;
1493 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1494 uint32_t tc_ov_consumption_max;
1495 uint32_t tc_ov_wm = subport->tc_ov_wm;
1497 if (subport->tc_ov == 0)
1498 return subport->tc_ov_wm_max;
1500 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1501 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1502 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1503 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1505 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1506 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1508 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1509 tc_ov_wm -= tc_ov_wm >> 7;
1510 if (tc_ov_wm < subport->tc_ov_wm_min)
1511 tc_ov_wm = subport->tc_ov_wm_min;
1516 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1517 if (tc_ov_wm > subport->tc_ov_wm_max)
1518 tc_ov_wm = subport->tc_ov_wm_max;
1524 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1526 struct rte_sched_grinder *grinder = port->grinder + pos;
1527 struct rte_sched_subport *subport = grinder->subport;
1528 struct rte_sched_pipe *pipe = grinder->pipe;
1529 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1533 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1534 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1535 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1536 subport->tb_time += n_periods * subport->tb_period;
1539 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1540 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1541 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1542 pipe->tb_time += n_periods * params->tb_period;
1545 if (unlikely(port->time >= subport->tc_time)) {
1546 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1548 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1549 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1550 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1551 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1553 subport->tc_time = port->time + subport->tc_period;
1554 subport->tc_ov_period_id++;
1558 if (unlikely(port->time >= pipe->tc_time)) {
1559 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1560 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1561 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1562 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1563 pipe->tc_time = port->time + params->tc_period;
1566 /* Pipe TCs - Oversubscription */
1567 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1568 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1570 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1574 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1577 #ifndef RTE_SCHED_SUBPORT_TC_OV
1580 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1582 struct rte_sched_grinder *grinder = port->grinder + pos;
1583 struct rte_sched_subport *subport = grinder->subport;
1584 struct rte_sched_pipe *pipe = grinder->pipe;
1585 struct rte_mbuf *pkt = grinder->pkt;
1586 uint32_t tc_index = grinder->tc_index;
1587 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1588 uint32_t subport_tb_credits = subport->tb_credits;
1589 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1590 uint32_t pipe_tb_credits = pipe->tb_credits;
1591 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1594 /* Check queue credits */
1595 enough_credits = (pkt_len <= subport_tb_credits) &&
1596 (pkt_len <= subport_tc_credits) &&
1597 (pkt_len <= pipe_tb_credits) &&
1598 (pkt_len <= pipe_tc_credits);
1600 if (!enough_credits)
1603 /* Update port credits */
1604 subport->tb_credits -= pkt_len;
1605 subport->tc_credits[tc_index] -= pkt_len;
1606 pipe->tb_credits -= pkt_len;
1607 pipe->tc_credits[tc_index] -= pkt_len;
1615 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1617 struct rte_sched_grinder *grinder = port->grinder + pos;
1618 struct rte_sched_subport *subport = grinder->subport;
1619 struct rte_sched_pipe *pipe = grinder->pipe;
1620 struct rte_mbuf *pkt = grinder->pkt;
1621 uint32_t tc_index = grinder->tc_index;
1622 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1623 uint32_t subport_tb_credits = subport->tb_credits;
1624 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1625 uint32_t pipe_tb_credits = pipe->tb_credits;
1626 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1627 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1628 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1629 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1632 /* Check pipe and subport credits */
1633 enough_credits = (pkt_len <= subport_tb_credits) &&
1634 (pkt_len <= subport_tc_credits) &&
1635 (pkt_len <= pipe_tb_credits) &&
1636 (pkt_len <= pipe_tc_credits) &&
1637 (pkt_len <= pipe_tc_ov_credits);
1639 if (!enough_credits)
1642 /* Update pipe and subport credits */
1643 subport->tb_credits -= pkt_len;
1644 subport->tc_credits[tc_index] -= pkt_len;
1645 pipe->tb_credits -= pkt_len;
1646 pipe->tc_credits[tc_index] -= pkt_len;
1647 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1652 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1656 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1658 struct rte_sched_grinder *grinder = port->grinder + pos;
1659 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1660 struct rte_mbuf *pkt = grinder->pkt;
1661 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1663 if (!grinder_credits_check(port, pos))
1666 /* Advance port time */
1667 port->time += pkt_len;
1670 port->pkts_out[port->n_pkts_out++] = pkt;
1672 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1673 if (queue->qr == queue->qw) {
1674 uint32_t qindex = grinder->qindex[grinder->qpos];
1676 rte_bitmap_clear(port->bmp, qindex);
1677 grinder->qmask &= ~(1 << grinder->qpos);
1678 grinder->wrr_mask[grinder->qpos] = 0;
1679 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1682 /* Reset pipe loop detection */
1683 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1684 grinder->productive = 1;
1689 #ifdef SCHED_VECTOR_SSE4
1692 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1694 __m128i index = _mm_set1_epi32(base_pipe);
1695 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1696 __m128i res = _mm_cmpeq_epi32(pipes, index);
1698 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1699 pipes = _mm_cmpeq_epi32(pipes, index);
1700 res = _mm_or_si128(res, pipes);
1702 if (_mm_testz_si128(res, res))
1708 #elif defined(SCHED_VECTOR_NEON)
1711 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1713 uint32x4_t index, pipes;
1714 uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1716 index = vmovq_n_u32(base_pipe);
1717 pipes = vld1q_u32(pos);
1718 if (!vminvq_u32(veorq_u32(pipes, index)))
1721 pipes = vld1q_u32(pos + 4);
1722 if (!vminvq_u32(veorq_u32(pipes, index)))
1731 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1735 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1736 if (port->grinder_base_bmp_pos[i] == base_pipe)
1743 #endif /* RTE_SCHED_OPTIMIZATIONS */
1746 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1748 struct rte_sched_grinder *grinder = port->grinder + pos;
1751 grinder->pcache_w = 0;
1752 grinder->pcache_r = 0;
1754 w[0] = (uint16_t) bmp_slab;
1755 w[1] = (uint16_t) (bmp_slab >> 16);
1756 w[2] = (uint16_t) (bmp_slab >> 32);
1757 w[3] = (uint16_t) (bmp_slab >> 48);
1759 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1760 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1761 grinder->pcache_w += (w[0] != 0);
1763 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1764 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1765 grinder->pcache_w += (w[1] != 0);
1767 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1768 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1769 grinder->pcache_w += (w[2] != 0);
1771 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1772 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1773 grinder->pcache_w += (w[3] != 0);
1777 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1779 struct rte_sched_grinder *grinder = port->grinder + pos;
1782 grinder->tccache_w = 0;
1783 grinder->tccache_r = 0;
1785 b[0] = (uint8_t) (qmask & 0xF);
1786 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1787 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1788 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1790 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1791 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1792 grinder->tccache_w += (b[0] != 0);
1794 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1795 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1796 grinder->tccache_w += (b[1] != 0);
1798 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1799 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1800 grinder->tccache_w += (b[2] != 0);
1802 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1803 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1804 grinder->tccache_w += (b[3] != 0);
1808 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1810 struct rte_sched_grinder *grinder = port->grinder + pos;
1811 struct rte_mbuf **qbase;
1815 if (grinder->tccache_r == grinder->tccache_w)
1818 qindex = grinder->tccache_qindex[grinder->tccache_r];
1819 qbase = rte_sched_port_qbase(port, qindex);
1820 qsize = rte_sched_port_qsize(port, qindex);
1822 grinder->tc_index = (qindex >> 2) & 0x3;
1823 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1824 grinder->qsize = qsize;
1826 grinder->qindex[0] = qindex;
1827 grinder->qindex[1] = qindex + 1;
1828 grinder->qindex[2] = qindex + 2;
1829 grinder->qindex[3] = qindex + 3;
1831 grinder->queue[0] = port->queue + qindex;
1832 grinder->queue[1] = port->queue + qindex + 1;
1833 grinder->queue[2] = port->queue + qindex + 2;
1834 grinder->queue[3] = port->queue + qindex + 3;
1836 grinder->qbase[0] = qbase;
1837 grinder->qbase[1] = qbase + qsize;
1838 grinder->qbase[2] = qbase + 2 * qsize;
1839 grinder->qbase[3] = qbase + 3 * qsize;
1841 grinder->tccache_r++;
1846 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1848 struct rte_sched_grinder *grinder = port->grinder + pos;
1849 uint32_t pipe_qindex;
1850 uint16_t pipe_qmask;
1852 if (grinder->pcache_r < grinder->pcache_w) {
1853 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1854 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1855 grinder->pcache_r++;
1857 uint64_t bmp_slab = 0;
1858 uint32_t bmp_pos = 0;
1860 /* Get another non-empty pipe group */
1861 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1864 #ifdef RTE_SCHED_DEBUG
1865 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1868 /* Return if pipe group already in one of the other grinders */
1869 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1870 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1873 port->grinder_base_bmp_pos[pos] = bmp_pos;
1875 /* Install new pipe group into grinder's pipe cache */
1876 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1878 pipe_qmask = grinder->pcache_qmask[0];
1879 pipe_qindex = grinder->pcache_qindex[0];
1880 grinder->pcache_r = 1;
1883 /* Install new pipe in the grinder */
1884 grinder->pindex = pipe_qindex >> 4;
1885 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1886 grinder->pipe = port->pipe + grinder->pindex;
1887 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1888 grinder->productive = 0;
1890 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1891 grinder_next_tc(port, pos);
1893 /* Check for pipe exhaustion */
1894 if (grinder->pindex == port->pipe_loop) {
1895 port->pipe_exhaustion = 1;
1896 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1904 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1906 struct rte_sched_grinder *grinder = port->grinder + pos;
1907 struct rte_sched_pipe *pipe = grinder->pipe;
1908 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1909 uint32_t tc_index = grinder->tc_index;
1910 uint32_t qmask = grinder->qmask;
1913 qindex = tc_index * 4;
1915 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1916 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1917 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1918 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1920 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1921 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1922 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1923 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1925 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1926 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1927 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1928 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1932 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1934 struct rte_sched_grinder *grinder = port->grinder + pos;
1935 struct rte_sched_pipe *pipe = grinder->pipe;
1936 uint32_t tc_index = grinder->tc_index;
1939 qindex = tc_index * 4;
1941 pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1942 >> RTE_SCHED_WRR_SHIFT;
1943 pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1944 >> RTE_SCHED_WRR_SHIFT;
1945 pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1946 >> RTE_SCHED_WRR_SHIFT;
1947 pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1948 >> RTE_SCHED_WRR_SHIFT;
1952 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1954 struct rte_sched_grinder *grinder = port->grinder + pos;
1955 uint16_t wrr_tokens_min;
1957 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1958 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1959 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1960 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1962 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1963 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1965 grinder->wrr_tokens[0] -= wrr_tokens_min;
1966 grinder->wrr_tokens[1] -= wrr_tokens_min;
1967 grinder->wrr_tokens[2] -= wrr_tokens_min;
1968 grinder->wrr_tokens[3] -= wrr_tokens_min;
1972 #define grinder_evict(port, pos)
1975 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1977 struct rte_sched_grinder *grinder = port->grinder + pos;
1979 rte_prefetch0(grinder->pipe);
1980 rte_prefetch0(grinder->queue[0]);
1984 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1986 struct rte_sched_grinder *grinder = port->grinder + pos;
1987 uint16_t qsize, qr[4];
1989 qsize = grinder->qsize;
1990 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1991 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1992 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1993 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1995 rte_prefetch0(grinder->qbase[0] + qr[0]);
1996 rte_prefetch0(grinder->qbase[1] + qr[1]);
1998 grinder_wrr_load(port, pos);
1999 grinder_wrr(port, pos);
2001 rte_prefetch0(grinder->qbase[2] + qr[2]);
2002 rte_prefetch0(grinder->qbase[3] + qr[3]);
2006 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2008 struct rte_sched_grinder *grinder = port->grinder + pos;
2009 uint32_t qpos = grinder->qpos;
2010 struct rte_mbuf **qbase = grinder->qbase[qpos];
2011 uint16_t qsize = grinder->qsize;
2012 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2014 grinder->pkt = qbase[qr];
2015 rte_prefetch0(grinder->pkt);
2017 if (unlikely((qr & 0x7) == 7)) {
2018 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2020 rte_prefetch0(qbase + qr_next);
2024 static inline uint32_t
2025 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2027 struct rte_sched_grinder *grinder = port->grinder + pos;
2029 switch (grinder->state) {
2030 case e_GRINDER_PREFETCH_PIPE:
2032 if (grinder_next_pipe(port, pos)) {
2033 grinder_prefetch_pipe(port, pos);
2034 port->busy_grinders++;
2036 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2043 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2045 struct rte_sched_pipe *pipe = grinder->pipe;
2047 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2048 grinder_prefetch_tc_queue_arrays(port, pos);
2049 grinder_credits_update(port, pos);
2051 grinder->state = e_GRINDER_PREFETCH_MBUF;
2055 case e_GRINDER_PREFETCH_MBUF:
2057 grinder_prefetch_mbuf(port, pos);
2059 grinder->state = e_GRINDER_READ_MBUF;
2063 case e_GRINDER_READ_MBUF:
2065 uint32_t result = 0;
2067 result = grinder_schedule(port, pos);
2069 /* Look for next packet within the same TC */
2070 if (result && grinder->qmask) {
2071 grinder_wrr(port, pos);
2072 grinder_prefetch_mbuf(port, pos);
2076 grinder_wrr_store(port, pos);
2078 /* Look for another active TC within same pipe */
2079 if (grinder_next_tc(port, pos)) {
2080 grinder_prefetch_tc_queue_arrays(port, pos);
2082 grinder->state = e_GRINDER_PREFETCH_MBUF;
2086 if (grinder->productive == 0 &&
2087 port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2088 port->pipe_loop = grinder->pindex;
2090 grinder_evict(port, pos);
2092 /* Look for another active pipe */
2093 if (grinder_next_pipe(port, pos)) {
2094 grinder_prefetch_pipe(port, pos);
2096 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2100 /* No active pipe found */
2101 port->busy_grinders--;
2103 grinder->state = e_GRINDER_PREFETCH_PIPE;
2108 rte_panic("Algorithmic error (invalid state)\n");
2114 rte_sched_port_time_resync(struct rte_sched_port *port)
2116 uint64_t cycles = rte_get_tsc_cycles();
2117 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2118 uint64_t bytes_diff;
2120 /* Compute elapsed time in bytes */
2121 bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2122 port->inv_cycles_per_byte);
2124 /* Advance port time */
2125 port->time_cpu_cycles = cycles;
2126 port->time_cpu_bytes += bytes_diff;
2127 if (port->time < port->time_cpu_bytes)
2128 port->time = port->time_cpu_bytes;
2130 /* Reset pipe loop detection */
2131 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2135 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2139 /* Check if any exception flag is set */
2140 exceptions = (second_pass && port->busy_grinders == 0) ||
2141 (port->pipe_exhaustion == 1);
2143 /* Clear exception flags */
2144 port->pipe_exhaustion = 0;
2150 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2154 port->pkts_out = pkts;
2155 port->n_pkts_out = 0;
2157 rte_sched_port_time_resync(port);
2159 /* Take each queue in the grinder one step further */
2160 for (i = 0, count = 0; ; i++) {
2161 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2162 if ((count == n_pkts) ||
2163 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {