1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2020 Mellanox Technologies, Ltd
13 #include <linux/rtnetlink.h>
14 #include <linux/sockios.h>
15 #include <linux/ethtool.h>
18 #include <rte_malloc.h>
19 #include <rte_ethdev_driver.h>
20 #include <rte_ethdev_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_common.h>
24 #include <rte_kvargs.h>
25 #include <rte_rwlock.h>
26 #include <rte_spinlock.h>
27 #include <rte_string_fns.h>
28 #include <rte_alarm.h>
29 #include <rte_eal_paging.h>
31 #include <mlx5_glue.h>
32 #include <mlx5_devx_cmds.h>
33 #include <mlx5_common.h>
34 #include <mlx5_common_mp.h>
35 #include <mlx5_common_mr.h>
36 #include <mlx5_malloc.h>
38 #include "mlx5_defs.h"
40 #include "mlx5_common_os.h"
41 #include "mlx5_utils.h"
42 #include "mlx5_rxtx.h"
43 #include "mlx5_autoconf.h"
45 #include "mlx5_flow.h"
46 #include "rte_pmd_mlx5.h"
47 #include "mlx5_verbs.h"
49 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
51 #ifndef HAVE_IBV_MLX5_MOD_MPW
52 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
53 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
56 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
57 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
60 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
62 /* Spinlock for mlx5_shared_data allocation. */
63 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* Process local data for secondary processes. */
66 static struct mlx5_local_data mlx5_local_data;
69 * Set the completion channel file descriptor interrupt as non-blocking.
72 * Pointer to RQ channel object, which includes the channel fd
75 * The file descriptor (representing the intetrrupt) used in this channel.
78 * 0 on successfully setting the fd to non-blocking, non-zero otherwise.
81 mlx5_os_set_nonblock_channel_fd(int fd)
85 flags = fcntl(fd, F_GETFL);
86 return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
90 * Get mlx5 device attributes. The glue function query_device_ex() is called
91 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
92 * device attributes from the glue out parameter.
95 * Pointer to ibv context.
98 * Pointer to mlx5 device attributes.
101 * 0 on success, non zero error number otherwise
104 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
107 struct ibv_device_attr_ex attr_ex;
108 memset(device_attr, 0, sizeof(*device_attr));
109 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
113 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
114 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
115 device_attr->max_sge = attr_ex.orig_attr.max_sge;
116 device_attr->max_cq = attr_ex.orig_attr.max_cq;
117 device_attr->max_qp = attr_ex.orig_attr.max_qp;
118 device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
119 device_attr->max_rwq_indirection_table_size =
120 attr_ex.rss_caps.max_rwq_indirection_table_size;
121 device_attr->max_tso = attr_ex.tso_caps.max_tso;
122 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
124 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
125 err = mlx5_glue->dv_query_device(ctx, &dv_attr);
129 device_attr->flags = dv_attr.flags;
130 device_attr->comp_mask = dv_attr.comp_mask;
131 #ifdef HAVE_IBV_MLX5_MOD_SWP
132 device_attr->sw_parsing_offloads =
133 dv_attr.sw_parsing_caps.sw_parsing_offloads;
135 device_attr->min_single_stride_log_num_of_bytes =
136 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
137 device_attr->max_single_stride_log_num_of_bytes =
138 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
139 device_attr->min_single_wqe_log_num_of_strides =
140 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
141 device_attr->max_single_wqe_log_num_of_strides =
142 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
143 device_attr->stride_supported_qpts =
144 dv_attr.striding_rq_caps.supported_qpts;
145 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
146 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
153 * Verbs callback to allocate a memory. This function should allocate the space
154 * according to the size provided residing inside a huge page.
155 * Please note that all allocation must respect the alignment from libmlx5
156 * (i.e. currently rte_mem_page_size()).
159 * The size in bytes of the memory to allocate.
161 * A pointer to the callback data.
164 * Allocated buffer, NULL otherwise and rte_errno is set.
167 mlx5_alloc_verbs_buf(size_t size, void *data)
169 struct mlx5_priv *priv = data;
171 unsigned int socket = SOCKET_ID_ANY;
172 size_t alignment = rte_mem_page_size();
173 if (alignment == (size_t)-1) {
174 DRV_LOG(ERR, "Failed to get mem page size");
179 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
180 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
182 socket = ctrl->socket;
183 } else if (priv->verbs_alloc_ctx.type ==
184 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
185 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
187 socket = ctrl->socket;
189 MLX5_ASSERT(data != NULL);
190 ret = mlx5_malloc(0, size, alignment, socket);
197 * Verbs callback to free a memory.
200 * A pointer to the memory to free.
202 * A pointer to the callback data.
205 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
207 MLX5_ASSERT(data != NULL);
212 * Initialize DR related data within private structure.
213 * Routine checks the reference counter and does actual
214 * resources creation/initialization only if counter is zero.
217 * Pointer to the private device data structure.
220 * Zero on success, positive error code otherwise.
223 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
225 struct mlx5_dev_ctx_shared *sh = priv->sh;
226 char s[MLX5_HLIST_NAMESIZE];
230 err = mlx5_alloc_table_hash_list(priv);
232 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
233 (void *)sh->flow_tbls);
236 /* Create tags hash list table. */
237 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
238 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
239 if (!sh->tag_table) {
240 DRV_LOG(ERR, "tags with hash creation failed.");
244 #ifdef HAVE_MLX5DV_DR
248 /* Shared DV/DR structures is already initialized. */
253 /* Reference counter is zero, we should initialize structures. */
254 domain = mlx5_glue->dr_create_domain(sh->ctx,
255 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
257 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
261 sh->rx_domain = domain;
262 domain = mlx5_glue->dr_create_domain(sh->ctx,
263 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
265 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
269 pthread_mutex_init(&sh->dv_mutex, NULL);
270 sh->tx_domain = domain;
271 #ifdef HAVE_MLX5DV_DR_ESWITCH
272 if (priv->config.dv_esw_en) {
273 domain = mlx5_glue->dr_create_domain
274 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
276 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
280 sh->fdb_domain = domain;
281 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
284 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
285 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
286 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
288 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
290 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
291 #endif /* HAVE_MLX5DV_DR */
296 /* Rollback the created objects. */
298 mlx5_glue->dr_destroy_domain(sh->rx_domain);
299 sh->rx_domain = NULL;
302 mlx5_glue->dr_destroy_domain(sh->tx_domain);
303 sh->tx_domain = NULL;
305 if (sh->fdb_domain) {
306 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
307 sh->fdb_domain = NULL;
309 if (sh->esw_drop_action) {
310 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
311 sh->esw_drop_action = NULL;
313 if (sh->pop_vlan_action) {
314 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
315 sh->pop_vlan_action = NULL;
318 /* tags should be destroyed with flow before. */
319 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
320 sh->tag_table = NULL;
322 mlx5_free_table_hash_list(priv);
327 * Destroy DR related data within private structure.
330 * Pointer to the private device data structure.
333 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
335 struct mlx5_dev_ctx_shared *sh;
337 if (!priv->dr_shared)
342 #ifdef HAVE_MLX5DV_DR
343 MLX5_ASSERT(sh->dv_refcnt);
344 if (sh->dv_refcnt && --sh->dv_refcnt)
347 mlx5_glue->dr_destroy_domain(sh->rx_domain);
348 sh->rx_domain = NULL;
351 mlx5_glue->dr_destroy_domain(sh->tx_domain);
352 sh->tx_domain = NULL;
354 #ifdef HAVE_MLX5DV_DR_ESWITCH
355 if (sh->fdb_domain) {
356 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
357 sh->fdb_domain = NULL;
359 if (sh->esw_drop_action) {
360 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
361 sh->esw_drop_action = NULL;
364 if (sh->pop_vlan_action) {
365 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
366 sh->pop_vlan_action = NULL;
368 pthread_mutex_destroy(&sh->dv_mutex);
369 #endif /* HAVE_MLX5DV_DR */
371 /* tags should be destroyed with flow before. */
372 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
373 sh->tag_table = NULL;
375 mlx5_free_table_hash_list(priv);
379 * Initialize shared data between primary and secondary process.
381 * A memzone is reserved by primary process and secondary processes attach to
385 * 0 on success, a negative errno value otherwise and rte_errno is set.
388 mlx5_init_shared_data(void)
390 const struct rte_memzone *mz;
393 rte_spinlock_lock(&mlx5_shared_data_lock);
394 if (mlx5_shared_data == NULL) {
395 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
396 /* Allocate shared memory. */
397 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
398 sizeof(*mlx5_shared_data),
402 "Cannot allocate mlx5 shared data");
406 mlx5_shared_data = mz->addr;
407 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
408 rte_spinlock_init(&mlx5_shared_data->lock);
410 /* Lookup allocated shared memory. */
411 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
414 "Cannot attach mlx5 shared data");
418 mlx5_shared_data = mz->addr;
419 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
423 rte_spinlock_unlock(&mlx5_shared_data_lock);
428 * PMD global initialization.
430 * Independent from individual device, this function initializes global
431 * per-PMD data structures distinguishing primary and secondary processes.
432 * Hence, each initialization is called once per a process.
435 * 0 on success, a negative errno value otherwise and rte_errno is set.
440 struct mlx5_shared_data *sd;
441 struct mlx5_local_data *ld = &mlx5_local_data;
444 if (mlx5_init_shared_data())
446 sd = mlx5_shared_data;
448 rte_spinlock_lock(&sd->lock);
449 switch (rte_eal_process_type()) {
450 case RTE_PROC_PRIMARY:
453 LIST_INIT(&sd->mem_event_cb_list);
454 rte_rwlock_init(&sd->mem_event_rwlock);
455 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
456 mlx5_mr_mem_event_cb, NULL);
457 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
458 mlx5_mp_os_primary_handle);
461 sd->init_done = true;
463 case RTE_PROC_SECONDARY:
466 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
467 mlx5_mp_os_secondary_handle);
471 ld->init_done = true;
477 rte_spinlock_unlock(&sd->lock);
482 * Spawn an Ethernet device from Verbs information.
485 * Backing DPDK device.
487 * Verbs device parameters (name, port, switch_info) to spawn.
489 * Device configuration parameters.
492 * A valid Ethernet device object on success, NULL otherwise and rte_errno
493 * is set. The following errors are defined:
495 * EBUSY: device is not supposed to be spawned.
496 * EEXIST: device is already spawned
498 static struct rte_eth_dev *
499 mlx5_dev_spawn(struct rte_device *dpdk_dev,
500 struct mlx5_dev_spawn_data *spawn,
501 struct mlx5_dev_config *config)
503 const struct mlx5_switch_info *switch_info = &spawn->info;
504 struct mlx5_dev_ctx_shared *sh = NULL;
505 struct ibv_port_attr port_attr;
506 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
507 struct rte_eth_dev *eth_dev = NULL;
508 struct mlx5_priv *priv = NULL;
510 unsigned int hw_padding = 0;
512 unsigned int cqe_comp;
513 unsigned int cqe_pad = 0;
514 unsigned int tunnel_en = 0;
515 unsigned int mpls_en = 0;
516 unsigned int swp = 0;
517 unsigned int mprq = 0;
518 unsigned int mprq_min_stride_size_n = 0;
519 unsigned int mprq_max_stride_size_n = 0;
520 unsigned int mprq_min_stride_num_n = 0;
521 unsigned int mprq_max_stride_num_n = 0;
522 struct rte_ether_addr mac;
523 char name[RTE_ETH_NAME_MAX_LEN];
524 int own_domain_id = 0;
527 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
528 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
531 /* Determine if this port representor is supposed to be spawned. */
532 if (switch_info->representor && dpdk_dev->devargs) {
533 struct rte_eth_devargs eth_da;
535 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
538 DRV_LOG(ERR, "failed to process device arguments: %s",
539 strerror(rte_errno));
542 for (i = 0; i < eth_da.nb_representor_ports; ++i)
543 if (eth_da.representor_ports[i] ==
544 (uint16_t)switch_info->port_name)
546 if (i == eth_da.nb_representor_ports) {
551 /* Build device name. */
552 if (spawn->pf_bond < 0) {
554 if (!switch_info->representor)
555 strlcpy(name, dpdk_dev->name, sizeof(name));
557 snprintf(name, sizeof(name), "%s_representor_%u",
558 dpdk_dev->name, switch_info->port_name);
560 /* Bonding device. */
561 if (!switch_info->representor)
562 snprintf(name, sizeof(name), "%s_%s",
564 mlx5_os_get_dev_device_name(spawn->phys_dev));
566 snprintf(name, sizeof(name), "%s_%s_representor_%u",
568 mlx5_os_get_dev_device_name(spawn->phys_dev),
569 switch_info->port_name);
571 /* check if the device is already spawned */
572 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
576 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
577 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
578 struct mlx5_mp_id mp_id;
580 eth_dev = rte_eth_dev_attach_secondary(name);
581 if (eth_dev == NULL) {
582 DRV_LOG(ERR, "can not attach rte ethdev");
586 eth_dev->device = dpdk_dev;
587 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
588 err = mlx5_proc_priv_init(eth_dev);
591 mp_id.port_id = eth_dev->data->port_id;
592 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
593 /* Receive command fd from primary process */
594 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
597 /* Remap UAR for Tx queues. */
598 err = mlx5_tx_uar_init_secondary(eth_dev, err);
602 * Ethdev pointer is still required as input since
603 * the primary device is not accessible from the
606 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
607 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
610 mlx5_dev_close(eth_dev);
614 * Some parameters ("tx_db_nc" in particularly) are needed in
615 * advance to create dv/verbs device context. We proceed the
616 * devargs here to get ones, and later proceed devargs again
617 * to override some hardware settings.
619 err = mlx5_args(config, dpdk_dev->devargs);
622 DRV_LOG(ERR, "failed to process device arguments: %s",
623 strerror(rte_errno));
626 mlx5_malloc_mem_select(config->sys_mem_en);
627 sh = mlx5_alloc_shared_dev_ctx(spawn, config);
630 config->devx = sh->devx;
631 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
632 config->dest_tir = 1;
634 #ifdef HAVE_IBV_MLX5_MOD_SWP
635 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
638 * Multi-packet send is supported by ConnectX-4 Lx PF as well
639 * as all ConnectX-5 devices.
641 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
642 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
644 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
645 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
647 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
648 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
649 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
650 DRV_LOG(DEBUG, "enhanced MPW is supported");
651 mps = MLX5_MPW_ENHANCED;
653 DRV_LOG(DEBUG, "MPW is supported");
657 DRV_LOG(DEBUG, "MPW isn't supported");
658 mps = MLX5_MPW_DISABLED;
660 #ifdef HAVE_IBV_MLX5_MOD_SWP
661 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
662 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
663 DRV_LOG(DEBUG, "SWP support: %u", swp);
666 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
667 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
668 struct mlx5dv_striding_rq_caps mprq_caps =
669 dv_attr.striding_rq_caps;
671 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
672 mprq_caps.min_single_stride_log_num_of_bytes);
673 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
674 mprq_caps.max_single_stride_log_num_of_bytes);
675 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
676 mprq_caps.min_single_wqe_log_num_of_strides);
677 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
678 mprq_caps.max_single_wqe_log_num_of_strides);
679 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
680 mprq_caps.supported_qpts);
681 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
683 mprq_min_stride_size_n =
684 mprq_caps.min_single_stride_log_num_of_bytes;
685 mprq_max_stride_size_n =
686 mprq_caps.max_single_stride_log_num_of_bytes;
687 mprq_min_stride_num_n =
688 mprq_caps.min_single_wqe_log_num_of_strides;
689 mprq_max_stride_num_n =
690 mprq_caps.max_single_wqe_log_num_of_strides;
693 if (RTE_CACHE_LINE_SIZE == 128 &&
694 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
698 config->cqe_comp = cqe_comp;
699 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
700 /* Whether device supports 128B Rx CQE padding. */
701 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
702 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
704 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
705 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
706 tunnel_en = ((dv_attr.tunnel_offloads_caps &
707 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
708 (dv_attr.tunnel_offloads_caps &
709 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
710 (dv_attr.tunnel_offloads_caps &
711 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
713 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
714 tunnel_en ? "" : "not ");
717 "tunnel offloading disabled due to old OFED/rdma-core version");
719 config->tunnel_en = tunnel_en;
720 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
721 mpls_en = ((dv_attr.tunnel_offloads_caps &
722 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
723 (dv_attr.tunnel_offloads_caps &
724 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
725 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
726 mpls_en ? "" : "not ");
728 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
729 " old OFED/rdma-core version or firmware configuration");
731 config->mpls_en = mpls_en;
732 /* Check port status. */
733 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
735 DRV_LOG(ERR, "port query failed: %s", strerror(err));
738 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
739 DRV_LOG(ERR, "port is not configured in Ethernet mode");
743 if (port_attr.state != IBV_PORT_ACTIVE)
744 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
745 mlx5_glue->port_state_str(port_attr.state),
747 /* Allocate private eth device data. */
748 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
750 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
752 DRV_LOG(ERR, "priv allocation failure");
757 priv->dev_port = spawn->phys_port;
758 priv->pci_dev = spawn->pci_dev;
759 priv->mtu = RTE_ETHER_MTU;
760 priv->mp_id.port_id = port_id;
761 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
762 /* Some internal functions rely on Netlink sockets, open them now. */
763 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
764 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
765 priv->representor = !!switch_info->representor;
766 priv->master = !!switch_info->master;
767 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
768 priv->vport_meta_tag = 0;
769 priv->vport_meta_mask = 0;
770 priv->pf_bond = spawn->pf_bond;
771 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
773 * The DevX port query API is implemented. E-Switch may use
774 * either vport or reg_c[0] metadata register to match on
775 * vport index. The engaged part of metadata register is
778 if (switch_info->representor || switch_info->master) {
779 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
780 MLX5DV_DEVX_PORT_MATCH_REG_C_0;
781 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
785 "can't query devx port %d on device %s",
787 mlx5_os_get_dev_device_name(spawn->phys_dev));
788 devx_port.comp_mask = 0;
791 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
792 priv->vport_meta_tag = devx_port.reg_c_0.value;
793 priv->vport_meta_mask = devx_port.reg_c_0.mask;
794 if (!priv->vport_meta_mask) {
795 DRV_LOG(ERR, "vport zero mask for port %d"
796 " on bonding device %s",
798 mlx5_os_get_dev_device_name
803 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
804 DRV_LOG(ERR, "invalid vport tag for port %d"
805 " on bonding device %s",
807 mlx5_os_get_dev_device_name
813 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
814 priv->vport_id = devx_port.vport_num;
815 } else if (spawn->pf_bond >= 0) {
816 DRV_LOG(ERR, "can't deduce vport index for port %d"
817 " on bonding device %s",
819 mlx5_os_get_dev_device_name(spawn->phys_dev));
823 /* Suppose vport index in compatible way. */
824 priv->vport_id = switch_info->representor ?
825 switch_info->port_name + 1 : -1;
829 * Kernel/rdma_core support single E-Switch per PF configurations
830 * only and vport_id field contains the vport index for
831 * associated VF, which is deduced from representor port name.
832 * For example, let's have the IB device port 10, it has
833 * attached network device eth0, which has port name attribute
834 * pf0vf2, we can deduce the VF number as 2, and set vport index
835 * as 3 (2+1). This assigning schema should be changed if the
836 * multiple E-Switch instances per PF configurations or/and PCI
837 * subfunctions are added.
839 priv->vport_id = switch_info->representor ?
840 switch_info->port_name + 1 : -1;
842 /* representor_id field keeps the unmodified VF index. */
843 priv->representor_id = switch_info->representor ?
844 switch_info->port_name : -1;
846 * Look for sibling devices in order to reuse their switch domain
847 * if any, otherwise allocate one.
849 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
850 const struct mlx5_priv *opriv =
851 rte_eth_devices[port_id].data->dev_private;
854 opriv->sh != priv->sh ||
856 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
858 priv->domain_id = opriv->domain_id;
861 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
862 err = rte_eth_switch_domain_alloc(&priv->domain_id);
865 DRV_LOG(ERR, "unable to allocate switch domain: %s",
866 strerror(rte_errno));
871 /* Override some values set by hardware configuration. */
872 mlx5_args(config, dpdk_dev->devargs);
873 err = mlx5_dev_check_sibling_config(priv, config);
876 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
877 IBV_DEVICE_RAW_IP_CSUM);
878 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
879 (config->hw_csum ? "" : "not "));
880 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
881 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
882 DRV_LOG(DEBUG, "counters are not supported");
884 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
885 if (config->dv_flow_en) {
886 DRV_LOG(WARNING, "DV flow is not supported");
887 config->dv_flow_en = 0;
890 config->ind_table_max_size =
891 sh->device_attr.max_rwq_indirection_table_size;
893 * Remove this check once DPDK supports larger/variable
894 * indirection tables.
896 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
897 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
898 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
899 config->ind_table_max_size);
900 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
901 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
902 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
903 (config->hw_vlan_strip ? "" : "not "));
904 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
905 IBV_RAW_PACKET_CAP_SCATTER_FCS);
906 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
907 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
908 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
909 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
910 IBV_DEVICE_PCI_WRITE_END_PADDING);
912 if (config->hw_padding && !hw_padding) {
913 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
914 config->hw_padding = 0;
915 } else if (config->hw_padding) {
916 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
918 config->tso = (sh->device_attr.max_tso > 0 &&
919 (sh->device_attr.tso_supported_qpts &
920 (1 << IBV_QPT_RAW_PACKET)));
922 config->tso_max_payload_sz = sh->device_attr.max_tso;
924 * MPW is disabled by default, while the Enhanced MPW is enabled
927 if (config->mps == MLX5_ARG_UNSET)
928 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
931 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
932 DRV_LOG(INFO, "%sMPS is %s",
933 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
934 config->mps == MLX5_MPW ? "legacy " : "",
935 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
936 if (config->cqe_comp && !cqe_comp) {
937 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
938 config->cqe_comp = 0;
940 if (config->cqe_pad && !cqe_pad) {
941 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
943 } else if (config->cqe_pad) {
944 DRV_LOG(INFO, "Rx CQE padding is enabled");
947 priv->counter_fallback = 0;
948 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
953 if (!config->hca_attr.flow_counters_dump)
954 priv->counter_fallback = 1;
955 #ifndef HAVE_IBV_DEVX_ASYNC
956 priv->counter_fallback = 1;
958 if (priv->counter_fallback)
959 DRV_LOG(INFO, "Use fall-back DV counter management");
960 /* Check for LRO support. */
961 if (config->dest_tir && config->hca_attr.lro_cap &&
962 config->dv_flow_en) {
963 /* TBD check tunnel lro caps. */
964 config->lro.supported = config->hca_attr.lro_cap;
965 DRV_LOG(DEBUG, "Device supports LRO");
967 * If LRO timeout is not configured by application,
968 * use the minimal supported value.
970 if (!config->lro.timeout)
971 config->lro.timeout =
972 config->hca_attr.lro_timer_supported_periods[0];
973 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
974 config->lro.timeout);
976 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
977 if (config->hca_attr.qos.sup &&
978 config->hca_attr.qos.srtcm_sup &&
979 config->dv_flow_en) {
981 config->hca_attr.qos.flow_meter_reg_c_ids;
983 * Meter needs two REG_C's for color match and pre-sfx
984 * flow match. Here get the REG_C for color match.
985 * REG_C_0 and REG_C_1 is reserved for metadata feature.
988 if (__builtin_popcount(reg_c_mask) < 1) {
990 DRV_LOG(WARNING, "No available register for"
993 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
996 priv->mtr_reg_share =
997 config->hca_attr.qos.flow_meter_reg_share;
998 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
999 priv->mtr_color_reg);
1004 if (config->tx_pp) {
1005 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1006 config->hca_attr.dev_freq_khz);
1007 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1008 config->hca_attr.qos.packet_pacing ? "" : "not ");
1009 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1010 config->hca_attr.cross_channel ? "" : "not ");
1011 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1012 config->hca_attr.wqe_index_ignore ? "" : "not ");
1013 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1014 config->hca_attr.non_wire_sq ? "" : "not ");
1015 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1016 config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1017 config->hca_attr.log_max_static_sq_wq);
1018 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1019 config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1020 if (!config->devx) {
1021 DRV_LOG(ERR, "DevX is required for packet pacing");
1025 if (!config->hca_attr.qos.packet_pacing) {
1026 DRV_LOG(ERR, "Packet pacing is not supported");
1030 if (!config->hca_attr.cross_channel) {
1031 DRV_LOG(ERR, "Cross channel operations are"
1032 " required for packet pacing");
1036 if (!config->hca_attr.wqe_index_ignore) {
1037 DRV_LOG(ERR, "WQE index ignore feature is"
1038 " required for packet pacing");
1042 if (!config->hca_attr.non_wire_sq) {
1043 DRV_LOG(ERR, "Non-wire SQ feature is"
1044 " required for packet pacing");
1048 if (!config->hca_attr.log_max_static_sq_wq) {
1049 DRV_LOG(ERR, "Static WQE SQ feature is"
1050 " required for packet pacing");
1054 if (!config->hca_attr.qos.wqe_rate_pp) {
1055 DRV_LOG(ERR, "WQE rate mode is required"
1056 " for packet pacing");
1060 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1061 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1062 " can't create queues for packet pacing");
1068 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1070 err = config->hca_attr.access_register_user ?
1071 mlx5_devx_cmd_register_read
1072 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1073 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1077 /* MTUTC register is read successfully. */
1078 ts_mode = MLX5_GET(register_mtutc, reg,
1080 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1081 config->rt_timestamp = 1;
1083 /* Kernel does not support register reading. */
1084 if (config->hca_attr.dev_freq_khz ==
1085 (NS_PER_S / MS_PER_S))
1086 config->rt_timestamp = 1;
1090 * If HW has bug working with tunnel packet decapsulation and
1091 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1092 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1094 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1095 config->hw_fcs_strip = 0;
1096 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1097 (config->hw_fcs_strip ? "" : "not "));
1098 if (config->mprq.enabled && mprq) {
1099 if (config->mprq.stride_num_n &&
1100 (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1101 config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1102 config->mprq.stride_num_n =
1103 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1104 mprq_min_stride_num_n),
1105 mprq_max_stride_num_n);
1107 "the number of strides"
1108 " for Multi-Packet RQ is out of range,"
1109 " setting default value (%u)",
1110 1 << config->mprq.stride_num_n);
1112 if (config->mprq.stride_size_n &&
1113 (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1114 config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1115 config->mprq.stride_size_n =
1116 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1117 mprq_min_stride_size_n),
1118 mprq_max_stride_size_n);
1120 "the size of a stride"
1121 " for Multi-Packet RQ is out of range,"
1122 " setting default value (%u)",
1123 1 << config->mprq.stride_size_n);
1125 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1126 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1127 } else if (config->mprq.enabled && !mprq) {
1128 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1129 config->mprq.enabled = 0;
1131 if (config->max_dump_files_num == 0)
1132 config->max_dump_files_num = 128;
1133 eth_dev = rte_eth_dev_allocate(name);
1134 if (eth_dev == NULL) {
1135 DRV_LOG(ERR, "can not allocate rte ethdev");
1139 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1140 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1141 if (priv->representor) {
1142 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1143 eth_dev->data->representor_id = priv->representor_id;
1146 * Store associated network device interface index. This index
1147 * is permanent throughout the lifetime of device. So, we may store
1148 * the ifindex here and use the cached value further.
1150 MLX5_ASSERT(spawn->ifindex);
1151 priv->if_index = spawn->ifindex;
1152 eth_dev->data->dev_private = priv;
1153 priv->dev_data = eth_dev->data;
1154 eth_dev->data->mac_addrs = priv->mac;
1155 eth_dev->device = dpdk_dev;
1156 /* Configure the first MAC address by default. */
1157 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1159 "port %u cannot get MAC address, is mlx5_en"
1160 " loaded? (errno: %s)",
1161 eth_dev->data->port_id, strerror(rte_errno));
1166 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1167 eth_dev->data->port_id,
1168 mac.addr_bytes[0], mac.addr_bytes[1],
1169 mac.addr_bytes[2], mac.addr_bytes[3],
1170 mac.addr_bytes[4], mac.addr_bytes[5]);
1171 #ifdef RTE_LIBRTE_MLX5_DEBUG
1173 char ifname[IF_NAMESIZE];
1175 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1176 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1177 eth_dev->data->port_id, ifname);
1179 DRV_LOG(DEBUG, "port %u ifname is unknown",
1180 eth_dev->data->port_id);
1183 /* Get actual MTU if possible. */
1184 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1189 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1191 /* Initialize burst functions to prevent crashes before link-up. */
1192 eth_dev->rx_pkt_burst = removed_rx_burst;
1193 eth_dev->tx_pkt_burst = removed_tx_burst;
1194 eth_dev->dev_ops = &mlx5_os_dev_ops;
1195 /* Register MAC address. */
1196 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1197 if (config->vf && config->vf_nl_en)
1198 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1199 mlx5_ifindex(eth_dev),
1200 eth_dev->data->mac_addrs,
1201 MLX5_MAX_MAC_ADDRESSES);
1203 priv->ctrl_flows = 0;
1204 TAILQ_INIT(&priv->flow_meters);
1205 TAILQ_INIT(&priv->flow_meter_profiles);
1206 /* Hint libmlx5 to use PMD allocator for data plane resources */
1207 mlx5_glue->dv_set_context_attr(sh->ctx,
1208 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1209 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1210 .alloc = &mlx5_alloc_verbs_buf,
1211 .free = &mlx5_free_verbs_buf,
1214 /* Bring Ethernet device up. */
1215 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1216 eth_dev->data->port_id);
1217 mlx5_set_link_up(eth_dev);
1219 * Even though the interrupt handler is not installed yet,
1220 * interrupts will still trigger on the async_fd from
1221 * Verbs context returned by ibv_open_device().
1223 mlx5_link_update(eth_dev, 0);
1224 #ifdef HAVE_MLX5DV_DR_ESWITCH
1225 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1226 (switch_info->representor || switch_info->master)))
1227 config->dv_esw_en = 0;
1229 config->dv_esw_en = 0;
1231 /* Detect minimal data bytes to inline. */
1232 mlx5_set_min_inline(spawn, config);
1233 /* Store device configuration on private structure. */
1234 priv->config = *config;
1235 /* Create context for virtual machine VLAN workaround. */
1236 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1237 if (config->dv_flow_en) {
1238 err = mlx5_alloc_shared_dr(priv);
1242 * RSS id is shared with meter flow id. Meter flow id can only
1243 * use the 24 MSB of the register.
1245 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1246 MLX5_MTR_COLOR_BITS);
1247 if (!priv->qrss_id_pool) {
1248 DRV_LOG(ERR, "can't create flow id pool");
1253 /* Supported Verbs flow priority number detection. */
1254 err = mlx5_flow_discover_priorities(eth_dev);
1259 priv->config.flow_prio = err;
1260 if (!priv->config.dv_esw_en &&
1261 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1262 DRV_LOG(WARNING, "metadata mode %u is not supported "
1263 "(no E-Switch)", priv->config.dv_xmeta_en);
1264 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1266 mlx5_set_metadata_mask(eth_dev);
1267 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1268 !priv->sh->dv_regc0_mask) {
1269 DRV_LOG(ERR, "metadata mode %u is not supported "
1270 "(no metadata reg_c[0] is available)",
1271 priv->config.dv_xmeta_en);
1276 * Allocate the buffer for flow creating, just once.
1277 * The allocation must be done before any flow creating.
1279 mlx5_flow_alloc_intermediate(eth_dev);
1280 /* Query availability of metadata reg_c's. */
1281 err = mlx5_flow_discover_mreg_c(eth_dev);
1286 if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1288 "port %u extensive metadata register is not supported",
1289 eth_dev->data->port_id);
1290 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1291 DRV_LOG(ERR, "metadata mode %u is not supported "
1292 "(no metadata registers available)",
1293 priv->config.dv_xmeta_en);
1298 if (priv->config.dv_flow_en &&
1299 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1300 mlx5_flow_ext_mreg_supported(eth_dev) &&
1301 priv->sh->dv_regc0_mask) {
1302 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1303 MLX5_FLOW_MREG_HTABLE_SZ);
1304 if (!priv->mreg_cp_tbl) {
1312 if (priv->mreg_cp_tbl)
1313 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1315 mlx5_os_free_shared_dr(priv);
1316 if (priv->nl_socket_route >= 0)
1317 close(priv->nl_socket_route);
1318 if (priv->nl_socket_rdma >= 0)
1319 close(priv->nl_socket_rdma);
1320 if (priv->vmwa_context)
1321 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1322 if (priv->qrss_id_pool)
1323 mlx5_flow_id_pool_release(priv->qrss_id_pool);
1325 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1327 if (eth_dev != NULL)
1328 eth_dev->data->dev_private = NULL;
1330 if (eth_dev != NULL) {
1331 /* mac_addrs must not be freed alone because part of
1334 eth_dev->data->mac_addrs = NULL;
1335 rte_eth_dev_release_port(eth_dev);
1338 mlx5_free_shared_dev_ctx(sh);
1339 MLX5_ASSERT(err > 0);
1345 * Comparison callback to sort device data.
1347 * This is meant to be used with qsort().
1350 * Pointer to pointer to first data object.
1352 * Pointer to pointer to second data object.
1355 * 0 if both objects are equal, less than 0 if the first argument is less
1356 * than the second, greater than 0 otherwise.
1359 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1361 const struct mlx5_switch_info *si_a =
1362 &((const struct mlx5_dev_spawn_data *)a)->info;
1363 const struct mlx5_switch_info *si_b =
1364 &((const struct mlx5_dev_spawn_data *)b)->info;
1367 /* Master device first. */
1368 ret = si_b->master - si_a->master;
1371 /* Then representor devices. */
1372 ret = si_b->representor - si_a->representor;
1375 /* Unidentified devices come last in no specific order. */
1376 if (!si_a->representor)
1378 /* Order representors by name. */
1379 return si_a->port_name - si_b->port_name;
1383 * Match PCI information for possible slaves of bonding device.
1385 * @param[in] ibv_dev
1386 * Pointer to Infiniband device structure.
1387 * @param[in] pci_dev
1388 * Pointer to PCI device structure to match PCI address.
1389 * @param[in] nl_rdma
1390 * Netlink RDMA group socket handle.
1393 * negative value if no bonding device found, otherwise
1394 * positive index of slave PF in bonding.
1397 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1398 const struct rte_pci_device *pci_dev,
1401 char ifname[IF_NAMESIZE + 1];
1402 unsigned int ifindex;
1408 * Try to get master device name. If something goes
1409 * wrong suppose the lack of kernel support and no
1414 if (!strstr(ibv_dev->name, "bond"))
1416 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1420 * The Master device might not be on the predefined
1421 * port (not on port index 1, it is not garanted),
1422 * we have to scan all Infiniband device port and
1425 for (i = 1; i <= np; ++i) {
1426 /* Check whether Infiniband port is populated. */
1427 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1430 if (!if_indextoname(ifindex, ifname))
1432 /* Try to read bonding slave names from sysfs. */
1434 "/sys/class/net/%s/master/bonding/slaves", ifname);
1435 file = fopen(slaves, "r");
1441 /* Use safe format to check maximal buffer length. */
1442 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1443 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1444 char tmp_str[IF_NAMESIZE + 32];
1445 struct rte_pci_addr pci_addr;
1446 struct mlx5_switch_info info;
1448 /* Process slave interface names in the loop. */
1449 snprintf(tmp_str, sizeof(tmp_str),
1450 "/sys/class/net/%s", ifname);
1451 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1452 DRV_LOG(WARNING, "can not get PCI address"
1453 " for netdev \"%s\"", ifname);
1456 if (pci_dev->addr.domain != pci_addr.domain ||
1457 pci_dev->addr.bus != pci_addr.bus ||
1458 pci_dev->addr.devid != pci_addr.devid ||
1459 pci_dev->addr.function != pci_addr.function)
1461 /* Slave interface PCI address match found. */
1463 snprintf(tmp_str, sizeof(tmp_str),
1464 "/sys/class/net/%s/phys_port_name", ifname);
1465 file = fopen(tmp_str, "rb");
1468 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1469 if (fscanf(file, "%32s", tmp_str) == 1)
1470 mlx5_translate_port_name(tmp_str, &info);
1471 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1472 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1473 pf = info.port_name;
1482 * DPDK callback to register a PCI device.
1484 * This function spawns Ethernet devices out of a given PCI device.
1486 * @param[in] pci_drv
1487 * PCI driver structure (mlx5_driver).
1488 * @param[in] pci_dev
1489 * PCI device information.
1492 * 0 on success, a negative errno value otherwise and rte_errno is set.
1495 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1496 struct rte_pci_device *pci_dev)
1498 struct ibv_device **ibv_list;
1500 * Number of found IB Devices matching with requested PCI BDF.
1501 * nd != 1 means there are multiple IB devices over the same
1502 * PCI device and we have representors and master.
1504 unsigned int nd = 0;
1506 * Number of found IB device Ports. nd = 1 and np = 1..n means
1507 * we have the single multiport IB device, and there may be
1508 * representors attached to some of found ports.
1510 unsigned int np = 0;
1512 * Number of DPDK ethernet devices to Spawn - either over
1513 * multiple IB devices or multiple ports of single IB device.
1514 * Actually this is the number of iterations to spawn.
1516 unsigned int ns = 0;
1519 * < 0 - no bonding device (single one)
1520 * >= 0 - bonding device (value is slave PF index)
1523 struct mlx5_dev_spawn_data *list = NULL;
1524 struct mlx5_dev_config dev_config;
1525 unsigned int dev_config_vf;
1528 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1529 mlx5_pmd_socket_init();
1530 ret = mlx5_init_once();
1532 DRV_LOG(ERR, "unable to init PMD global data: %s",
1533 strerror(rte_errno));
1537 ibv_list = mlx5_glue->get_device_list(&ret);
1539 rte_errno = errno ? errno : ENOSYS;
1540 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1544 * First scan the list of all Infiniband devices to find
1545 * matching ones, gathering into the list.
1547 struct ibv_device *ibv_match[ret + 1];
1548 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1549 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1553 struct rte_pci_addr pci_addr;
1555 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1556 bd = mlx5_device_bond_pci_match
1557 (ibv_list[ret], pci_dev, nl_rdma);
1560 * Bonding device detected. Only one match is allowed,
1561 * the bonding is supported over multi-port IB device,
1562 * there should be no matches on representor PCI
1563 * functions or non VF LAG bonding devices with
1564 * specified address.
1568 "multiple PCI match on bonding device"
1569 "\"%s\" found", ibv_list[ret]->name);
1574 DRV_LOG(INFO, "PCI information matches for"
1575 " slave %d bonding device \"%s\"",
1576 bd, ibv_list[ret]->name);
1577 ibv_match[nd++] = ibv_list[ret];
1580 if (mlx5_dev_to_pci_addr
1581 (ibv_list[ret]->ibdev_path, &pci_addr))
1583 if (pci_dev->addr.domain != pci_addr.domain ||
1584 pci_dev->addr.bus != pci_addr.bus ||
1585 pci_dev->addr.devid != pci_addr.devid ||
1586 pci_dev->addr.function != pci_addr.function)
1588 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1589 ibv_list[ret]->name);
1590 ibv_match[nd++] = ibv_list[ret];
1592 ibv_match[nd] = NULL;
1594 /* No device matches, just complain and bail out. */
1596 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1597 " are kernel drivers loaded?",
1598 pci_dev->addr.domain, pci_dev->addr.bus,
1599 pci_dev->addr.devid, pci_dev->addr.function);
1606 * Found single matching device may have multiple ports.
1607 * Each port may be representor, we have to check the port
1608 * number and check the representors existence.
1611 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1613 DRV_LOG(WARNING, "can not get IB device \"%s\""
1614 " ports number", ibv_match[0]->name);
1615 if (bd >= 0 && !np) {
1616 DRV_LOG(ERR, "can not get ports"
1617 " for bonding device");
1623 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1626 * This may happen if there is VF LAG kernel support and
1627 * application is compiled with older rdma_core library.
1630 "No kernel/verbs support for VF LAG bonding found.");
1631 rte_errno = ENOTSUP;
1637 * Now we can determine the maximal
1638 * amount of devices to be spawned.
1640 list = mlx5_malloc(MLX5_MEM_ZERO,
1641 sizeof(struct mlx5_dev_spawn_data) *
1643 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1645 DRV_LOG(ERR, "spawn data array allocation failure");
1650 if (bd >= 0 || np > 1) {
1652 * Single IB device with multiple ports found,
1653 * it may be E-Switch master device and representors.
1654 * We have to perform identification through the ports.
1656 MLX5_ASSERT(nl_rdma >= 0);
1657 MLX5_ASSERT(ns == 0);
1658 MLX5_ASSERT(nd == 1);
1660 for (i = 1; i <= np; ++i) {
1661 list[ns].max_port = np;
1662 list[ns].phys_port = i;
1663 list[ns].phys_dev = ibv_match[0];
1664 list[ns].eth_dev = NULL;
1665 list[ns].pci_dev = pci_dev;
1666 list[ns].pf_bond = bd;
1667 list[ns].ifindex = mlx5_nl_ifindex
1669 mlx5_os_get_dev_device_name
1670 (list[ns].phys_dev), i);
1671 if (!list[ns].ifindex) {
1673 * No network interface index found for the
1674 * specified port, it means there is no
1675 * representor on this port. It's OK,
1676 * there can be disabled ports, for example
1677 * if sriov_numvfs < sriov_totalvfs.
1683 ret = mlx5_nl_switch_info
1687 if (ret || (!list[ns].info.representor &&
1688 !list[ns].info.master)) {
1690 * We failed to recognize representors with
1691 * Netlink, let's try to perform the task
1694 ret = mlx5_sysfs_switch_info
1698 if (!ret && bd >= 0) {
1699 switch (list[ns].info.name_type) {
1700 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1701 if (list[ns].info.port_name == bd)
1704 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1706 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1707 if (list[ns].info.pf_num == bd)
1715 if (!ret && (list[ns].info.representor ^
1716 list[ns].info.master))
1721 "unable to recognize master/representors"
1722 " on the IB device with multiple ports");
1729 * The existence of several matching entries (nd > 1) means
1730 * port representors have been instantiated. No existing Verbs
1731 * call nor sysfs entries can tell them apart, this can only
1732 * be done through Netlink calls assuming kernel drivers are
1733 * recent enough to support them.
1735 * In the event of identification failure through Netlink,
1736 * try again through sysfs, then:
1738 * 1. A single IB device matches (nd == 1) with single
1739 * port (np=0/1) and is not a representor, assume
1740 * no switch support.
1742 * 2. Otherwise no safe assumptions can be made;
1743 * complain louder and bail out.
1745 for (i = 0; i != nd; ++i) {
1746 memset(&list[ns].info, 0, sizeof(list[ns].info));
1747 list[ns].max_port = 1;
1748 list[ns].phys_port = 1;
1749 list[ns].phys_dev = ibv_match[i];
1750 list[ns].eth_dev = NULL;
1751 list[ns].pci_dev = pci_dev;
1752 list[ns].pf_bond = -1;
1753 list[ns].ifindex = 0;
1755 list[ns].ifindex = mlx5_nl_ifindex
1757 mlx5_os_get_dev_device_name
1758 (list[ns].phys_dev), 1);
1759 if (!list[ns].ifindex) {
1760 char ifname[IF_NAMESIZE];
1763 * Netlink failed, it may happen with old
1764 * ib_core kernel driver (before 4.16).
1765 * We can assume there is old driver because
1766 * here we are processing single ports IB
1767 * devices. Let's try sysfs to retrieve
1768 * the ifindex. The method works for
1769 * master device only.
1773 * Multiple devices found, assume
1774 * representors, can not distinguish
1775 * master/representor and retrieve
1776 * ifindex via sysfs.
1780 ret = mlx5_get_ifname_sysfs
1781 (ibv_match[i]->ibdev_path, ifname);
1784 if_nametoindex(ifname);
1785 if (!list[ns].ifindex) {
1787 * No network interface index found
1788 * for the specified device, it means
1789 * there it is neither representor
1797 ret = mlx5_nl_switch_info
1801 if (ret || (!list[ns].info.representor &&
1802 !list[ns].info.master)) {
1804 * We failed to recognize representors with
1805 * Netlink, let's try to perform the task
1808 ret = mlx5_sysfs_switch_info
1812 if (!ret && (list[ns].info.representor ^
1813 list[ns].info.master)) {
1815 } else if ((nd == 1) &&
1816 !list[ns].info.representor &&
1817 !list[ns].info.master) {
1819 * Single IB device with
1820 * one physical port and
1821 * attached network device.
1822 * May be SRIOV is not enabled
1823 * or there is no representors.
1825 DRV_LOG(INFO, "no E-Switch support detected");
1832 "unable to recognize master/representors"
1833 " on the multiple IB devices");
1841 * Sort list to probe devices in natural order for users convenience
1842 * (i.e. master first, then representors from lowest to highest ID).
1844 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1845 /* Device specific configuration. */
1846 switch (pci_dev->id.device_id) {
1847 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1848 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1849 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1850 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1851 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1852 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1853 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1860 for (i = 0; i != ns; ++i) {
1863 /* Default configuration. */
1864 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1865 dev_config.vf = dev_config_vf;
1866 dev_config.mps = MLX5_ARG_UNSET;
1867 dev_config.dbnc = MLX5_ARG_UNSET;
1868 dev_config.rx_vec_en = 1;
1869 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1870 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1871 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1872 dev_config.txqs_inline = MLX5_ARG_UNSET;
1873 dev_config.vf_nl_en = 1;
1874 dev_config.mr_ext_memseg_en = 1;
1875 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1876 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1877 dev_config.dv_esw_en = 1;
1878 dev_config.dv_flow_en = 1;
1879 dev_config.decap_en = 1;
1880 dev_config.log_hp_size = MLX5_ARG_UNSET;
1881 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1884 if (!list[i].eth_dev) {
1885 if (rte_errno != EBUSY && rte_errno != EEXIST)
1887 /* Device is disabled or already spawned. Ignore it. */
1890 restore = list[i].eth_dev->data->dev_flags;
1891 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1892 /* Restore non-PCI flags cleared by the above call. */
1893 list[i].eth_dev->data->dev_flags |= restore;
1894 rte_eth_dev_probing_finish(list[i].eth_dev);
1898 "probe of PCI device " PCI_PRI_FMT " aborted after"
1899 " encountering an error: %s",
1900 pci_dev->addr.domain, pci_dev->addr.bus,
1901 pci_dev->addr.devid, pci_dev->addr.function,
1902 strerror(rte_errno));
1906 if (!list[i].eth_dev)
1908 mlx5_dev_close(list[i].eth_dev);
1909 /* mac_addrs must not be freed because in dev_private */
1910 list[i].eth_dev->data->mac_addrs = NULL;
1911 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1913 /* Restore original error. */
1920 * Do the routine cleanup:
1921 * - close opened Netlink sockets
1922 * - free allocated spawn data array
1923 * - free the Infiniband device list
1931 MLX5_ASSERT(ibv_list);
1932 mlx5_glue->free_device_list(ibv_list);
1937 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1942 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1943 /* Get environment variable to store. */
1944 env = getenv(MLX5_SHUT_UP_BF);
1945 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1946 if (config->dbnc == MLX5_ARG_UNSET)
1947 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1949 setenv(MLX5_SHUT_UP_BF,
1950 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1955 mlx5_restore_doorbell_mapping_env(int value)
1957 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1958 /* Restore the original environment variable state. */
1959 if (value == MLX5_ARG_UNSET)
1960 unsetenv(MLX5_SHUT_UP_BF);
1962 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1966 * Extract pdn of PD object using DV API.
1969 * Pointer to the verbs PD object.
1971 * Pointer to the PD object number variable.
1974 * 0 on success, error value otherwise.
1977 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1979 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1980 struct mlx5dv_obj obj;
1981 struct mlx5dv_pd pd_info;
1985 obj.pd.out = &pd_info;
1986 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1988 DRV_LOG(DEBUG, "Fail to get PD object info");
1997 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2001 * Function API to open IB device.
2003 * This function calls the Linux glue APIs to open a device.
2006 * Pointer to the IB device attributes (name, port, etc).
2007 * @param[out] config
2008 * Pointer to device configuration structure.
2010 * Pointer to shared context structure.
2013 * 0 on success, a positive error value otherwise.
2016 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2017 const struct mlx5_dev_config *config,
2018 struct mlx5_dev_ctx_shared *sh)
2023 sh->numa_node = spawn->pci_dev->device.numa_node;
2024 pthread_mutex_init(&sh->txpp.mutex, NULL);
2026 * Configure environment variable "MLX5_BF_SHUT_UP"
2027 * before the device creation. The rdma_core library
2028 * checks the variable at device creation and
2029 * stores the result internally.
2031 dbmap_env = mlx5_config_doorbell_mapping_env(config);
2032 /* Try to open IB device with DV first, then usual Verbs. */
2034 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2037 DRV_LOG(DEBUG, "DevX is supported");
2038 /* The device is created, no need for environment. */
2039 mlx5_restore_doorbell_mapping_env(dbmap_env);
2041 /* The environment variable is still configured. */
2042 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2043 err = errno ? errno : ENODEV;
2045 * The environment variable is not needed anymore,
2046 * all device creation attempts are completed.
2048 mlx5_restore_doorbell_mapping_env(dbmap_env);
2051 DRV_LOG(DEBUG, "DevX is NOT supported");
2058 * Install shared asynchronous device events handler.
2059 * This function is implemented to support event sharing
2060 * between multiple ports of single IB device.
2063 * Pointer to mlx5_dev_ctx_shared object.
2066 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2071 sh->intr_handle.fd = -1;
2072 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2073 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2074 F_SETFL, flags | O_NONBLOCK);
2076 DRV_LOG(INFO, "failed to change file descriptor async event"
2079 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2080 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2081 if (rte_intr_callback_register(&sh->intr_handle,
2082 mlx5_dev_interrupt_handler, sh)) {
2083 DRV_LOG(INFO, "Fail to install the shared interrupt.");
2084 sh->intr_handle.fd = -1;
2088 #ifdef HAVE_IBV_DEVX_ASYNC
2089 sh->intr_handle_devx.fd = -1;
2091 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2092 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2094 DRV_LOG(INFO, "failed to allocate devx_comp.");
2097 flags = fcntl(devx_comp->fd, F_GETFL);
2098 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2100 DRV_LOG(INFO, "failed to change file descriptor"
2104 sh->intr_handle_devx.fd = devx_comp->fd;
2105 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2106 if (rte_intr_callback_register(&sh->intr_handle_devx,
2107 mlx5_dev_interrupt_handler_devx, sh)) {
2108 DRV_LOG(INFO, "Fail to install the devx shared"
2110 sh->intr_handle_devx.fd = -1;
2112 #endif /* HAVE_IBV_DEVX_ASYNC */
2117 * Uninstall shared asynchronous device events handler.
2118 * This function is implemented to support event sharing
2119 * between multiple ports of single IB device.
2122 * Pointer to mlx5_dev_ctx_shared object.
2125 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2127 if (sh->intr_handle.fd >= 0)
2128 mlx5_intr_callback_unregister(&sh->intr_handle,
2129 mlx5_dev_interrupt_handler, sh);
2130 #ifdef HAVE_IBV_DEVX_ASYNC
2131 if (sh->intr_handle_devx.fd >= 0)
2132 rte_intr_callback_unregister(&sh->intr_handle_devx,
2133 mlx5_dev_interrupt_handler_devx, sh);
2135 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2140 * Read statistics by a named counter.
2143 * Pointer to the private device data structure.
2144 * @param[in] ctr_name
2145 * Pointer to the name of the statistic counter to read
2147 * Pointer to read statistic value.
2149 * 0 on success and stat is valud, 1 if failed to read the value
2154 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2160 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2161 priv->sh->ibdev_path,
2164 fd = open(path, O_RDONLY);
2166 * in switchdev the file location is not per port
2167 * but rather in <ibdev_path>/hw_counters/<file_name>.
2170 MKSTR(path1, "%s/hw_counters/%s",
2171 priv->sh->ibdev_path,
2173 fd = open(path1, O_RDONLY);
2176 char buf[21] = {'\0'};
2177 ssize_t n = read(fd, buf, sizeof(buf));
2181 *stat = strtoull(buf, NULL, 10);
2191 * Set the reg_mr and dereg_mr call backs
2193 * @param reg_mr_cb[out]
2194 * Pointer to reg_mr func
2195 * @param dereg_mr_cb[out]
2196 * Pointer to dereg_mr func
2200 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2201 mlx5_dereg_mr_t *dereg_mr_cb)
2203 *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2204 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2208 * Remove a MAC address from device
2211 * Pointer to Ethernet device structure.
2213 * MAC address index.
2216 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2218 struct mlx5_priv *priv = dev->data->dev_private;
2219 const int vf = priv->config.vf;
2222 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2223 mlx5_ifindex(dev), priv->mac_own,
2224 &dev->data->mac_addrs[index], index);
2228 * Adds a MAC address to the device
2231 * Pointer to Ethernet device structure.
2233 * MAC address to register.
2235 * MAC address index.
2238 * 0 on success, a negative errno value otherwise
2241 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2244 struct mlx5_priv *priv = dev->data->dev_private;
2245 const int vf = priv->config.vf;
2249 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2250 mlx5_ifindex(dev), priv->mac_own,
2256 * Modify a VF MAC address
2259 * Pointer to device private data.
2261 * MAC address to modify into.
2263 * Net device interface index
2268 * 0 on success, a negative errno value otherwise
2271 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2272 unsigned int iface_idx,
2273 struct rte_ether_addr *mac_addr,
2276 return mlx5_nl_vf_mac_addr_modify
2277 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2281 * Set device promiscuous mode
2284 * Pointer to Ethernet device structure.
2286 * 0 - promiscuous is disabled, otherwise - enabled
2289 * 0 on success, a negative error value otherwise
2292 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2294 struct mlx5_priv *priv = dev->data->dev_private;
2296 return mlx5_nl_promisc(priv->nl_socket_route,
2297 mlx5_ifindex(dev), !!enable);
2301 * Set device promiscuous mode
2304 * Pointer to Ethernet device structure.
2306 * 0 - all multicase is disabled, otherwise - enabled
2309 * 0 on success, a negative error value otherwise
2312 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2314 struct mlx5_priv *priv = dev->data->dev_private;
2316 return mlx5_nl_allmulti(priv->nl_socket_route,
2317 mlx5_ifindex(dev), !!enable);
2320 const struct eth_dev_ops mlx5_os_dev_ops = {
2321 .dev_configure = mlx5_dev_configure,
2322 .dev_start = mlx5_dev_start,
2323 .dev_stop = mlx5_dev_stop,
2324 .dev_set_link_down = mlx5_set_link_down,
2325 .dev_set_link_up = mlx5_set_link_up,
2326 .dev_close = mlx5_dev_close,
2327 .promiscuous_enable = mlx5_promiscuous_enable,
2328 .promiscuous_disable = mlx5_promiscuous_disable,
2329 .allmulticast_enable = mlx5_allmulticast_enable,
2330 .allmulticast_disable = mlx5_allmulticast_disable,
2331 .link_update = mlx5_link_update,
2332 .stats_get = mlx5_stats_get,
2333 .stats_reset = mlx5_stats_reset,
2334 .xstats_get = mlx5_xstats_get,
2335 .xstats_reset = mlx5_xstats_reset,
2336 .xstats_get_names = mlx5_xstats_get_names,
2337 .fw_version_get = mlx5_fw_version_get,
2338 .dev_infos_get = mlx5_dev_infos_get,
2339 .read_clock = mlx5_txpp_read_clock,
2340 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2341 .vlan_filter_set = mlx5_vlan_filter_set,
2342 .rx_queue_setup = mlx5_rx_queue_setup,
2343 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2344 .tx_queue_setup = mlx5_tx_queue_setup,
2345 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2346 .rx_queue_release = mlx5_rx_queue_release,
2347 .tx_queue_release = mlx5_tx_queue_release,
2348 .rx_queue_start = mlx5_rx_queue_start,
2349 .rx_queue_stop = mlx5_rx_queue_stop,
2350 .tx_queue_start = mlx5_tx_queue_start,
2351 .tx_queue_stop = mlx5_tx_queue_stop,
2352 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2353 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2354 .mac_addr_remove = mlx5_mac_addr_remove,
2355 .mac_addr_add = mlx5_mac_addr_add,
2356 .mac_addr_set = mlx5_mac_addr_set,
2357 .set_mc_addr_list = mlx5_set_mc_addr_list,
2358 .mtu_set = mlx5_dev_set_mtu,
2359 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2360 .vlan_offload_set = mlx5_vlan_offload_set,
2361 .reta_update = mlx5_dev_rss_reta_update,
2362 .reta_query = mlx5_dev_rss_reta_query,
2363 .rss_hash_update = mlx5_rss_hash_update,
2364 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2365 .filter_ctrl = mlx5_dev_filter_ctrl,
2366 .rx_descriptor_status = mlx5_rx_descriptor_status,
2367 .tx_descriptor_status = mlx5_tx_descriptor_status,
2368 .rxq_info_get = mlx5_rxq_info_get,
2369 .txq_info_get = mlx5_txq_info_get,
2370 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2371 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2372 .rx_queue_count = mlx5_rx_queue_count,
2373 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2374 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2375 .is_removed = mlx5_is_removed,
2376 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
2377 .get_module_info = mlx5_get_module_info,
2378 .get_module_eeprom = mlx5_get_module_eeprom,
2379 .hairpin_cap_get = mlx5_hairpin_cap_get,
2380 .mtr_ops_get = mlx5_flow_meter_ops_get,
2383 /* Available operations from secondary process. */
2384 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2385 .stats_get = mlx5_stats_get,
2386 .stats_reset = mlx5_stats_reset,
2387 .xstats_get = mlx5_xstats_get,
2388 .xstats_reset = mlx5_xstats_reset,
2389 .xstats_get_names = mlx5_xstats_get_names,
2390 .fw_version_get = mlx5_fw_version_get,
2391 .dev_infos_get = mlx5_dev_infos_get,
2392 .read_clock = mlx5_txpp_read_clock,
2393 .rx_queue_start = mlx5_rx_queue_start,
2394 .rx_queue_stop = mlx5_rx_queue_stop,
2395 .tx_queue_start = mlx5_tx_queue_start,
2396 .tx_queue_stop = mlx5_tx_queue_stop,
2397 .rx_descriptor_status = mlx5_rx_descriptor_status,
2398 .tx_descriptor_status = mlx5_tx_descriptor_status,
2399 .rxq_info_get = mlx5_rxq_info_get,
2400 .txq_info_get = mlx5_txq_info_get,
2401 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2402 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2403 .get_module_info = mlx5_get_module_info,
2404 .get_module_eeprom = mlx5_get_module_eeprom,
2407 /* Available operations in flow isolated mode. */
2408 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2409 .dev_configure = mlx5_dev_configure,
2410 .dev_start = mlx5_dev_start,
2411 .dev_stop = mlx5_dev_stop,
2412 .dev_set_link_down = mlx5_set_link_down,
2413 .dev_set_link_up = mlx5_set_link_up,
2414 .dev_close = mlx5_dev_close,
2415 .promiscuous_enable = mlx5_promiscuous_enable,
2416 .promiscuous_disable = mlx5_promiscuous_disable,
2417 .allmulticast_enable = mlx5_allmulticast_enable,
2418 .allmulticast_disable = mlx5_allmulticast_disable,
2419 .link_update = mlx5_link_update,
2420 .stats_get = mlx5_stats_get,
2421 .stats_reset = mlx5_stats_reset,
2422 .xstats_get = mlx5_xstats_get,
2423 .xstats_reset = mlx5_xstats_reset,
2424 .xstats_get_names = mlx5_xstats_get_names,
2425 .fw_version_get = mlx5_fw_version_get,
2426 .dev_infos_get = mlx5_dev_infos_get,
2427 .read_clock = mlx5_txpp_read_clock,
2428 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2429 .vlan_filter_set = mlx5_vlan_filter_set,
2430 .rx_queue_setup = mlx5_rx_queue_setup,
2431 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2432 .tx_queue_setup = mlx5_tx_queue_setup,
2433 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2434 .rx_queue_release = mlx5_rx_queue_release,
2435 .tx_queue_release = mlx5_tx_queue_release,
2436 .rx_queue_start = mlx5_rx_queue_start,
2437 .rx_queue_stop = mlx5_rx_queue_stop,
2438 .tx_queue_start = mlx5_tx_queue_start,
2439 .tx_queue_stop = mlx5_tx_queue_stop,
2440 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2441 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2442 .mac_addr_remove = mlx5_mac_addr_remove,
2443 .mac_addr_add = mlx5_mac_addr_add,
2444 .mac_addr_set = mlx5_mac_addr_set,
2445 .set_mc_addr_list = mlx5_set_mc_addr_list,
2446 .mtu_set = mlx5_dev_set_mtu,
2447 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2448 .vlan_offload_set = mlx5_vlan_offload_set,
2449 .filter_ctrl = mlx5_dev_filter_ctrl,
2450 .rx_descriptor_status = mlx5_rx_descriptor_status,
2451 .tx_descriptor_status = mlx5_tx_descriptor_status,
2452 .rxq_info_get = mlx5_rxq_info_get,
2453 .txq_info_get = mlx5_txq_info_get,
2454 .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2455 .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2456 .rx_queue_intr_enable = mlx5_rx_intr_enable,
2457 .rx_queue_intr_disable = mlx5_rx_intr_disable,
2458 .is_removed = mlx5_is_removed,
2459 .get_module_info = mlx5_get_module_info,
2460 .get_module_eeprom = mlx5_get_module_eeprom,
2461 .hairpin_cap_get = mlx5_hairpin_cap_get,
2462 .mtr_ops_get = mlx5_flow_meter_ops_get,