4 * Copyright 2012-2015 6WIND S.A.
5 * Copyright 2012 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
58 #include <linux/ethtool.h>
59 #include <linux/sockios.h>
63 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
65 #pragma GCC diagnostic ignored "-pedantic"
67 #include <infiniband/verbs.h>
69 #pragma GCC diagnostic error "-pedantic"
72 /* DPDK headers don't like -pedantic. */
74 #pragma GCC diagnostic ignored "-pedantic"
76 #include <rte_ether.h>
77 #include <rte_ethdev.h>
80 #include <rte_errno.h>
81 #include <rte_mempool.h>
82 #include <rte_prefetch.h>
83 #include <rte_malloc.h>
84 #include <rte_spinlock.h>
85 #include <rte_atomic.h>
86 #include <rte_version.h>
88 #include <rte_alarm.h>
90 #pragma GCC diagnostic error "-pedantic"
93 /* Generated configuration header. */
94 #include "mlx4_autoconf.h"
99 /* Runtime logging through RTE_LOG() is enabled when not in debugging mode.
100 * Intermediate LOG_*() macros add the required end-of-line characters. */
102 #define INFO(...) DEBUG(__VA_ARGS__)
103 #define WARN(...) DEBUG(__VA_ARGS__)
104 #define ERROR(...) DEBUG(__VA_ARGS__)
106 #define LOG__(level, m, ...) \
107 RTE_LOG(level, PMD, MLX4_DRIVER_NAME ": " m "%c", __VA_ARGS__)
108 #define LOG_(level, ...) LOG__(level, __VA_ARGS__, '\n')
109 #define INFO(...) LOG_(INFO, __VA_ARGS__)
110 #define WARN(...) LOG_(WARNING, __VA_ARGS__)
111 #define ERROR(...) LOG_(ERR, __VA_ARGS__)
114 /* Convenience macros for accessing mbuf fields. */
115 #define NEXT(m) ((m)->next)
116 #define DATA_LEN(m) ((m)->data_len)
117 #define PKT_LEN(m) ((m)->pkt_len)
118 #define DATA_OFF(m) ((m)->data_off)
119 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
120 #define NB_SEGS(m) ((m)->nb_segs)
121 #define PORT(m) ((m)->port)
123 /* Work Request ID data type (64 bit). */
132 #define WR_ID(o) (((wr_id_t *)&(o))->data)
134 /* Compile-time check. */
135 static inline void wr_id_t_check(void)
137 wr_id_t check[1 + (2 * -!(sizeof(wr_id_t) == sizeof(uint64_t)))];
143 /* Transpose flags. Useful to convert IBV to DPDK flags. */
144 #define TRANSPOSE(val, from, to) \
145 (((from) >= (to)) ? \
146 (((val) & (from)) / ((from) / (to))) : \
147 (((val) & (from)) * ((to) / (from))))
149 struct mlx4_rxq_stats {
150 unsigned int idx; /**< Mapping index. */
151 #ifdef MLX4_PMD_SOFT_COUNTERS
152 uint64_t ipackets; /**< Total of successfully received packets. */
153 uint64_t ibytes; /**< Total of successfully received bytes. */
155 uint64_t idropped; /**< Total of packets dropped when RX ring full. */
156 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
159 struct mlx4_txq_stats {
160 unsigned int idx; /**< Mapping index. */
161 #ifdef MLX4_PMD_SOFT_COUNTERS
162 uint64_t opackets; /**< Total of successfully sent packets. */
163 uint64_t obytes; /**< Total of successfully sent bytes. */
165 uint64_t odropped; /**< Total of packets not sent when TX ring full. */
168 /* RX element (scattered packets). */
170 struct ibv_recv_wr wr; /* Work Request. */
171 struct ibv_sge sges[MLX4_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */
172 struct rte_mbuf *bufs[MLX4_PMD_SGE_WR_N]; /* SGEs buffers. */
177 struct ibv_recv_wr wr; /* Work Request. */
178 struct ibv_sge sge; /* Scatter/Gather Element. */
179 /* mbuf pointer is derived from WR_ID(wr.wr_id).offset. */
182 /* RX queue descriptor. */
184 struct priv *priv; /* Back pointer to private data. */
185 struct rte_mempool *mp; /* Memory Pool for allocations. */
186 struct ibv_mr *mr; /* Memory Region (for mp). */
187 struct ibv_cq *cq; /* Completion Queue. */
188 struct ibv_qp *qp; /* Queue Pair. */
189 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
190 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
192 * Each VLAN ID requires a separate flow steering rule.
194 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
195 struct ibv_flow *mac_flow[MLX4_MAX_MAC_ADDRESSES][MLX4_MAX_VLAN_IDS];
196 struct ibv_flow *promisc_flow; /* Promiscuous flow. */
197 struct ibv_flow *allmulti_flow; /* Multicast flow. */
198 unsigned int port_id; /* Port ID for incoming packets. */
199 unsigned int elts_n; /* (*elts)[] length. */
200 unsigned int elts_head; /* Current index in (*elts)[]. */
202 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
203 struct rxq_elt (*no_sp)[]; /* RX elements. */
205 unsigned int sp:1; /* Use scattered RX elements. */
206 unsigned int csum:1; /* Enable checksum offloading. */
207 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
208 uint32_t mb_len; /* Length of a mp-issued mbuf. */
209 struct mlx4_rxq_stats stats; /* RX queue counters. */
210 unsigned int socket; /* CPU socket ID for allocations. */
211 struct ibv_exp_res_domain *rd; /* Resource Domain. */
216 struct rte_mbuf *buf;
219 /* Linear buffer type. It is used when transmitting buffers with too many
220 * segments that do not fit the hardware queue (see max_send_sge).
221 * Extra segments are copied (linearized) in such buffers, replacing the
222 * last SGE during TX.
223 * The size is arbitrary but large enough to hold a jumbo frame with
224 * 8 segments considering mbuf.buf_len is about 2048 bytes. */
225 typedef uint8_t linear_t[16384];
227 /* TX queue descriptor. */
229 struct priv *priv; /* Back pointer to private data. */
231 const struct rte_mempool *mp; /* Cached Memory Pool. */
232 struct ibv_mr *mr; /* Memory Region (for mp). */
233 uint32_t lkey; /* mr->lkey */
234 } mp2mr[MLX4_PMD_TX_MP_CACHE]; /* MP to MR translation table. */
235 struct ibv_cq *cq; /* Completion Queue. */
236 struct ibv_qp *qp; /* Queue Pair. */
237 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
238 struct ibv_exp_cq_family *if_cq; /* CQ interface. */
239 #if MLX4_PMD_MAX_INLINE > 0
240 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */
242 unsigned int elts_n; /* (*elts)[] length. */
243 struct txq_elt (*elts)[]; /* TX elements. */
244 unsigned int elts_head; /* Current index in (*elts)[]. */
245 unsigned int elts_tail; /* First element awaiting completion. */
246 unsigned int elts_comp; /* Number of completion requests. */
247 unsigned int elts_comp_cd; /* Countdown for next completion request. */
248 unsigned int elts_comp_cd_init; /* Initial value for countdown. */
249 struct mlx4_txq_stats stats; /* TX queue counters. */
250 linear_t (*elts_linear)[]; /* Linearized buffers. */
251 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
252 unsigned int socket; /* CPU socket ID for allocations. */
253 struct ibv_exp_res_domain *rd; /* Resource Domain. */
257 struct rte_eth_dev *dev; /* Ethernet device. */
258 struct ibv_context *ctx; /* Verbs context. */
259 struct ibv_device_attr device_attr; /* Device properties. */
260 struct ibv_pd *pd; /* Protection Domain. */
262 * MAC addresses array and configuration bit-field.
263 * An extra entry that cannot be modified by the DPDK is reserved
264 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
266 struct ether_addr mac[MLX4_MAX_MAC_ADDRESSES];
267 BITFIELD_DECLARE(mac_configured, uint32_t, MLX4_MAX_MAC_ADDRESSES);
270 unsigned int enabled:1; /* If enabled. */
271 unsigned int id:12; /* VLAN ID (0-4095). */
272 } vlan_filter[MLX4_MAX_VLAN_IDS]; /* VLAN filters table. */
273 /* Device properties. */
274 uint16_t mtu; /* Configured MTU. */
275 uint8_t port; /* Physical port number. */
276 unsigned int started:1; /* Device started, flows enabled. */
277 unsigned int promisc:1; /* Device in promiscuous mode. */
278 unsigned int allmulti:1; /* Device receives all multicast packets. */
279 unsigned int hw_qpg:1; /* QP groups are supported. */
280 unsigned int hw_tss:1; /* TSS is supported. */
281 unsigned int hw_rss:1; /* RSS is supported. */
282 unsigned int hw_csum:1; /* Checksum offload is supported. */
283 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
284 unsigned int rss:1; /* RSS is enabled. */
285 unsigned int vf:1; /* This is a VF device. */
286 unsigned int pending_alarm:1; /* An alarm is pending. */
288 unsigned int inl_recv_size; /* Inline recv size */
290 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
292 struct rxq rxq_parent; /* Parent queue when RSS is enabled. */
293 unsigned int rxqs_n; /* RX queues array size. */
294 unsigned int txqs_n; /* TX queues array size. */
295 struct rxq *(*rxqs)[]; /* RX queues. */
296 struct txq *(*txqs)[]; /* TX queues. */
297 struct rte_intr_handle intr_handle; /* Interrupt handler. */
298 rte_spinlock_t lock; /* Lock for control functions. */
301 /* Local storage for secondary process data. */
302 struct mlx4_secondary_data {
303 struct rte_eth_dev_data data; /* Local device data. */
304 struct priv *primary_priv; /* Private structure from primary. */
305 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
306 rte_spinlock_t lock; /* Port configuration lock. */
307 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
310 * Check if running as a secondary process.
313 * Nonzero if running as a secondary process.
316 mlx4_is_secondary(void)
318 return rte_eal_process_type() != RTE_PROC_PRIMARY;
322 * Return private structure associated with an Ethernet device.
325 * Pointer to Ethernet device structure.
328 * Pointer to private structure.
331 mlx4_get_priv(struct rte_eth_dev *dev)
333 struct mlx4_secondary_data *sd;
335 if (!mlx4_is_secondary())
336 return dev->data->dev_private;
337 sd = &mlx4_secondary_data[dev->data->port_id];
338 return sd->data.dev_private;
342 * Lock private structure to protect it from concurrent access in the
346 * Pointer to private structure.
349 priv_lock(struct priv *priv)
351 rte_spinlock_lock(&priv->lock);
355 * Unlock private structure.
358 * Pointer to private structure.
361 priv_unlock(struct priv *priv)
363 rte_spinlock_unlock(&priv->lock);
366 /* Allocate a buffer on the stack and fill it with a printf format string. */
367 #define MKSTR(name, ...) \
368 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
370 snprintf(name, sizeof(name), __VA_ARGS__)
373 * Get interface name from private structure.
376 * Pointer to private structure.
378 * Interface name output buffer.
381 * 0 on success, -1 on failure and errno is set.
384 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
388 unsigned int dev_type = 0;
389 unsigned int dev_port_prev = ~0u;
390 char match[IF_NAMESIZE] = "";
393 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
399 while ((dent = readdir(dir)) != NULL) {
400 char *name = dent->d_name;
402 unsigned int dev_port;
405 if ((name[0] == '.') &&
406 ((name[1] == '\0') ||
407 ((name[1] == '.') && (name[2] == '\0'))))
410 MKSTR(path, "%s/device/net/%s/%s",
411 priv->ctx->device->ibdev_path, name,
412 (dev_type ? "dev_id" : "dev_port"));
414 file = fopen(path, "rb");
419 * Switch to dev_id when dev_port does not exist as
420 * is the case with Linux kernel versions < 3.15.
431 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
436 * Switch to dev_id when dev_port returns the same value for
437 * all ports. May happen when using a MOFED release older than
438 * 3.0 with a Linux kernel >= 3.15.
440 if (dev_port == dev_port_prev)
442 dev_port_prev = dev_port;
443 if (dev_port == (priv->port - 1u))
444 snprintf(match, sizeof(match), "%s", name);
447 if (match[0] == '\0')
449 strncpy(*ifname, match, sizeof(*ifname));
454 * Read from sysfs entry.
457 * Pointer to private structure.
459 * Entry name relative to sysfs path.
461 * Data output buffer.
466 * 0 on success, -1 on failure and errno is set.
469 priv_sysfs_read(const struct priv *priv, const char *entry,
470 char *buf, size_t size)
472 char ifname[IF_NAMESIZE];
477 if (priv_get_ifname(priv, &ifname))
480 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
483 file = fopen(path, "rb");
486 ret = fread(buf, 1, size, file);
488 if (((size_t)ret < size) && (ferror(file)))
498 * Write to sysfs entry.
501 * Pointer to private structure.
503 * Entry name relative to sysfs path.
510 * 0 on success, -1 on failure and errno is set.
513 priv_sysfs_write(const struct priv *priv, const char *entry,
514 char *buf, size_t size)
516 char ifname[IF_NAMESIZE];
521 if (priv_get_ifname(priv, &ifname))
524 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
527 file = fopen(path, "wb");
530 ret = fwrite(buf, 1, size, file);
532 if (((size_t)ret < size) || (ferror(file)))
542 * Get unsigned long sysfs property.
545 * Pointer to private structure.
547 * Entry name relative to sysfs path.
549 * Value output buffer.
552 * 0 on success, -1 on failure and errno is set.
555 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
558 unsigned long value_ret;
561 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
563 DEBUG("cannot read %s value from sysfs: %s",
564 name, strerror(errno));
567 value_str[ret] = '\0';
569 value_ret = strtoul(value_str, NULL, 0);
571 DEBUG("invalid %s value `%s': %s", name, value_str,
580 * Set unsigned long sysfs property.
583 * Pointer to private structure.
585 * Entry name relative to sysfs path.
590 * 0 on success, -1 on failure and errno is set.
593 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
596 MKSTR(value_str, "%lu", value);
598 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
600 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
601 name, value_str, value, strerror(errno));
608 * Perform ifreq ioctl() on associated Ethernet device.
611 * Pointer to private structure.
613 * Request number to pass to ioctl().
615 * Interface request structure output buffer.
618 * 0 on success, -1 on failure and errno is set.
621 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
623 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
628 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
629 ret = ioctl(sock, req, ifr);
638 * Pointer to private structure.
640 * MTU value output buffer.
643 * 0 on success, -1 on failure and errno is set.
646 priv_get_mtu(struct priv *priv, uint16_t *mtu)
648 unsigned long ulong_mtu;
650 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
660 * Pointer to private structure.
665 * 0 on success, -1 on failure and errno is set.
668 priv_set_mtu(struct priv *priv, uint16_t mtu)
670 return priv_set_sysfs_ulong(priv, "mtu", mtu);
677 * Pointer to private structure.
679 * Bitmask for flags that must remain untouched.
681 * Bitmask for flags to modify.
684 * 0 on success, -1 on failure and errno is set.
687 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
691 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
695 return priv_set_sysfs_ulong(priv, "flags", tmp);
698 /* Device configuration. */
701 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
702 unsigned int socket, const struct rte_eth_txconf *conf);
705 txq_cleanup(struct txq *txq);
708 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
709 unsigned int socket, const struct rte_eth_rxconf *conf,
710 struct rte_mempool *mp);
713 rxq_cleanup(struct rxq *rxq);
716 * Ethernet device configuration.
718 * Prepare the driver for a given number of TX and RX queues.
719 * Allocate parent RSS queue when several RX queues are requested.
722 * Pointer to Ethernet device structure.
725 * 0 on success, errno value on failure.
728 dev_configure(struct rte_eth_dev *dev)
730 struct priv *priv = dev->data->dev_private;
731 unsigned int rxqs_n = dev->data->nb_rx_queues;
732 unsigned int txqs_n = dev->data->nb_tx_queues;
736 priv->rxqs = (void *)dev->data->rx_queues;
737 priv->txqs = (void *)dev->data->tx_queues;
738 if (txqs_n != priv->txqs_n) {
739 INFO("%p: TX queues number update: %u -> %u",
740 (void *)dev, priv->txqs_n, txqs_n);
741 priv->txqs_n = txqs_n;
743 if (rxqs_n == priv->rxqs_n)
745 INFO("%p: RX queues number update: %u -> %u",
746 (void *)dev, priv->rxqs_n, rxqs_n);
747 /* If RSS is enabled, disable it first. */
751 /* Only if there are no remaining child RX queues. */
752 for (i = 0; (i != priv->rxqs_n); ++i)
753 if ((*priv->rxqs)[i] != NULL)
755 rxq_cleanup(&priv->rxq_parent);
760 /* Nothing else to do. */
761 priv->rxqs_n = rxqs_n;
764 /* Allocate a new RSS parent queue if supported by hardware. */
766 ERROR("%p: only a single RX queue can be configured when"
767 " hardware doesn't support RSS",
771 /* Fail if hardware doesn't support that many RSS queues. */
772 if (rxqs_n >= priv->max_rss_tbl_sz) {
773 ERROR("%p: only %u RX queues can be configured for RSS",
774 (void *)dev, priv->max_rss_tbl_sz);
779 priv->rxqs_n = rxqs_n;
780 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, NULL, NULL);
783 /* Failure, rollback. */
791 * DPDK callback for Ethernet device configuration.
794 * Pointer to Ethernet device structure.
797 * 0 on success, negative errno value on failure.
800 mlx4_dev_configure(struct rte_eth_dev *dev)
802 struct priv *priv = dev->data->dev_private;
805 if (mlx4_is_secondary())
806 return -E_RTE_SECONDARY;
808 ret = dev_configure(dev);
814 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
815 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
818 * Configure secondary process queues from a private data pointer (primary
819 * or secondary) and update burst callbacks. Can take place only once.
821 * All queues must have been previously created by the primary process to
822 * avoid undefined behavior.
825 * Private data pointer from either primary or secondary process.
828 * Private data pointer from secondary process, NULL in case of error.
831 mlx4_secondary_data_setup(struct priv *priv)
833 unsigned int port_id = 0;
834 struct mlx4_secondary_data *sd;
837 unsigned int nb_tx_queues;
838 unsigned int nb_rx_queues;
841 /* priv must be valid at this point. */
842 assert(priv != NULL);
843 /* priv->dev must also be valid but may point to local memory from
844 * another process, possibly with the same address and must not
845 * be dereferenced yet. */
846 assert(priv->dev != NULL);
847 /* Determine port ID by finding out where priv comes from. */
849 sd = &mlx4_secondary_data[port_id];
850 rte_spinlock_lock(&sd->lock);
851 /* Primary process? */
852 if (sd->primary_priv == priv)
854 /* Secondary process? */
855 if (sd->data.dev_private == priv)
857 rte_spinlock_unlock(&sd->lock);
858 if (++port_id == RTE_DIM(mlx4_secondary_data))
861 /* Switch to secondary private structure. If private data has already
862 * been updated by another thread, there is nothing else to do. */
863 priv = sd->data.dev_private;
864 if (priv->dev->data == &sd->data)
866 /* Sanity checks. Secondary private structure is supposed to point
867 * to local eth_dev, itself still pointing to the shared device data
868 * structure allocated by the primary process. */
869 assert(sd->shared_dev_data != &sd->data);
870 assert(sd->data.nb_tx_queues == 0);
871 assert(sd->data.tx_queues == NULL);
872 assert(sd->data.nb_rx_queues == 0);
873 assert(sd->data.rx_queues == NULL);
874 assert(priv != sd->primary_priv);
875 assert(priv->dev->data == sd->shared_dev_data);
876 assert(priv->txqs_n == 0);
877 assert(priv->txqs == NULL);
878 assert(priv->rxqs_n == 0);
879 assert(priv->rxqs == NULL);
880 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
881 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
882 /* Allocate local storage for queues. */
883 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
884 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
885 RTE_CACHE_LINE_SIZE);
886 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
887 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
888 RTE_CACHE_LINE_SIZE);
889 if (tx_queues == NULL || rx_queues == NULL)
891 /* Lock to prevent control operations during setup. */
894 for (i = 0; i != nb_tx_queues; ++i) {
895 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
898 if (primary_txq == NULL)
900 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
901 primary_txq->socket);
903 if (txq_setup(priv->dev,
905 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
908 txq->stats.idx = primary_txq->stats.idx;
915 txq = tx_queues[--i];
922 for (i = 0; i != nb_rx_queues; ++i) {
923 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
925 if (primary_rxq == NULL)
927 /* Not supported yet. */
930 /* Update everything. */
931 priv->txqs = (void *)tx_queues;
932 priv->txqs_n = nb_tx_queues;
933 priv->rxqs = (void *)rx_queues;
934 priv->rxqs_n = nb_rx_queues;
935 sd->data.rx_queues = rx_queues;
936 sd->data.tx_queues = tx_queues;
937 sd->data.nb_rx_queues = nb_rx_queues;
938 sd->data.nb_tx_queues = nb_tx_queues;
939 sd->data.dev_link = sd->shared_dev_data->dev_link;
940 sd->data.mtu = sd->shared_dev_data->mtu;
941 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
942 sizeof(sd->data.rx_queue_state));
943 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
944 sizeof(sd->data.tx_queue_state));
945 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
946 /* Use local data from now on. */
948 priv->dev->data = &sd->data;
950 priv->dev->tx_pkt_burst = mlx4_tx_burst;
951 priv->dev->rx_pkt_burst = removed_rx_burst;
954 /* More sanity checks. */
955 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
956 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
957 assert(priv->dev->data == &sd->data);
958 rte_spinlock_unlock(&sd->lock);
964 rte_spinlock_unlock(&sd->lock);
968 /* TX queues handling. */
971 * Allocate TX queue elements.
974 * Pointer to TX queue structure.
976 * Number of elements to allocate.
979 * 0 on success, errno value on failure.
982 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
985 struct txq_elt (*elts)[elts_n] =
986 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
987 linear_t (*elts_linear)[elts_n] =
988 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
990 struct ibv_mr *mr_linear = NULL;
993 if ((elts == NULL) || (elts_linear == NULL)) {
994 ERROR("%p: can't allocate packets array", (void *)txq);
999 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
1000 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1001 if (mr_linear == NULL) {
1002 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
1007 for (i = 0; (i != elts_n); ++i) {
1008 struct txq_elt *elt = &(*elts)[i];
1012 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
1013 txq->elts_n = elts_n;
1018 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
1019 * at least 4 times per ring. */
1020 txq->elts_comp_cd_init =
1021 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
1022 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
1023 txq->elts_comp_cd = txq->elts_comp_cd_init;
1024 txq->elts_linear = elts_linear;
1025 txq->mr_linear = mr_linear;
1029 if (mr_linear != NULL)
1030 claim_zero(ibv_dereg_mr(mr_linear));
1032 rte_free(elts_linear);
1035 DEBUG("%p: failed, freed everything", (void *)txq);
1041 * Free TX queue elements.
1044 * Pointer to TX queue structure.
1047 txq_free_elts(struct txq *txq)
1050 unsigned int elts_n = txq->elts_n;
1051 struct txq_elt (*elts)[elts_n] = txq->elts;
1052 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
1053 struct ibv_mr *mr_linear = txq->mr_linear;
1055 DEBUG("%p: freeing WRs", (void *)txq);
1058 txq->elts_linear = NULL;
1059 txq->mr_linear = NULL;
1060 if (mr_linear != NULL)
1061 claim_zero(ibv_dereg_mr(mr_linear));
1063 rte_free(elts_linear);
1066 for (i = 0; (i != elemof(*elts)); ++i) {
1067 struct txq_elt *elt = &(*elts)[i];
1069 if (elt->buf == NULL)
1071 rte_pktmbuf_free(elt->buf);
1078 * Clean up a TX queue.
1080 * Destroy objects, free allocated memory and reset the structure for reuse.
1083 * Pointer to TX queue structure.
1086 txq_cleanup(struct txq *txq)
1088 struct ibv_exp_release_intf_params params;
1091 DEBUG("cleaning up %p", (void *)txq);
1093 if (txq->if_qp != NULL) {
1094 assert(txq->priv != NULL);
1095 assert(txq->priv->ctx != NULL);
1096 assert(txq->qp != NULL);
1097 params = (struct ibv_exp_release_intf_params){
1100 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1104 if (txq->if_cq != NULL) {
1105 assert(txq->priv != NULL);
1106 assert(txq->priv->ctx != NULL);
1107 assert(txq->cq != NULL);
1108 params = (struct ibv_exp_release_intf_params){
1111 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
1115 if (txq->qp != NULL)
1116 claim_zero(ibv_destroy_qp(txq->qp));
1117 if (txq->cq != NULL)
1118 claim_zero(ibv_destroy_cq(txq->cq));
1119 if (txq->rd != NULL) {
1120 struct ibv_exp_destroy_res_domain_attr attr = {
1124 assert(txq->priv != NULL);
1125 assert(txq->priv->ctx != NULL);
1126 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
1130 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1131 if (txq->mp2mr[i].mp == NULL)
1133 assert(txq->mp2mr[i].mr != NULL);
1134 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
1136 memset(txq, 0, sizeof(*txq));
1140 * Manage TX completions.
1142 * When sending a burst, mlx4_tx_burst() posts several WRs.
1143 * To improve performance, a completion event is only required once every
1144 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
1145 * for other WRs, but this information would not be used anyway.
1148 * Pointer to TX queue structure.
1151 * 0 on success, -1 on failure.
1154 txq_complete(struct txq *txq)
1156 unsigned int elts_comp = txq->elts_comp;
1157 unsigned int elts_tail = txq->elts_tail;
1158 const unsigned int elts_n = txq->elts_n;
1161 if (unlikely(elts_comp == 0))
1164 DEBUG("%p: processing %u work requests completions",
1165 (void *)txq, elts_comp);
1167 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1168 if (unlikely(wcs_n == 0))
1170 if (unlikely(wcs_n < 0)) {
1171 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1172 (void *)txq, wcs_n);
1176 assert(elts_comp <= txq->elts_comp);
1178 * Assume WC status is successful as nothing can be done about it
1181 elts_tail += wcs_n * txq->elts_comp_cd_init;
1182 if (elts_tail >= elts_n)
1183 elts_tail -= elts_n;
1184 txq->elts_tail = elts_tail;
1185 txq->elts_comp = elts_comp;
1190 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1191 * the cloned mbuf is allocated is returned instead.
1197 * Memory pool where data is located for given mbuf.
1199 static struct rte_mempool *
1200 txq_mb2mp(struct rte_mbuf *buf)
1202 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1203 return rte_mbuf_from_indirect(buf)->pool;
1208 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1209 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1210 * remove an entry first.
1213 * Pointer to TX queue structure.
1215 * Memory Pool for which a Memory Region lkey must be returned.
1218 * mr->lkey on success, (uint32_t)-1 on failure.
1221 txq_mp2mr(struct txq *txq, const struct rte_mempool *mp)
1226 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1227 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1228 /* Unknown MP, add a new MR for it. */
1231 if (txq->mp2mr[i].mp == mp) {
1232 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1233 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1234 return txq->mp2mr[i].lkey;
1237 /* Add a new entry, register MR first. */
1238 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1239 (void *)txq, mp->name, (const void *)mp);
1240 mr = ibv_reg_mr(txq->priv->pd,
1241 (void *)mp->elt_va_start,
1242 (mp->elt_va_end - mp->elt_va_start),
1243 (IBV_ACCESS_LOCAL_WRITE | IBV_ACCESS_REMOTE_WRITE));
1244 if (unlikely(mr == NULL)) {
1245 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1247 return (uint32_t)-1;
1249 if (unlikely(i == elemof(txq->mp2mr))) {
1250 /* Table is full, remove oldest entry. */
1251 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1254 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1255 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1256 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1258 /* Store the new entry. */
1259 txq->mp2mr[i].mp = mp;
1260 txq->mp2mr[i].mr = mr;
1261 txq->mp2mr[i].lkey = mr->lkey;
1262 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1263 (void *)txq, mp->name, (const void *)mp, txq->mp2mr[i].lkey);
1264 return txq->mp2mr[i].lkey;
1267 struct txq_mp2mr_mbuf_check_data {
1268 const struct rte_mempool *mp;
1273 * Callback function for rte_mempool_obj_iter() to check whether a given
1274 * mempool object looks like a mbuf.
1276 * @param[in, out] arg
1277 * Context data (struct txq_mp2mr_mbuf_check_data). Contains mempool pointer
1280 * Object start address.
1282 * Object end address.
1287 * Nonzero value when object is not a mbuf.
1290 txq_mp2mr_mbuf_check(void *arg, void *start, void *end,
1291 uint32_t index __rte_unused)
1293 struct txq_mp2mr_mbuf_check_data *data = arg;
1294 struct rte_mbuf *buf =
1295 (void *)((uintptr_t)start + data->mp->header_size);
1298 /* Check whether mbuf structure fits element size and whether mempool
1299 * pointer is valid. */
1300 if (((uintptr_t)end >= (uintptr_t)(buf + 1)) &&
1301 (buf->pool == data->mp))
1308 * Iterator function for rte_mempool_walk() to register existing mempools and
1309 * fill the MP to MR cache of a TX queue.
1312 * Memory Pool to register.
1314 * Pointer to TX queue structure.
1317 txq_mp2mr_iter(const struct rte_mempool *mp, void *arg)
1319 struct txq *txq = arg;
1320 struct txq_mp2mr_mbuf_check_data data = {
1325 /* Discard empty mempools. */
1328 /* Register mempool only if the first element looks like a mbuf. */
1329 rte_mempool_obj_iter((void *)mp->elt_va_start,
1331 mp->header_size + mp->elt_size + mp->trailer_size,
1336 txq_mp2mr_mbuf_check,
1343 #if MLX4_PMD_SGE_WR_N > 1
1346 * Copy scattered mbuf contents to a single linear buffer.
1348 * @param[out] linear
1349 * Linear output buffer.
1351 * Scattered input buffer.
1354 * Number of bytes copied to the output buffer or 0 if not large enough.
1357 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1359 unsigned int size = 0;
1360 unsigned int offset;
1363 unsigned int len = DATA_LEN(buf);
1367 if (unlikely(size > sizeof(*linear)))
1369 memcpy(&(*linear)[offset],
1370 rte_pktmbuf_mtod(buf, uint8_t *),
1373 } while (buf != NULL);
1378 * Handle scattered buffers for mlx4_tx_burst().
1381 * TX queue structure.
1383 * Number of segments in buf.
1385 * TX queue element to fill.
1387 * Buffer to process.
1389 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1391 * Array filled with SGEs on success.
1394 * A structure containing the processed packet size in bytes and the
1395 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1398 static struct tx_burst_sg_ret {
1399 unsigned int length;
1402 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1403 struct rte_mbuf *buf, unsigned int elts_head,
1404 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1406 unsigned int sent_size = 0;
1410 /* When there are too many segments, extra segments are
1411 * linearized in the last SGE. */
1412 if (unlikely(segs > elemof(*sges))) {
1413 segs = (elemof(*sges) - 1);
1416 /* Update element. */
1418 /* Register segments as SGEs. */
1419 for (j = 0; (j != segs); ++j) {
1420 struct ibv_sge *sge = &(*sges)[j];
1423 /* Retrieve Memory Region key for this memory pool. */
1424 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1425 if (unlikely(lkey == (uint32_t)-1)) {
1426 /* MR does not exist. */
1427 DEBUG("%p: unable to get MP <-> MR association",
1429 /* Clean up TX element. */
1434 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1436 rte_prefetch0((volatile void *)
1437 (uintptr_t)sge->addr);
1438 sge->length = DATA_LEN(buf);
1440 sent_size += sge->length;
1443 /* If buf is not NULL here and is not going to be linearized,
1444 * nb_segs is not valid. */
1446 assert((buf == NULL) || (linearize));
1447 /* Linearize extra segments. */
1449 struct ibv_sge *sge = &(*sges)[segs];
1450 linear_t *linear = &(*txq->elts_linear)[elts_head];
1451 unsigned int size = linearize_mbuf(linear, buf);
1453 assert(segs == (elemof(*sges) - 1));
1455 /* Invalid packet. */
1456 DEBUG("%p: packet too large to be linearized.",
1458 /* Clean up TX element. */
1462 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1463 if (elemof(*sges) == 1) {
1465 struct rte_mbuf *next = NEXT(buf);
1467 rte_pktmbuf_free_seg(buf);
1469 } while (buf != NULL);
1473 sge->addr = (uintptr_t)&(*linear)[0];
1475 sge->lkey = txq->mr_linear->lkey;
1477 /* Include last segment. */
1480 return (struct tx_burst_sg_ret){
1481 .length = sent_size,
1485 return (struct tx_burst_sg_ret){
1491 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1494 * DPDK callback for TX.
1497 * Generic pointer to TX queue structure.
1499 * Packets to transmit.
1501 * Number of packets in array.
1504 * Number of packets successfully transmitted (<= pkts_n).
1507 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1509 struct txq *txq = (struct txq *)dpdk_txq;
1510 unsigned int elts_head = txq->elts_head;
1511 const unsigned int elts_n = txq->elts_n;
1512 unsigned int elts_comp_cd = txq->elts_comp_cd;
1513 unsigned int elts_comp = 0;
1518 assert(elts_comp_cd != 0);
1520 max = (elts_n - (elts_head - txq->elts_tail));
1524 assert(max <= elts_n);
1525 /* Always leave one free entry in the ring. */
1531 for (i = 0; (i != max); ++i) {
1532 struct rte_mbuf *buf = pkts[i];
1533 unsigned int elts_head_next =
1534 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1535 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1536 struct txq_elt *elt = &(*txq->elts)[elts_head];
1537 unsigned int segs = NB_SEGS(buf);
1538 #ifdef MLX4_PMD_SOFT_COUNTERS
1539 unsigned int sent_size = 0;
1541 uint32_t send_flags = 0;
1543 /* Clean up old buffer. */
1544 if (likely(elt->buf != NULL)) {
1545 struct rte_mbuf *tmp = elt->buf;
1547 /* Faster than rte_pktmbuf_free(). */
1549 struct rte_mbuf *next = NEXT(tmp);
1551 rte_pktmbuf_free_seg(tmp);
1553 } while (tmp != NULL);
1555 /* Request TX completion. */
1556 if (unlikely(--elts_comp_cd == 0)) {
1557 elts_comp_cd = txq->elts_comp_cd_init;
1559 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1561 /* Should we enable HW CKSUM offload */
1563 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1564 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1565 /* HW does not support checksum offloads at arbitrary
1566 * offsets but automatically recognizes the packet
1567 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1568 * tunnels are currently supported. */
1569 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1570 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1572 if (likely(segs == 1)) {
1577 /* Retrieve buffer information. */
1578 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1579 length = DATA_LEN(buf);
1580 /* Retrieve Memory Region key for this memory pool. */
1581 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1582 if (unlikely(lkey == (uint32_t)-1)) {
1583 /* MR does not exist. */
1584 DEBUG("%p: unable to get MP <-> MR"
1585 " association", (void *)txq);
1586 /* Clean up TX element. */
1590 /* Update element. */
1593 rte_prefetch0((volatile void *)
1595 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1596 /* Put packet into send queue. */
1597 #if MLX4_PMD_MAX_INLINE > 0
1598 if (length <= txq->max_inline)
1599 err = txq->if_qp->send_pending_inline
1606 err = txq->if_qp->send_pending
1614 #ifdef MLX4_PMD_SOFT_COUNTERS
1615 sent_size += length;
1618 #if MLX4_PMD_SGE_WR_N > 1
1619 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1620 struct tx_burst_sg_ret ret;
1622 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1624 if (ret.length == (unsigned int)-1)
1626 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1627 /* Put SG list into send queue. */
1628 err = txq->if_qp->send_pending_sg_list
1635 #ifdef MLX4_PMD_SOFT_COUNTERS
1636 sent_size += ret.length;
1638 #else /* MLX4_PMD_SGE_WR_N > 1 */
1639 DEBUG("%p: TX scattered buffers support not"
1640 " compiled in", (void *)txq);
1642 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1644 elts_head = elts_head_next;
1645 #ifdef MLX4_PMD_SOFT_COUNTERS
1646 /* Increment sent bytes counter. */
1647 txq->stats.obytes += sent_size;
1651 /* Take a shortcut if nothing must be sent. */
1652 if (unlikely(i == 0))
1654 #ifdef MLX4_PMD_SOFT_COUNTERS
1655 /* Increment sent packets counter. */
1656 txq->stats.opackets += i;
1658 /* Ring QP doorbell. */
1659 err = txq->if_qp->send_flush(txq->qp);
1660 if (unlikely(err)) {
1661 /* A nonzero value is not supposed to be returned.
1662 * Nothing can be done about it. */
1663 DEBUG("%p: send_flush() failed with error %d",
1666 txq->elts_head = elts_head;
1667 txq->elts_comp += elts_comp;
1668 txq->elts_comp_cd = elts_comp_cd;
1673 * DPDK callback for TX in secondary processes.
1675 * This function configures all queues from primary process information
1676 * if necessary before reverting to the normal TX burst callback.
1679 * Generic pointer to TX queue structure.
1681 * Packets to transmit.
1683 * Number of packets in array.
1686 * Number of packets successfully transmitted (<= pkts_n).
1689 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1692 struct txq *txq = dpdk_txq;
1693 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1694 struct priv *primary_priv;
1700 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1701 /* Look for queue index in both private structures. */
1702 for (index = 0; index != priv->txqs_n; ++index)
1703 if (((*primary_priv->txqs)[index] == txq) ||
1704 ((*priv->txqs)[index] == txq))
1706 if (index == priv->txqs_n)
1708 txq = (*priv->txqs)[index];
1709 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1713 * Configure a TX queue.
1716 * Pointer to Ethernet device structure.
1718 * Pointer to TX queue structure.
1720 * Number of descriptors to configure in queue.
1722 * NUMA socket on which memory must be allocated.
1724 * Thresholds parameters.
1727 * 0 on success, errno value on failure.
1730 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1731 unsigned int socket, const struct rte_eth_txconf *conf)
1733 struct priv *priv = mlx4_get_priv(dev);
1739 struct ibv_exp_query_intf_params params;
1740 struct ibv_exp_qp_init_attr init;
1741 struct ibv_exp_res_domain_init_attr rd;
1742 struct ibv_exp_cq_init_attr cq;
1743 struct ibv_exp_qp_attr mod;
1745 enum ibv_exp_query_intf_status status;
1748 (void)conf; /* Thresholds configuration (ignored). */
1751 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1752 ERROR("%p: invalid number of TX descriptors (must be a"
1753 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1756 desc /= MLX4_PMD_SGE_WR_N;
1757 /* MRs will be registered in mp2mr[] later. */
1758 attr.rd = (struct ibv_exp_res_domain_init_attr){
1759 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1760 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1761 .thread_model = IBV_EXP_THREAD_SINGLE,
1762 .msg_model = IBV_EXP_MSG_HIGH_BW,
1764 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1765 if (tmpl.rd == NULL) {
1767 ERROR("%p: RD creation failure: %s",
1768 (void *)dev, strerror(ret));
1771 attr.cq = (struct ibv_exp_cq_init_attr){
1772 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1773 .res_domain = tmpl.rd,
1775 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1776 if (tmpl.cq == NULL) {
1778 ERROR("%p: CQ creation failure: %s",
1779 (void *)dev, strerror(ret));
1782 DEBUG("priv->device_attr.max_qp_wr is %d",
1783 priv->device_attr.max_qp_wr);
1784 DEBUG("priv->device_attr.max_sge is %d",
1785 priv->device_attr.max_sge);
1786 attr.init = (struct ibv_exp_qp_init_attr){
1787 /* CQ to be associated with the send queue. */
1789 /* CQ to be associated with the receive queue. */
1792 /* Max number of outstanding WRs. */
1793 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1794 priv->device_attr.max_qp_wr :
1796 /* Max number of scatter/gather elements in a WR. */
1797 .max_send_sge = ((priv->device_attr.max_sge <
1798 MLX4_PMD_SGE_WR_N) ?
1799 priv->device_attr.max_sge :
1801 #if MLX4_PMD_MAX_INLINE > 0
1802 .max_inline_data = MLX4_PMD_MAX_INLINE,
1805 .qp_type = IBV_QPT_RAW_PACKET,
1806 /* Do *NOT* enable this, completions events are managed per
1810 .res_domain = tmpl.rd,
1811 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1812 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1814 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1815 if (tmpl.qp == NULL) {
1816 ret = (errno ? errno : EINVAL);
1817 ERROR("%p: QP creation failure: %s",
1818 (void *)dev, strerror(ret));
1821 #if MLX4_PMD_MAX_INLINE > 0
1822 /* ibv_create_qp() updates this value. */
1823 tmpl.max_inline = attr.init.cap.max_inline_data;
1825 attr.mod = (struct ibv_exp_qp_attr){
1826 /* Move the QP to this state. */
1827 .qp_state = IBV_QPS_INIT,
1828 /* Primary port number. */
1829 .port_num = priv->port
1831 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1832 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1834 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1835 (void *)dev, strerror(ret));
1838 ret = txq_alloc_elts(&tmpl, desc);
1840 ERROR("%p: TXQ allocation failed: %s",
1841 (void *)dev, strerror(ret));
1844 attr.mod = (struct ibv_exp_qp_attr){
1845 .qp_state = IBV_QPS_RTR
1847 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1849 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1850 (void *)dev, strerror(ret));
1853 attr.mod.qp_state = IBV_QPS_RTS;
1854 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1856 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1857 (void *)dev, strerror(ret));
1860 attr.params = (struct ibv_exp_query_intf_params){
1861 .intf_scope = IBV_EXP_INTF_GLOBAL,
1862 .intf = IBV_EXP_INTF_CQ,
1865 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1866 if (tmpl.if_cq == NULL) {
1867 ERROR("%p: CQ interface family query failed with status %d",
1868 (void *)dev, status);
1871 attr.params = (struct ibv_exp_query_intf_params){
1872 .intf_scope = IBV_EXP_INTF_GLOBAL,
1873 .intf = IBV_EXP_INTF_QP_BURST,
1875 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1876 /* MC loopback must be disabled when not using a VF. */
1879 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1883 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1884 if (tmpl.if_qp == NULL) {
1885 ERROR("%p: QP interface family query failed with status %d",
1886 (void *)dev, status);
1889 /* Clean up txq in case we're reinitializing it. */
1890 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1893 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1894 /* Pre-register known mempools. */
1895 rte_mempool_walk(txq_mp2mr_iter, txq);
1905 * DPDK callback to configure a TX queue.
1908 * Pointer to Ethernet device structure.
1912 * Number of descriptors to configure in queue.
1914 * NUMA socket on which memory must be allocated.
1916 * Thresholds parameters.
1919 * 0 on success, negative errno value on failure.
1922 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1923 unsigned int socket, const struct rte_eth_txconf *conf)
1925 struct priv *priv = dev->data->dev_private;
1926 struct txq *txq = (*priv->txqs)[idx];
1929 if (mlx4_is_secondary())
1930 return -E_RTE_SECONDARY;
1932 DEBUG("%p: configuring queue %u for %u descriptors",
1933 (void *)dev, idx, desc);
1934 if (idx >= priv->txqs_n) {
1935 ERROR("%p: queue index out of range (%u >= %u)",
1936 (void *)dev, idx, priv->txqs_n);
1941 DEBUG("%p: reusing already allocated queue index %u (%p)",
1942 (void *)dev, idx, (void *)txq);
1943 if (priv->started) {
1947 (*priv->txqs)[idx] = NULL;
1950 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1952 ERROR("%p: unable to allocate queue index %u",
1958 ret = txq_setup(dev, txq, desc, socket, conf);
1962 txq->stats.idx = idx;
1963 DEBUG("%p: adding TX queue %p to list",
1964 (void *)dev, (void *)txq);
1965 (*priv->txqs)[idx] = txq;
1966 /* Update send callback. */
1967 dev->tx_pkt_burst = mlx4_tx_burst;
1974 * DPDK callback to release a TX queue.
1977 * Generic TX queue pointer.
1980 mlx4_tx_queue_release(void *dpdk_txq)
1982 struct txq *txq = (struct txq *)dpdk_txq;
1986 if (mlx4_is_secondary())
1992 for (i = 0; (i != priv->txqs_n); ++i)
1993 if ((*priv->txqs)[i] == txq) {
1994 DEBUG("%p: removing TX queue %p from list",
1995 (void *)priv->dev, (void *)txq);
1996 (*priv->txqs)[i] = NULL;
2004 /* RX queues handling. */
2007 * Allocate RX queue elements with scattered packets support.
2010 * Pointer to RX queue structure.
2012 * Number of elements to allocate.
2014 * If not NULL, fetch buffers from this array instead of allocating them
2015 * with rte_pktmbuf_alloc().
2018 * 0 on success, errno value on failure.
2021 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
2022 struct rte_mbuf **pool)
2025 struct rxq_elt_sp (*elts)[elts_n] =
2026 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2031 ERROR("%p: can't allocate packets array", (void *)rxq);
2035 /* For each WR (packet). */
2036 for (i = 0; (i != elts_n); ++i) {
2038 struct rxq_elt_sp *elt = &(*elts)[i];
2039 struct ibv_recv_wr *wr = &elt->wr;
2040 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
2042 /* These two arrays must have the same size. */
2043 assert(elemof(elt->sges) == elemof(elt->bufs));
2046 wr->next = &(*elts)[(i + 1)].wr;
2047 wr->sg_list = &(*sges)[0];
2048 wr->num_sge = elemof(*sges);
2049 /* For each SGE (segment). */
2050 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2051 struct ibv_sge *sge = &(*sges)[j];
2052 struct rte_mbuf *buf;
2056 assert(buf != NULL);
2057 rte_pktmbuf_reset(buf);
2059 buf = rte_pktmbuf_alloc(rxq->mp);
2061 assert(pool == NULL);
2062 ERROR("%p: empty mbuf pool", (void *)rxq);
2067 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2068 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2069 /* Buffer is supposed to be empty. */
2070 assert(rte_pktmbuf_data_len(buf) == 0);
2071 assert(rte_pktmbuf_pkt_len(buf) == 0);
2072 /* sge->addr must be able to store a pointer. */
2073 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2075 /* The first SGE keeps its headroom. */
2076 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2077 sge->length = (buf->buf_len -
2078 RTE_PKTMBUF_HEADROOM);
2080 /* Subsequent SGEs lose theirs. */
2081 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2082 SET_DATA_OFF(buf, 0);
2083 sge->addr = (uintptr_t)buf->buf_addr;
2084 sge->length = buf->buf_len;
2086 sge->lkey = rxq->mr->lkey;
2087 /* Redundant check for tailroom. */
2088 assert(sge->length == rte_pktmbuf_tailroom(buf));
2091 /* The last WR pointer must be NULL. */
2092 (*elts)[(i - 1)].wr.next = NULL;
2093 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2094 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2095 rxq->elts_n = elts_n;
2097 rxq->elts.sp = elts;
2102 assert(pool == NULL);
2103 for (i = 0; (i != elemof(*elts)); ++i) {
2105 struct rxq_elt_sp *elt = &(*elts)[i];
2107 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2108 struct rte_mbuf *buf = elt->bufs[j];
2111 rte_pktmbuf_free_seg(buf);
2116 DEBUG("%p: failed, freed everything", (void *)rxq);
2122 * Free RX queue elements with scattered packets support.
2125 * Pointer to RX queue structure.
2128 rxq_free_elts_sp(struct rxq *rxq)
2131 unsigned int elts_n = rxq->elts_n;
2132 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2134 DEBUG("%p: freeing WRs", (void *)rxq);
2136 rxq->elts.sp = NULL;
2139 for (i = 0; (i != elemof(*elts)); ++i) {
2141 struct rxq_elt_sp *elt = &(*elts)[i];
2143 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2144 struct rte_mbuf *buf = elt->bufs[j];
2147 rte_pktmbuf_free_seg(buf);
2154 * Allocate RX queue elements.
2157 * Pointer to RX queue structure.
2159 * Number of elements to allocate.
2161 * If not NULL, fetch buffers from this array instead of allocating them
2162 * with rte_pktmbuf_alloc().
2165 * 0 on success, errno value on failure.
2168 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2171 struct rxq_elt (*elts)[elts_n] =
2172 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2177 ERROR("%p: can't allocate packets array", (void *)rxq);
2181 /* For each WR (packet). */
2182 for (i = 0; (i != elts_n); ++i) {
2183 struct rxq_elt *elt = &(*elts)[i];
2184 struct ibv_recv_wr *wr = &elt->wr;
2185 struct ibv_sge *sge = &(*elts)[i].sge;
2186 struct rte_mbuf *buf;
2190 assert(buf != NULL);
2191 rte_pktmbuf_reset(buf);
2193 buf = rte_pktmbuf_alloc(rxq->mp);
2195 assert(pool == NULL);
2196 ERROR("%p: empty mbuf pool", (void *)rxq);
2200 /* Configure WR. Work request ID contains its own index in
2201 * the elts array and the offset between SGE buffer header and
2203 WR_ID(wr->wr_id).id = i;
2204 WR_ID(wr->wr_id).offset =
2205 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2207 wr->next = &(*elts)[(i + 1)].wr;
2210 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2211 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2212 /* Buffer is supposed to be empty. */
2213 assert(rte_pktmbuf_data_len(buf) == 0);
2214 assert(rte_pktmbuf_pkt_len(buf) == 0);
2215 /* sge->addr must be able to store a pointer. */
2216 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2217 /* SGE keeps its headroom. */
2218 sge->addr = (uintptr_t)
2219 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2220 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2221 sge->lkey = rxq->mr->lkey;
2222 /* Redundant check for tailroom. */
2223 assert(sge->length == rte_pktmbuf_tailroom(buf));
2224 /* Make sure elts index and SGE mbuf pointer can be deduced
2226 if ((WR_ID(wr->wr_id).id != i) ||
2227 ((void *)((uintptr_t)sge->addr -
2228 WR_ID(wr->wr_id).offset) != buf)) {
2229 ERROR("%p: cannot store index and offset in WR ID",
2232 rte_pktmbuf_free(buf);
2237 /* The last WR pointer must be NULL. */
2238 (*elts)[(i - 1)].wr.next = NULL;
2239 DEBUG("%p: allocated and configured %u single-segment WRs",
2240 (void *)rxq, elts_n);
2241 rxq->elts_n = elts_n;
2243 rxq->elts.no_sp = elts;
2248 assert(pool == NULL);
2249 for (i = 0; (i != elemof(*elts)); ++i) {
2250 struct rxq_elt *elt = &(*elts)[i];
2251 struct rte_mbuf *buf;
2253 if (elt->sge.addr == 0)
2255 assert(WR_ID(elt->wr.wr_id).id == i);
2256 buf = (void *)((uintptr_t)elt->sge.addr -
2257 WR_ID(elt->wr.wr_id).offset);
2258 rte_pktmbuf_free_seg(buf);
2262 DEBUG("%p: failed, freed everything", (void *)rxq);
2268 * Free RX queue elements.
2271 * Pointer to RX queue structure.
2274 rxq_free_elts(struct rxq *rxq)
2277 unsigned int elts_n = rxq->elts_n;
2278 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2280 DEBUG("%p: freeing WRs", (void *)rxq);
2282 rxq->elts.no_sp = NULL;
2285 for (i = 0; (i != elemof(*elts)); ++i) {
2286 struct rxq_elt *elt = &(*elts)[i];
2287 struct rte_mbuf *buf;
2289 if (elt->sge.addr == 0)
2291 assert(WR_ID(elt->wr.wr_id).id == i);
2292 buf = (void *)((uintptr_t)elt->sge.addr -
2293 WR_ID(elt->wr.wr_id).offset);
2294 rte_pktmbuf_free_seg(buf);
2300 * Delete flow steering rule.
2303 * Pointer to RX queue structure.
2305 * MAC address index.
2310 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2313 struct priv *priv = rxq->priv;
2314 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2315 (const uint8_t (*)[ETHER_ADDR_LEN])
2316 priv->mac[mac_index].addr_bytes;
2318 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2319 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2320 " (VLAN ID %" PRIu16 ")",
2322 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2323 mac_index, priv->vlan_filter[vlan_index].id);
2324 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2325 rxq->mac_flow[mac_index][vlan_index] = NULL;
2329 * Unregister a MAC address from a RX queue.
2332 * Pointer to RX queue structure.
2334 * MAC address index.
2337 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2339 struct priv *priv = rxq->priv;
2341 unsigned int vlans = 0;
2343 assert(mac_index < elemof(priv->mac));
2344 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2346 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2347 if (!priv->vlan_filter[i].enabled)
2349 rxq_del_flow(rxq, mac_index, i);
2353 rxq_del_flow(rxq, mac_index, 0);
2355 BITFIELD_RESET(rxq->mac_configured, mac_index);
2359 * Unregister all MAC addresses from a RX queue.
2362 * Pointer to RX queue structure.
2365 rxq_mac_addrs_del(struct rxq *rxq)
2367 struct priv *priv = rxq->priv;
2370 for (i = 0; (i != elemof(priv->mac)); ++i)
2371 rxq_mac_addr_del(rxq, i);
2374 static int rxq_promiscuous_enable(struct rxq *);
2375 static void rxq_promiscuous_disable(struct rxq *);
2378 * Add single flow steering rule.
2381 * Pointer to RX queue structure.
2383 * MAC address index to register.
2385 * VLAN index. Use -1 for a flow without VLAN.
2388 * 0 on success, errno value on failure.
2391 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2393 struct ibv_flow *flow;
2394 struct priv *priv = rxq->priv;
2395 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2396 (const uint8_t (*)[ETHER_ADDR_LEN])
2397 priv->mac[mac_index].addr_bytes;
2399 /* Allocate flow specification on the stack. */
2400 struct __attribute__((packed)) {
2401 struct ibv_flow_attr attr;
2402 struct ibv_flow_spec_eth spec;
2404 struct ibv_flow_attr *attr = &data.attr;
2405 struct ibv_flow_spec_eth *spec = &data.spec;
2407 assert(mac_index < elemof(priv->mac));
2408 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2410 * No padding must be inserted by the compiler between attr and spec.
2411 * This layout is expected by libibverbs.
2413 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2414 *attr = (struct ibv_flow_attr){
2415 .type = IBV_FLOW_ATTR_NORMAL,
2420 *spec = (struct ibv_flow_spec_eth){
2421 .type = IBV_FLOW_SPEC_ETH,
2422 .size = sizeof(*spec),
2425 (*mac)[0], (*mac)[1], (*mac)[2],
2426 (*mac)[3], (*mac)[4], (*mac)[5]
2428 .vlan_tag = ((vlan_index != -1u) ?
2429 htons(priv->vlan_filter[vlan_index].id) :
2433 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2434 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2437 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2438 " (VLAN %s %" PRIu16 ")",
2440 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2442 ((vlan_index != -1u) ? "ID" : "index"),
2443 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2444 /* Create related flow. */
2446 flow = ibv_create_flow(rxq->qp, attr);
2448 /* It's not clear whether errno is always set in this case. */
2449 ERROR("%p: flow configuration failed, errno=%d: %s",
2451 (errno ? strerror(errno) : "Unknown error"));
2456 if (vlan_index == -1u)
2458 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2459 rxq->mac_flow[mac_index][vlan_index] = flow;
2464 * Register a MAC address in a RX queue.
2467 * Pointer to RX queue structure.
2469 * MAC address index to register.
2472 * 0 on success, errno value on failure.
2475 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2477 struct priv *priv = rxq->priv;
2479 unsigned int vlans = 0;
2482 assert(mac_index < elemof(priv->mac));
2483 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2484 rxq_mac_addr_del(rxq, mac_index);
2485 /* Fill VLAN specifications. */
2486 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2487 if (!priv->vlan_filter[i].enabled)
2489 /* Create related flow. */
2490 ret = rxq_add_flow(rxq, mac_index, i);
2495 /* Failure, rollback. */
2497 if (priv->vlan_filter[--i].enabled)
2498 rxq_del_flow(rxq, mac_index, i);
2502 /* In case there is no VLAN filter. */
2504 ret = rxq_add_flow(rxq, mac_index, -1);
2508 BITFIELD_SET(rxq->mac_configured, mac_index);
2513 * Register all MAC addresses in a RX queue.
2516 * Pointer to RX queue structure.
2519 * 0 on success, errno value on failure.
2522 rxq_mac_addrs_add(struct rxq *rxq)
2524 struct priv *priv = rxq->priv;
2528 for (i = 0; (i != elemof(priv->mac)); ++i) {
2529 if (!BITFIELD_ISSET(priv->mac_configured, i))
2531 ret = rxq_mac_addr_add(rxq, i);
2534 /* Failure, rollback. */
2536 rxq_mac_addr_del(rxq, --i);
2544 * Unregister a MAC address.
2546 * In RSS mode, the MAC address is unregistered from the parent queue,
2547 * otherwise it is unregistered from each queue directly.
2550 * Pointer to private structure.
2552 * MAC address index.
2555 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2559 assert(mac_index < elemof(priv->mac));
2560 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2563 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2566 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2567 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2569 BITFIELD_RESET(priv->mac_configured, mac_index);
2573 * Register a MAC address.
2575 * In RSS mode, the MAC address is registered in the parent queue,
2576 * otherwise it is registered in each queue directly.
2579 * Pointer to private structure.
2581 * MAC address index to use.
2583 * MAC address to register.
2586 * 0 on success, errno value on failure.
2589 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2590 const uint8_t (*mac)[ETHER_ADDR_LEN])
2595 assert(mac_index < elemof(priv->mac));
2596 /* First, make sure this address isn't already configured. */
2597 for (i = 0; (i != elemof(priv->mac)); ++i) {
2598 /* Skip this index, it's going to be reconfigured. */
2601 if (!BITFIELD_ISSET(priv->mac_configured, i))
2603 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2605 /* Address already configured elsewhere, return with error. */
2608 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2609 priv_mac_addr_del(priv, mac_index);
2610 priv->mac[mac_index] = (struct ether_addr){
2612 (*mac)[0], (*mac)[1], (*mac)[2],
2613 (*mac)[3], (*mac)[4], (*mac)[5]
2616 /* If device isn't started, this is all we need to do. */
2617 if (!priv->started) {
2619 /* Verify that all queues have this index disabled. */
2620 for (i = 0; (i != priv->rxqs_n); ++i) {
2621 if ((*priv->rxqs)[i] == NULL)
2623 assert(!BITFIELD_ISSET
2624 ((*priv->rxqs)[i]->mac_configured, mac_index));
2630 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2635 for (i = 0; (i != priv->rxqs_n); ++i) {
2636 if ((*priv->rxqs)[i] == NULL)
2638 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2641 /* Failure, rollback. */
2643 if ((*priv->rxqs)[(--i)] != NULL)
2644 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2648 BITFIELD_SET(priv->mac_configured, mac_index);
2653 * Enable allmulti mode in a RX queue.
2656 * Pointer to RX queue structure.
2659 * 0 on success, errno value on failure.
2662 rxq_allmulticast_enable(struct rxq *rxq)
2664 struct ibv_flow *flow;
2665 struct ibv_flow_attr attr = {
2666 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2668 .port = rxq->priv->port,
2672 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2673 if (rxq->allmulti_flow != NULL)
2676 flow = ibv_create_flow(rxq->qp, &attr);
2678 /* It's not clear whether errno is always set in this case. */
2679 ERROR("%p: flow configuration failed, errno=%d: %s",
2681 (errno ? strerror(errno) : "Unknown error"));
2686 rxq->allmulti_flow = flow;
2687 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2692 * Disable allmulti mode in a RX queue.
2695 * Pointer to RX queue structure.
2698 rxq_allmulticast_disable(struct rxq *rxq)
2700 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2701 if (rxq->allmulti_flow == NULL)
2703 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2704 rxq->allmulti_flow = NULL;
2705 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2709 * Enable promiscuous mode in a RX queue.
2712 * Pointer to RX queue structure.
2715 * 0 on success, errno value on failure.
2718 rxq_promiscuous_enable(struct rxq *rxq)
2720 struct ibv_flow *flow;
2721 struct ibv_flow_attr attr = {
2722 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2724 .port = rxq->priv->port,
2730 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2731 if (rxq->promisc_flow != NULL)
2734 flow = ibv_create_flow(rxq->qp, &attr);
2736 /* It's not clear whether errno is always set in this case. */
2737 ERROR("%p: flow configuration failed, errno=%d: %s",
2739 (errno ? strerror(errno) : "Unknown error"));
2744 rxq->promisc_flow = flow;
2745 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2750 * Disable promiscuous mode in a RX queue.
2753 * Pointer to RX queue structure.
2756 rxq_promiscuous_disable(struct rxq *rxq)
2760 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2761 if (rxq->promisc_flow == NULL)
2763 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2764 rxq->promisc_flow = NULL;
2765 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2769 * Clean up a RX queue.
2771 * Destroy objects, free allocated memory and reset the structure for reuse.
2774 * Pointer to RX queue structure.
2777 rxq_cleanup(struct rxq *rxq)
2779 struct ibv_exp_release_intf_params params;
2781 DEBUG("cleaning up %p", (void *)rxq);
2783 rxq_free_elts_sp(rxq);
2786 if (rxq->if_qp != NULL) {
2787 assert(rxq->priv != NULL);
2788 assert(rxq->priv->ctx != NULL);
2789 assert(rxq->qp != NULL);
2790 params = (struct ibv_exp_release_intf_params){
2793 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2797 if (rxq->if_cq != NULL) {
2798 assert(rxq->priv != NULL);
2799 assert(rxq->priv->ctx != NULL);
2800 assert(rxq->cq != NULL);
2801 params = (struct ibv_exp_release_intf_params){
2804 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2808 if (rxq->qp != NULL) {
2809 rxq_promiscuous_disable(rxq);
2810 rxq_allmulticast_disable(rxq);
2811 rxq_mac_addrs_del(rxq);
2812 claim_zero(ibv_destroy_qp(rxq->qp));
2814 if (rxq->cq != NULL)
2815 claim_zero(ibv_destroy_cq(rxq->cq));
2816 if (rxq->rd != NULL) {
2817 struct ibv_exp_destroy_res_domain_attr attr = {
2821 assert(rxq->priv != NULL);
2822 assert(rxq->priv->ctx != NULL);
2823 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2827 if (rxq->mr != NULL)
2828 claim_zero(ibv_dereg_mr(rxq->mr));
2829 memset(rxq, 0, sizeof(*rxq));
2833 * Translate RX completion flags to packet type.
2836 * RX completion flags returned by poll_length_flags().
2839 * Packet type for struct rte_mbuf.
2841 static inline uint32_t
2842 rxq_cq_to_pkt_type(uint32_t flags)
2846 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2849 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2851 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET, RTE_PTYPE_L3_IPV6) |
2853 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_INNER_L3_IPV4) |
2855 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_INNER_L3_IPV6);
2859 IBV_EXP_CQ_RX_IPV4_PACKET, RTE_PTYPE_L3_IPV4) |
2861 IBV_EXP_CQ_RX_IPV6_PACKET, RTE_PTYPE_L3_IPV6);
2866 * Translate RX completion flags to offload flags.
2869 * Pointer to RX queue structure.
2871 * RX completion flags returned by poll_length_flags().
2874 * Offload flags (ol_flags) for struct rte_mbuf.
2876 static inline uint32_t
2877 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2879 uint32_t ol_flags = 0;
2884 IBV_EXP_CQ_RX_IP_CSUM_OK,
2885 PKT_RX_IP_CKSUM_BAD) |
2887 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2888 PKT_RX_L4_CKSUM_BAD);
2890 * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place
2891 * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional
2894 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2897 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2898 PKT_RX_IP_CKSUM_BAD) |
2900 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2901 PKT_RX_L4_CKSUM_BAD);
2906 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2909 * DPDK callback for RX with scattered packets support.
2912 * Generic pointer to RX queue structure.
2914 * Array to store received packets.
2916 * Maximum number of packets in array.
2919 * Number of packets successfully received (<= pkts_n).
2922 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2924 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2925 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2926 const unsigned int elts_n = rxq->elts_n;
2927 unsigned int elts_head = rxq->elts_head;
2928 struct ibv_recv_wr head;
2929 struct ibv_recv_wr **next = &head.next;
2930 struct ibv_recv_wr *bad_wr;
2932 unsigned int pkts_ret = 0;
2935 if (unlikely(!rxq->sp))
2936 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2937 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2939 for (i = 0; (i != pkts_n); ++i) {
2940 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2941 struct ibv_recv_wr *wr = &elt->wr;
2942 uint64_t wr_id = wr->wr_id;
2944 unsigned int pkt_buf_len;
2945 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2946 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2947 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2951 /* Sanity checks. */
2955 assert(wr_id < rxq->elts_n);
2956 assert(wr->sg_list == elt->sges);
2957 assert(wr->num_sge == elemof(elt->sges));
2958 assert(elts_head < rxq->elts_n);
2959 assert(rxq->elts_head < rxq->elts_n);
2960 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2962 if (unlikely(ret < 0)) {
2966 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2968 /* ibv_poll_cq() must be used in case of failure. */
2969 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2970 if (unlikely(wcs_n == 0))
2972 if (unlikely(wcs_n < 0)) {
2973 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2974 (void *)rxq, wcs_n);
2978 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2979 /* Whatever, just repost the offending WR. */
2980 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2981 " completion status (%d): %s",
2982 (void *)rxq, wc.wr_id, wc.status,
2983 ibv_wc_status_str(wc.status));
2984 #ifdef MLX4_PMD_SOFT_COUNTERS
2985 /* Increment dropped packets counter. */
2986 ++rxq->stats.idropped;
2988 /* Link completed WRs together for repost. */
2999 /* Link completed WRs together for repost. */
3003 * Replace spent segments with new ones, concatenate and
3004 * return them as pkt_buf.
3007 struct ibv_sge *sge = &elt->sges[j];
3008 struct rte_mbuf *seg = elt->bufs[j];
3009 struct rte_mbuf *rep;
3010 unsigned int seg_tailroom;
3013 * Fetch initial bytes of packet descriptor into a
3014 * cacheline while allocating rep.
3017 rep = __rte_mbuf_raw_alloc(rxq->mp);
3018 if (unlikely(rep == NULL)) {
3020 * Unable to allocate a replacement mbuf,
3023 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
3024 " can't allocate a new mbuf",
3025 (void *)rxq, wr_id);
3026 if (pkt_buf != NULL) {
3027 *pkt_buf_next = NULL;
3028 rte_pktmbuf_free(pkt_buf);
3030 /* Increase out of memory counters. */
3031 ++rxq->stats.rx_nombuf;
3032 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3036 /* Poison user-modifiable fields in rep. */
3037 NEXT(rep) = (void *)((uintptr_t)-1);
3038 SET_DATA_OFF(rep, 0xdead);
3039 DATA_LEN(rep) = 0xd00d;
3040 PKT_LEN(rep) = 0xdeadd00d;
3041 NB_SEGS(rep) = 0x2a;
3045 assert(rep->buf_len == seg->buf_len);
3046 assert(rep->buf_len == rxq->mb_len);
3047 /* Reconfigure sge to use rep instead of seg. */
3048 assert(sge->lkey == rxq->mr->lkey);
3049 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
3052 /* Update pkt_buf if it's the first segment, or link
3053 * seg to the previous one and update pkt_buf_next. */
3054 *pkt_buf_next = seg;
3055 pkt_buf_next = &NEXT(seg);
3056 /* Update seg information. */
3057 seg_tailroom = (seg->buf_len - seg_headroom);
3058 assert(sge->length == seg_tailroom);
3059 SET_DATA_OFF(seg, seg_headroom);
3060 if (likely(len <= seg_tailroom)) {
3062 DATA_LEN(seg) = len;
3065 assert(rte_pktmbuf_headroom(seg) ==
3067 assert(rte_pktmbuf_tailroom(seg) ==
3068 (seg_tailroom - len));
3071 DATA_LEN(seg) = seg_tailroom;
3072 PKT_LEN(seg) = seg_tailroom;
3074 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3075 assert(rte_pktmbuf_tailroom(seg) == 0);
3076 /* Fix len and clear headroom for next segments. */
3077 len -= seg_tailroom;
3080 /* Update head and tail segments. */
3081 *pkt_buf_next = NULL;
3082 assert(pkt_buf != NULL);
3084 NB_SEGS(pkt_buf) = j;
3085 PORT(pkt_buf) = rxq->port_id;
3086 PKT_LEN(pkt_buf) = pkt_buf_len;
3087 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3088 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3090 /* Return packet. */
3091 *(pkts++) = pkt_buf;
3093 #ifdef MLX4_PMD_SOFT_COUNTERS
3094 /* Increase bytes counter. */
3095 rxq->stats.ibytes += pkt_buf_len;
3098 if (++elts_head >= elts_n)
3102 if (unlikely(i == 0))
3107 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3109 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3110 if (unlikely(ret)) {
3111 /* Inability to repost WRs is fatal. */
3112 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3118 rxq->elts_head = elts_head;
3119 #ifdef MLX4_PMD_SOFT_COUNTERS
3120 /* Increase packets counter. */
3121 rxq->stats.ipackets += pkts_ret;
3127 * DPDK callback for RX.
3129 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3130 * manage scattered packets. Improves performance when MRU is lower than the
3131 * size of the first segment.
3134 * Generic pointer to RX queue structure.
3136 * Array to store received packets.
3138 * Maximum number of packets in array.
3141 * Number of packets successfully received (<= pkts_n).
3144 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3146 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3147 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3148 const unsigned int elts_n = rxq->elts_n;
3149 unsigned int elts_head = rxq->elts_head;
3150 struct ibv_sge sges[pkts_n];
3152 unsigned int pkts_ret = 0;
3155 if (unlikely(rxq->sp))
3156 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3157 for (i = 0; (i != pkts_n); ++i) {
3158 struct rxq_elt *elt = &(*elts)[elts_head];
3159 struct ibv_recv_wr *wr = &elt->wr;
3160 uint64_t wr_id = wr->wr_id;
3162 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3163 WR_ID(wr_id).offset);
3164 struct rte_mbuf *rep;
3167 /* Sanity checks. */
3168 assert(WR_ID(wr_id).id < rxq->elts_n);
3169 assert(wr->sg_list == &elt->sge);
3170 assert(wr->num_sge == 1);
3171 assert(elts_head < rxq->elts_n);
3172 assert(rxq->elts_head < rxq->elts_n);
3174 * Fetch initial bytes of packet descriptor into a
3175 * cacheline while allocating rep.
3178 rte_prefetch0(&seg->cacheline1);
3179 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3181 if (unlikely(ret < 0)) {
3185 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3187 /* ibv_poll_cq() must be used in case of failure. */
3188 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3189 if (unlikely(wcs_n == 0))
3191 if (unlikely(wcs_n < 0)) {
3192 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3193 (void *)rxq, wcs_n);
3197 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3198 /* Whatever, just repost the offending WR. */
3199 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3200 " completion status (%d): %s",
3201 (void *)rxq, wc.wr_id, wc.status,
3202 ibv_wc_status_str(wc.status));
3203 #ifdef MLX4_PMD_SOFT_COUNTERS
3204 /* Increment dropped packets counter. */
3205 ++rxq->stats.idropped;
3207 /* Add SGE to array for repost. */
3216 rep = __rte_mbuf_raw_alloc(rxq->mp);
3217 if (unlikely(rep == NULL)) {
3219 * Unable to allocate a replacement mbuf,
3222 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3223 " can't allocate a new mbuf",
3224 (void *)rxq, WR_ID(wr_id).id);
3225 /* Increase out of memory counters. */
3226 ++rxq->stats.rx_nombuf;
3227 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3231 /* Reconfigure sge to use rep instead of seg. */
3232 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3233 assert(elt->sge.lkey == rxq->mr->lkey);
3234 WR_ID(wr->wr_id).offset =
3235 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3237 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3239 /* Add SGE to array for repost. */
3242 /* Update seg information. */
3243 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3245 PORT(seg) = rxq->port_id;
3248 DATA_LEN(seg) = len;
3249 seg->packet_type = rxq_cq_to_pkt_type(flags);
3250 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3252 /* Return packet. */
3255 #ifdef MLX4_PMD_SOFT_COUNTERS
3256 /* Increase bytes counter. */
3257 rxq->stats.ibytes += len;
3260 if (++elts_head >= elts_n)
3264 if (unlikely(i == 0))
3268 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3270 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3271 if (unlikely(ret)) {
3272 /* Inability to repost WRs is fatal. */
3273 DEBUG("%p: recv_burst(): failed (ret=%d)",
3278 rxq->elts_head = elts_head;
3279 #ifdef MLX4_PMD_SOFT_COUNTERS
3280 /* Increase packets counter. */
3281 rxq->stats.ipackets += pkts_ret;
3287 * DPDK callback for RX in secondary processes.
3289 * This function configures all queues from primary process information
3290 * if necessary before reverting to the normal RX burst callback.
3293 * Generic pointer to RX queue structure.
3295 * Array to store received packets.
3297 * Maximum number of packets in array.
3300 * Number of packets successfully received (<= pkts_n).
3303 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3306 struct rxq *rxq = dpdk_rxq;
3307 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3308 struct priv *primary_priv;
3314 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3315 /* Look for queue index in both private structures. */
3316 for (index = 0; index != priv->rxqs_n; ++index)
3317 if (((*primary_priv->rxqs)[index] == rxq) ||
3318 ((*priv->rxqs)[index] == rxq))
3320 if (index == priv->rxqs_n)
3322 rxq = (*priv->rxqs)[index];
3323 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3327 * Allocate a Queue Pair.
3328 * Optionally setup inline receive if supported.
3331 * Pointer to private structure.
3333 * Completion queue to associate with QP.
3335 * Number of descriptors in QP (hint only).
3338 * QP pointer or NULL in case of error.
3340 static struct ibv_qp *
3341 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3342 struct ibv_exp_res_domain *rd)
3344 struct ibv_exp_qp_init_attr attr = {
3345 /* CQ to be associated with the send queue. */
3347 /* CQ to be associated with the receive queue. */
3350 /* Max number of outstanding WRs. */
3351 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3352 priv->device_attr.max_qp_wr :
3354 /* Max number of scatter/gather elements in a WR. */
3355 .max_recv_sge = ((priv->device_attr.max_sge <
3356 MLX4_PMD_SGE_WR_N) ?
3357 priv->device_attr.max_sge :
3360 .qp_type = IBV_QPT_RAW_PACKET,
3361 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3362 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3368 attr.max_inl_recv = priv->inl_recv_size;
3369 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3371 return ibv_exp_create_qp(priv->ctx, &attr);
3377 * Allocate a RSS Queue Pair.
3378 * Optionally setup inline receive if supported.
3381 * Pointer to private structure.
3383 * Completion queue to associate with QP.
3385 * Number of descriptors in QP (hint only).
3387 * If nonzero, create a parent QP, otherwise a child.
3390 * QP pointer or NULL in case of error.
3392 static struct ibv_qp *
3393 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3394 int parent, struct ibv_exp_res_domain *rd)
3396 struct ibv_exp_qp_init_attr attr = {
3397 /* CQ to be associated with the send queue. */
3399 /* CQ to be associated with the receive queue. */
3402 /* Max number of outstanding WRs. */
3403 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3404 priv->device_attr.max_qp_wr :
3406 /* Max number of scatter/gather elements in a WR. */
3407 .max_recv_sge = ((priv->device_attr.max_sge <
3408 MLX4_PMD_SGE_WR_N) ?
3409 priv->device_attr.max_sge :
3412 .qp_type = IBV_QPT_RAW_PACKET,
3413 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3414 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3415 IBV_EXP_QP_INIT_ATTR_QPG),
3421 attr.max_inl_recv = priv->inl_recv_size,
3422 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3425 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3426 /* TSS isn't necessary. */
3427 attr.qpg.parent_attrib.tss_child_count = 0;
3428 attr.qpg.parent_attrib.rss_child_count = priv->rxqs_n;
3429 DEBUG("initializing parent RSS queue");
3431 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3432 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3433 DEBUG("initializing child RSS queue");
3435 return ibv_exp_create_qp(priv->ctx, &attr);
3438 #endif /* RSS_SUPPORT */
3441 * Reconfigure a RX queue with new parameters.
3443 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3444 * thread (such as a control thread), may corrupt the pool.
3445 * In case of failure, the queue is left untouched.
3448 * Pointer to Ethernet device structure.
3453 * 0 on success, errno value on failure.
3456 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3458 struct priv *priv = rxq->priv;
3459 struct rxq tmpl = *rxq;
3460 unsigned int mbuf_n;
3461 unsigned int desc_n;
3462 struct rte_mbuf **pool;
3464 struct ibv_exp_qp_attr mod;
3465 struct ibv_recv_wr *bad_wr;
3467 int parent = (rxq == &priv->rxq_parent);
3470 ERROR("%p: cannot rehash parent queue %p",
3471 (void *)dev, (void *)rxq);
3474 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3475 /* Number of descriptors and mbufs currently allocated. */
3476 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3478 /* Toggle RX checksum offload if hardware supports it. */
3479 if (priv->hw_csum) {
3480 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3481 rxq->csum = tmpl.csum;
3483 if (priv->hw_csum_l2tun) {
3484 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3485 rxq->csum_l2tun = tmpl.csum_l2tun;
3487 /* Enable scattered packets support for this queue if necessary. */
3488 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3489 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3490 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3492 desc_n /= MLX4_PMD_SGE_WR_N;
3495 DEBUG("%p: %s scattered packets support (%u WRs)",
3496 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3497 /* If scatter mode is the same as before, nothing to do. */
3498 if (tmpl.sp == rxq->sp) {
3499 DEBUG("%p: nothing to do", (void *)dev);
3502 /* Remove attached flows if RSS is disabled (no parent queue). */
3504 rxq_allmulticast_disable(&tmpl);
3505 rxq_promiscuous_disable(&tmpl);
3506 rxq_mac_addrs_del(&tmpl);
3507 /* Update original queue in case of failure. */
3508 rxq->allmulti_flow = tmpl.allmulti_flow;
3509 rxq->promisc_flow = tmpl.promisc_flow;
3510 memcpy(rxq->mac_configured, tmpl.mac_configured,
3511 sizeof(rxq->mac_configured));
3512 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3514 /* From now on, any failure will render the queue unusable.
3515 * Reinitialize QP. */
3516 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3517 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3519 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3523 err = ibv_resize_cq(tmpl.cq, desc_n);
3525 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3529 mod = (struct ibv_exp_qp_attr){
3530 /* Move the QP to this state. */
3531 .qp_state = IBV_QPS_INIT,
3532 /* Primary port number. */
3533 .port_num = priv->port
3535 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3538 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3539 #endif /* RSS_SUPPORT */
3542 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3543 (void *)dev, strerror(err));
3547 /* Reconfigure flows. Do not care for errors. */
3549 rxq_mac_addrs_add(&tmpl);
3551 rxq_promiscuous_enable(&tmpl);
3553 rxq_allmulticast_enable(&tmpl);
3554 /* Update original queue in case of failure. */
3555 rxq->allmulti_flow = tmpl.allmulti_flow;
3556 rxq->promisc_flow = tmpl.promisc_flow;
3557 memcpy(rxq->mac_configured, tmpl.mac_configured,
3558 sizeof(rxq->mac_configured));
3559 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3561 /* Allocate pool. */
3562 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3564 ERROR("%p: cannot allocate memory", (void *)dev);
3567 /* Snatch mbufs from original queue. */
3570 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3572 for (i = 0; (i != elemof(*elts)); ++i) {
3573 struct rxq_elt_sp *elt = &(*elts)[i];
3576 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3577 assert(elt->bufs[j] != NULL);
3578 pool[k++] = elt->bufs[j];
3582 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3584 for (i = 0; (i != elemof(*elts)); ++i) {
3585 struct rxq_elt *elt = &(*elts)[i];
3586 struct rte_mbuf *buf = (void *)
3587 ((uintptr_t)elt->sge.addr -
3588 WR_ID(elt->wr.wr_id).offset);
3590 assert(WR_ID(elt->wr.wr_id).id == i);
3594 assert(k == mbuf_n);
3596 tmpl.elts.sp = NULL;
3597 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3599 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3600 rxq_alloc_elts(&tmpl, desc_n, pool));
3602 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3607 assert(tmpl.elts_n == desc_n);
3608 assert(tmpl.elts.sp != NULL);
3610 /* Clean up original data. */
3612 rte_free(rxq->elts.sp);
3613 rxq->elts.sp = NULL;
3615 err = ibv_post_recv(tmpl.qp,
3617 &(*tmpl.elts.sp)[0].wr :
3618 &(*tmpl.elts.no_sp)[0].wr),
3621 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3627 mod = (struct ibv_exp_qp_attr){
3628 .qp_state = IBV_QPS_RTR
3630 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3632 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3633 (void *)dev, strerror(err));
3641 * Configure a RX queue.
3644 * Pointer to Ethernet device structure.
3646 * Pointer to RX queue structure.
3648 * Number of descriptors to configure in queue.
3650 * NUMA socket on which memory must be allocated.
3652 * Thresholds parameters.
3654 * Memory pool for buffer allocations.
3657 * 0 on success, errno value on failure.
3660 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3661 unsigned int socket, const struct rte_eth_rxconf *conf,
3662 struct rte_mempool *mp)
3664 struct priv *priv = dev->data->dev_private;
3670 struct ibv_exp_qp_attr mod;
3672 struct ibv_exp_query_intf_params params;
3673 struct ibv_exp_cq_init_attr cq;
3674 struct ibv_exp_res_domain_init_attr rd;
3676 enum ibv_exp_query_intf_status status;
3677 struct ibv_recv_wr *bad_wr;
3678 struct rte_mbuf *buf;
3680 int parent = (rxq == &priv->rxq_parent);
3682 (void)conf; /* Thresholds configuration (ignored). */
3684 * If this is a parent queue, hardware must support RSS and
3685 * RSS must be enabled.
3687 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3689 /* Even if unused, ibv_create_cq() requires at least one
3694 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3695 ERROR("%p: invalid number of RX descriptors (must be a"
3696 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3699 /* Get mbuf length. */
3700 buf = rte_pktmbuf_alloc(mp);
3702 ERROR("%p: unable to allocate mbuf", (void *)dev);
3705 tmpl.mb_len = buf->buf_len;
3706 assert((rte_pktmbuf_headroom(buf) +
3707 rte_pktmbuf_tailroom(buf)) == tmpl.mb_len);
3708 assert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);
3709 rte_pktmbuf_free(buf);
3710 /* Toggle RX checksum offload if hardware supports it. */
3712 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3713 if (priv->hw_csum_l2tun)
3714 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3715 /* Enable scattered packets support for this queue if necessary. */
3716 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3717 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3718 (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {
3720 desc /= MLX4_PMD_SGE_WR_N;
3722 DEBUG("%p: %s scattered packets support (%u WRs)",
3723 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3724 /* Use the entire RX mempool as the memory region. */
3725 tmpl.mr = ibv_reg_mr(priv->pd,
3726 (void *)mp->elt_va_start,
3727 (mp->elt_va_end - mp->elt_va_start),
3728 (IBV_ACCESS_LOCAL_WRITE |
3729 IBV_ACCESS_REMOTE_WRITE));
3730 if (tmpl.mr == NULL) {
3732 ERROR("%p: MR creation failure: %s",
3733 (void *)dev, strerror(ret));
3737 attr.rd = (struct ibv_exp_res_domain_init_attr){
3738 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3739 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3740 .thread_model = IBV_EXP_THREAD_SINGLE,
3741 .msg_model = IBV_EXP_MSG_HIGH_BW,
3743 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3744 if (tmpl.rd == NULL) {
3746 ERROR("%p: RD creation failure: %s",
3747 (void *)dev, strerror(ret));
3750 attr.cq = (struct ibv_exp_cq_init_attr){
3751 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3752 .res_domain = tmpl.rd,
3754 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3755 if (tmpl.cq == NULL) {
3757 ERROR("%p: CQ creation failure: %s",
3758 (void *)dev, strerror(ret));
3761 DEBUG("priv->device_attr.max_qp_wr is %d",
3762 priv->device_attr.max_qp_wr);
3763 DEBUG("priv->device_attr.max_sge is %d",
3764 priv->device_attr.max_sge);
3767 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3770 #endif /* RSS_SUPPORT */
3771 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3772 if (tmpl.qp == NULL) {
3773 ret = (errno ? errno : EINVAL);
3774 ERROR("%p: QP creation failure: %s",
3775 (void *)dev, strerror(ret));
3778 mod = (struct ibv_exp_qp_attr){
3779 /* Move the QP to this state. */
3780 .qp_state = IBV_QPS_INIT,
3781 /* Primary port number. */
3782 .port_num = priv->port
3784 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3787 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3788 #endif /* RSS_SUPPORT */
3791 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3792 (void *)dev, strerror(ret));
3795 if ((parent) || (!priv->rss)) {
3796 /* Configure MAC and broadcast addresses. */
3797 ret = rxq_mac_addrs_add(&tmpl);
3799 ERROR("%p: QP flow attachment failed: %s",
3800 (void *)dev, strerror(ret));
3804 /* Allocate descriptors for RX queues, except for the RSS parent. */
3808 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3810 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3812 ERROR("%p: RXQ allocation failed: %s",
3813 (void *)dev, strerror(ret));
3816 ret = ibv_post_recv(tmpl.qp,
3818 &(*tmpl.elts.sp)[0].wr :
3819 &(*tmpl.elts.no_sp)[0].wr),
3822 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3829 mod = (struct ibv_exp_qp_attr){
3830 .qp_state = IBV_QPS_RTR
3832 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3834 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3835 (void *)dev, strerror(ret));
3839 tmpl.port_id = dev->data->port_id;
3840 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3841 attr.params = (struct ibv_exp_query_intf_params){
3842 .intf_scope = IBV_EXP_INTF_GLOBAL,
3843 .intf = IBV_EXP_INTF_CQ,
3846 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3847 if (tmpl.if_cq == NULL) {
3848 ERROR("%p: CQ interface family query failed with status %d",
3849 (void *)dev, status);
3852 attr.params = (struct ibv_exp_query_intf_params){
3853 .intf_scope = IBV_EXP_INTF_GLOBAL,
3854 .intf = IBV_EXP_INTF_QP_BURST,
3857 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3858 if (tmpl.if_qp == NULL) {
3859 ERROR("%p: QP interface family query failed with status %d",
3860 (void *)dev, status);
3863 /* Clean up rxq in case we're reinitializing it. */
3864 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3867 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3877 * DPDK callback to configure a RX queue.
3880 * Pointer to Ethernet device structure.
3884 * Number of descriptors to configure in queue.
3886 * NUMA socket on which memory must be allocated.
3888 * Thresholds parameters.
3890 * Memory pool for buffer allocations.
3893 * 0 on success, negative errno value on failure.
3896 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3897 unsigned int socket, const struct rte_eth_rxconf *conf,
3898 struct rte_mempool *mp)
3900 struct priv *priv = dev->data->dev_private;
3901 struct rxq *rxq = (*priv->rxqs)[idx];
3904 if (mlx4_is_secondary())
3905 return -E_RTE_SECONDARY;
3907 DEBUG("%p: configuring queue %u for %u descriptors",
3908 (void *)dev, idx, desc);
3909 if (idx >= priv->rxqs_n) {
3910 ERROR("%p: queue index out of range (%u >= %u)",
3911 (void *)dev, idx, priv->rxqs_n);
3916 DEBUG("%p: reusing already allocated queue index %u (%p)",
3917 (void *)dev, idx, (void *)rxq);
3918 if (priv->started) {
3922 (*priv->rxqs)[idx] = NULL;
3925 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3927 ERROR("%p: unable to allocate queue index %u",
3933 ret = rxq_setup(dev, rxq, desc, socket, conf, mp);
3937 rxq->stats.idx = idx;
3938 DEBUG("%p: adding RX queue %p to list",
3939 (void *)dev, (void *)rxq);
3940 (*priv->rxqs)[idx] = rxq;
3941 /* Update receive callback. */
3943 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3945 dev->rx_pkt_burst = mlx4_rx_burst;
3952 * DPDK callback to release a RX queue.
3955 * Generic RX queue pointer.
3958 mlx4_rx_queue_release(void *dpdk_rxq)
3960 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3964 if (mlx4_is_secondary())
3970 assert(rxq != &priv->rxq_parent);
3971 for (i = 0; (i != priv->rxqs_n); ++i)
3972 if ((*priv->rxqs)[i] == rxq) {
3973 DEBUG("%p: removing RX queue %p from list",
3974 (void *)priv->dev, (void *)rxq);
3975 (*priv->rxqs)[i] = NULL;
3984 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3987 * DPDK callback to start the device.
3989 * Simulate device start by attaching all configured flows.
3992 * Pointer to Ethernet device structure.
3995 * 0 on success, negative errno value on failure.
3998 mlx4_dev_start(struct rte_eth_dev *dev)
4000 struct priv *priv = dev->data->dev_private;
4005 if (mlx4_is_secondary())
4006 return -E_RTE_SECONDARY;
4008 if (priv->started) {
4012 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
4015 rxq = &priv->rxq_parent;
4018 rxq = (*priv->rxqs)[0];
4021 /* Iterate only once when RSS is enabled. */
4025 /* Ignore nonexistent RX queues. */
4028 ret = rxq_mac_addrs_add(rxq);
4029 if (!ret && priv->promisc)
4030 ret = rxq_promiscuous_enable(rxq);
4031 if (!ret && priv->allmulti)
4032 ret = rxq_allmulticast_enable(rxq);
4035 WARN("%p: QP flow attachment failed: %s",
4036 (void *)dev, strerror(ret));
4039 rxq = (*priv->rxqs)[--i];
4041 rxq_allmulticast_disable(rxq);
4042 rxq_promiscuous_disable(rxq);
4043 rxq_mac_addrs_del(rxq);
4049 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4050 priv_dev_interrupt_handler_install(priv, dev);
4056 * DPDK callback to stop the device.
4058 * Simulate device stop by detaching all configured flows.
4061 * Pointer to Ethernet device structure.
4064 mlx4_dev_stop(struct rte_eth_dev *dev)
4066 struct priv *priv = dev->data->dev_private;
4071 if (mlx4_is_secondary())
4074 if (!priv->started) {
4078 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4081 rxq = &priv->rxq_parent;
4084 rxq = (*priv->rxqs)[0];
4087 /* Iterate only once when RSS is enabled. */
4089 /* Ignore nonexistent RX queues. */
4092 rxq_allmulticast_disable(rxq);
4093 rxq_promiscuous_disable(rxq);
4094 rxq_mac_addrs_del(rxq);
4095 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4100 * Dummy DPDK callback for TX.
4102 * This function is used to temporarily replace the real callback during
4103 * unsafe control operations on the queue, or in case of error.
4106 * Generic pointer to TX queue structure.
4108 * Packets to transmit.
4110 * Number of packets in array.
4113 * Number of packets successfully transmitted (<= pkts_n).
4116 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4125 * Dummy DPDK callback for RX.
4127 * This function is used to temporarily replace the real callback during
4128 * unsafe control operations on the queue, or in case of error.
4131 * Generic pointer to RX queue structure.
4133 * Array to store received packets.
4135 * Maximum number of packets in array.
4138 * Number of packets successfully received (<= pkts_n).
4141 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4150 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4153 * DPDK callback to close the device.
4155 * Destroy all queues and objects, free memory.
4158 * Pointer to Ethernet device structure.
4161 mlx4_dev_close(struct rte_eth_dev *dev)
4163 struct priv *priv = mlx4_get_priv(dev);
4170 DEBUG("%p: closing device \"%s\"",
4172 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4173 /* Prevent crashes when queues are still in use. This is unfortunately
4174 * still required for DPDK 1.3 because some programs (such as testpmd)
4175 * never release them before closing the device. */
4176 dev->rx_pkt_burst = removed_rx_burst;
4177 dev->tx_pkt_burst = removed_tx_burst;
4178 if (priv->rxqs != NULL) {
4179 /* XXX race condition if mlx4_rx_burst() is still running. */
4181 for (i = 0; (i != priv->rxqs_n); ++i) {
4182 tmp = (*priv->rxqs)[i];
4185 (*priv->rxqs)[i] = NULL;
4192 if (priv->txqs != NULL) {
4193 /* XXX race condition if mlx4_tx_burst() is still running. */
4195 for (i = 0; (i != priv->txqs_n); ++i) {
4196 tmp = (*priv->txqs)[i];
4199 (*priv->txqs)[i] = NULL;
4207 rxq_cleanup(&priv->rxq_parent);
4208 if (priv->pd != NULL) {
4209 assert(priv->ctx != NULL);
4210 claim_zero(ibv_dealloc_pd(priv->pd));
4211 claim_zero(ibv_close_device(priv->ctx));
4213 assert(priv->ctx == NULL);
4214 priv_dev_interrupt_handler_uninstall(priv, dev);
4216 memset(priv, 0, sizeof(*priv));
4220 * DPDK callback to get information about the device.
4223 * Pointer to Ethernet device structure.
4225 * Info structure output buffer.
4228 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4230 struct priv *priv = mlx4_get_priv(dev);
4232 char ifname[IF_NAMESIZE];
4237 /* FIXME: we should ask the device for these values. */
4238 info->min_rx_bufsize = 32;
4239 info->max_rx_pktlen = 65536;
4241 * Since we need one CQ per QP, the limit is the minimum number
4242 * between the two values.
4244 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4245 priv->device_attr.max_qp : priv->device_attr.max_cq);
4246 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4249 info->max_rx_queues = max;
4250 info->max_tx_queues = max;
4251 /* Last array entry is reserved for broadcast. */
4252 info->max_mac_addrs = (elemof(priv->mac) - 1);
4253 info->rx_offload_capa =
4255 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4256 DEV_RX_OFFLOAD_UDP_CKSUM |
4257 DEV_RX_OFFLOAD_TCP_CKSUM) :
4259 info->tx_offload_capa =
4261 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4262 DEV_TX_OFFLOAD_UDP_CKSUM |
4263 DEV_TX_OFFLOAD_TCP_CKSUM) :
4265 if (priv_get_ifname(priv, &ifname) == 0)
4266 info->if_index = if_nametoindex(ifname);
4271 * DPDK callback to get device statistics.
4274 * Pointer to Ethernet device structure.
4276 * Stats structure output buffer.
4279 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4281 struct priv *priv = mlx4_get_priv(dev);
4282 struct rte_eth_stats tmp = {0};
4289 /* Add software counters. */
4290 for (i = 0; (i != priv->rxqs_n); ++i) {
4291 struct rxq *rxq = (*priv->rxqs)[i];
4295 idx = rxq->stats.idx;
4296 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4297 #ifdef MLX4_PMD_SOFT_COUNTERS
4298 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4299 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4301 tmp.q_errors[idx] += (rxq->stats.idropped +
4302 rxq->stats.rx_nombuf);
4304 #ifdef MLX4_PMD_SOFT_COUNTERS
4305 tmp.ipackets += rxq->stats.ipackets;
4306 tmp.ibytes += rxq->stats.ibytes;
4308 tmp.ierrors += rxq->stats.idropped;
4309 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4311 for (i = 0; (i != priv->txqs_n); ++i) {
4312 struct txq *txq = (*priv->txqs)[i];
4316 idx = txq->stats.idx;
4317 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4318 #ifdef MLX4_PMD_SOFT_COUNTERS
4319 tmp.q_opackets[idx] += txq->stats.opackets;
4320 tmp.q_obytes[idx] += txq->stats.obytes;
4322 tmp.q_errors[idx] += txq->stats.odropped;
4324 #ifdef MLX4_PMD_SOFT_COUNTERS
4325 tmp.opackets += txq->stats.opackets;
4326 tmp.obytes += txq->stats.obytes;
4328 tmp.oerrors += txq->stats.odropped;
4330 #ifndef MLX4_PMD_SOFT_COUNTERS
4331 /* FIXME: retrieve and add hardware counters. */
4338 * DPDK callback to clear device statistics.
4341 * Pointer to Ethernet device structure.
4344 mlx4_stats_reset(struct rte_eth_dev *dev)
4346 struct priv *priv = mlx4_get_priv(dev);
4353 for (i = 0; (i != priv->rxqs_n); ++i) {
4354 if ((*priv->rxqs)[i] == NULL)
4356 idx = (*priv->rxqs)[i]->stats.idx;
4357 (*priv->rxqs)[i]->stats =
4358 (struct mlx4_rxq_stats){ .idx = idx };
4360 for (i = 0; (i != priv->txqs_n); ++i) {
4361 if ((*priv->txqs)[i] == NULL)
4363 idx = (*priv->txqs)[i]->stats.idx;
4364 (*priv->txqs)[i]->stats =
4365 (struct mlx4_txq_stats){ .idx = idx };
4367 #ifndef MLX4_PMD_SOFT_COUNTERS
4368 /* FIXME: reset hardware counters. */
4374 * DPDK callback to remove a MAC address.
4377 * Pointer to Ethernet device structure.
4379 * MAC address index.
4382 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4384 struct priv *priv = dev->data->dev_private;
4386 if (mlx4_is_secondary())
4389 DEBUG("%p: removing MAC address from index %" PRIu32,
4390 (void *)dev, index);
4391 /* Last array entry is reserved for broadcast. */
4392 if (index >= (elemof(priv->mac) - 1))
4394 priv_mac_addr_del(priv, index);
4400 * DPDK callback to add a MAC address.
4403 * Pointer to Ethernet device structure.
4405 * MAC address to register.
4407 * MAC address index.
4409 * VMDq pool index to associate address with (ignored).
4412 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4413 uint32_t index, uint32_t vmdq)
4415 struct priv *priv = dev->data->dev_private;
4417 if (mlx4_is_secondary())
4421 DEBUG("%p: adding MAC address at index %" PRIu32,
4422 (void *)dev, index);
4423 /* Last array entry is reserved for broadcast. */
4424 if (index >= (elemof(priv->mac) - 1))
4426 priv_mac_addr_add(priv, index,
4427 (const uint8_t (*)[ETHER_ADDR_LEN])
4428 mac_addr->addr_bytes);
4434 * DPDK callback to enable promiscuous mode.
4437 * Pointer to Ethernet device structure.
4440 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4442 struct priv *priv = dev->data->dev_private;
4446 if (mlx4_is_secondary())
4449 if (priv->promisc) {
4453 /* If device isn't started, this is all we need to do. */
4457 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4464 for (i = 0; (i != priv->rxqs_n); ++i) {
4465 if ((*priv->rxqs)[i] == NULL)
4467 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4470 /* Failure, rollback. */
4472 if ((*priv->rxqs)[--i] != NULL)
4473 rxq_promiscuous_disable((*priv->rxqs)[i]);
4483 * DPDK callback to disable promiscuous mode.
4486 * Pointer to Ethernet device structure.
4489 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4491 struct priv *priv = dev->data->dev_private;
4494 if (mlx4_is_secondary())
4497 if (!priv->promisc) {
4502 rxq_promiscuous_disable(&priv->rxq_parent);
4505 for (i = 0; (i != priv->rxqs_n); ++i)
4506 if ((*priv->rxqs)[i] != NULL)
4507 rxq_promiscuous_disable((*priv->rxqs)[i]);
4514 * DPDK callback to enable allmulti mode.
4517 * Pointer to Ethernet device structure.
4520 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4522 struct priv *priv = dev->data->dev_private;
4526 if (mlx4_is_secondary())
4529 if (priv->allmulti) {
4533 /* If device isn't started, this is all we need to do. */
4537 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4544 for (i = 0; (i != priv->rxqs_n); ++i) {
4545 if ((*priv->rxqs)[i] == NULL)
4547 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4550 /* Failure, rollback. */
4552 if ((*priv->rxqs)[--i] != NULL)
4553 rxq_allmulticast_disable((*priv->rxqs)[i]);
4563 * DPDK callback to disable allmulti mode.
4566 * Pointer to Ethernet device structure.
4569 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4571 struct priv *priv = dev->data->dev_private;
4574 if (mlx4_is_secondary())
4577 if (!priv->allmulti) {
4582 rxq_allmulticast_disable(&priv->rxq_parent);
4585 for (i = 0; (i != priv->rxqs_n); ++i)
4586 if ((*priv->rxqs)[i] != NULL)
4587 rxq_allmulticast_disable((*priv->rxqs)[i]);
4594 * DPDK callback to retrieve physical link information (unlocked version).
4597 * Pointer to Ethernet device structure.
4598 * @param wait_to_complete
4599 * Wait for request completion (ignored).
4602 mlx4_link_update_unlocked(struct rte_eth_dev *dev, int wait_to_complete)
4604 struct priv *priv = mlx4_get_priv(dev);
4605 struct ethtool_cmd edata = {
4609 struct rte_eth_link dev_link;
4614 (void)wait_to_complete;
4615 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4616 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4619 memset(&dev_link, 0, sizeof(dev_link));
4620 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4621 (ifr.ifr_flags & IFF_RUNNING));
4622 ifr.ifr_data = &edata;
4623 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4624 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4628 link_speed = ethtool_cmd_speed(&edata);
4629 if (link_speed == -1)
4630 dev_link.link_speed = 0;
4632 dev_link.link_speed = link_speed;
4633 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4634 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4635 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4636 /* Link status changed. */
4637 dev->data->dev_link = dev_link;
4640 /* Link status is still the same. */
4645 * DPDK callback to retrieve physical link information.
4648 * Pointer to Ethernet device structure.
4649 * @param wait_to_complete
4650 * Wait for request completion (ignored).
4653 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4655 struct priv *priv = mlx4_get_priv(dev);
4661 ret = mlx4_link_update_unlocked(dev, wait_to_complete);
4667 * DPDK callback to change the MTU.
4669 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4670 * received). Use this as a hint to enable/disable scattered packets support
4671 * and improve performance when not needed.
4672 * Since failure is not an option, reconfiguring queues on the fly is not
4676 * Pointer to Ethernet device structure.
4681 * 0 on success, negative errno value on failure.
4684 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4686 struct priv *priv = dev->data->dev_private;
4689 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4692 if (mlx4_is_secondary())
4693 return -E_RTE_SECONDARY;
4695 /* Set kernel interface MTU first. */
4696 if (priv_set_mtu(priv, mtu)) {
4698 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4702 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4704 /* Temporarily replace RX handler with a fake one, assuming it has not
4705 * been copied elsewhere. */
4706 dev->rx_pkt_burst = removed_rx_burst;
4707 /* Make sure everyone has left mlx4_rx_burst() and uses
4708 * removed_rx_burst() instead. */
4711 /* Reconfigure each RX queue. */
4712 for (i = 0; (i != priv->rxqs_n); ++i) {
4713 struct rxq *rxq = (*priv->rxqs)[i];
4714 unsigned int max_frame_len;
4719 /* Calculate new maximum frame length according to MTU and
4720 * toggle scattered support (sp) if necessary. */
4721 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4722 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4723 sp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));
4724 /* Provide new values to rxq_setup(). */
4725 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4726 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4727 ret = rxq_rehash(dev, rxq);
4729 /* Force SP RX if that queue requires it and abort. */
4731 rx_func = mlx4_rx_burst_sp;
4734 /* Reenable non-RSS queue attributes. No need to check
4735 * for errors at this stage. */
4737 rxq_mac_addrs_add(rxq);
4739 rxq_promiscuous_enable(rxq);
4741 rxq_allmulticast_enable(rxq);
4743 /* Scattered burst function takes priority. */
4745 rx_func = mlx4_rx_burst_sp;
4747 /* Burst functions can now be called again. */
4749 dev->rx_pkt_burst = rx_func;
4757 * DPDK callback to get flow control status.
4760 * Pointer to Ethernet device structure.
4761 * @param[out] fc_conf
4762 * Flow control output buffer.
4765 * 0 on success, negative errno value on failure.
4768 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4770 struct priv *priv = dev->data->dev_private;
4772 struct ethtool_pauseparam ethpause = {
4773 .cmd = ETHTOOL_GPAUSEPARAM
4777 if (mlx4_is_secondary())
4778 return -E_RTE_SECONDARY;
4779 ifr.ifr_data = ðpause;
4781 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4783 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4789 fc_conf->autoneg = ethpause.autoneg;
4790 if (ethpause.rx_pause && ethpause.tx_pause)
4791 fc_conf->mode = RTE_FC_FULL;
4792 else if (ethpause.rx_pause)
4793 fc_conf->mode = RTE_FC_RX_PAUSE;
4794 else if (ethpause.tx_pause)
4795 fc_conf->mode = RTE_FC_TX_PAUSE;
4797 fc_conf->mode = RTE_FC_NONE;
4807 * DPDK callback to modify flow control parameters.
4810 * Pointer to Ethernet device structure.
4811 * @param[in] fc_conf
4812 * Flow control parameters.
4815 * 0 on success, negative errno value on failure.
4818 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4820 struct priv *priv = dev->data->dev_private;
4822 struct ethtool_pauseparam ethpause = {
4823 .cmd = ETHTOOL_SPAUSEPARAM
4827 if (mlx4_is_secondary())
4828 return -E_RTE_SECONDARY;
4829 ifr.ifr_data = ðpause;
4830 ethpause.autoneg = fc_conf->autoneg;
4831 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4832 (fc_conf->mode & RTE_FC_RX_PAUSE))
4833 ethpause.rx_pause = 1;
4835 ethpause.rx_pause = 0;
4837 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4838 (fc_conf->mode & RTE_FC_TX_PAUSE))
4839 ethpause.tx_pause = 1;
4841 ethpause.tx_pause = 0;
4844 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4846 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4860 * Configure a VLAN filter.
4863 * Pointer to Ethernet device structure.
4865 * VLAN ID to filter.
4870 * 0 on success, errno value on failure.
4873 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4875 struct priv *priv = dev->data->dev_private;
4877 unsigned int j = -1;
4879 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4880 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4881 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4882 if (!priv->vlan_filter[i].enabled) {
4883 /* Unused index, remember it. */
4887 if (priv->vlan_filter[i].id != vlan_id)
4889 /* This VLAN ID is already known, use its index. */
4893 /* Check if there's room for another VLAN filter. */
4894 if (j == (unsigned int)-1)
4897 * VLAN filters apply to all configured MAC addresses, flow
4898 * specifications must be reconfigured accordingly.
4900 priv->vlan_filter[j].id = vlan_id;
4901 if ((on) && (!priv->vlan_filter[j].enabled)) {
4903 * Filter is disabled, enable it.
4904 * Rehashing flows in all RX queues is necessary.
4907 rxq_mac_addrs_del(&priv->rxq_parent);
4909 for (i = 0; (i != priv->rxqs_n); ++i)
4910 if ((*priv->rxqs)[i] != NULL)
4911 rxq_mac_addrs_del((*priv->rxqs)[i]);
4912 priv->vlan_filter[j].enabled = 1;
4913 if (priv->started) {
4915 rxq_mac_addrs_add(&priv->rxq_parent);
4917 for (i = 0; (i != priv->rxqs_n); ++i) {
4918 if ((*priv->rxqs)[i] == NULL)
4920 rxq_mac_addrs_add((*priv->rxqs)[i]);
4923 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4925 * Filter is enabled, disable it.
4926 * Rehashing flows in all RX queues is necessary.
4929 rxq_mac_addrs_del(&priv->rxq_parent);
4931 for (i = 0; (i != priv->rxqs_n); ++i)
4932 if ((*priv->rxqs)[i] != NULL)
4933 rxq_mac_addrs_del((*priv->rxqs)[i]);
4934 priv->vlan_filter[j].enabled = 0;
4935 if (priv->started) {
4937 rxq_mac_addrs_add(&priv->rxq_parent);
4939 for (i = 0; (i != priv->rxqs_n); ++i) {
4940 if ((*priv->rxqs)[i] == NULL)
4942 rxq_mac_addrs_add((*priv->rxqs)[i]);
4950 * DPDK callback to configure a VLAN filter.
4953 * Pointer to Ethernet device structure.
4955 * VLAN ID to filter.
4960 * 0 on success, negative errno value on failure.
4963 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4965 struct priv *priv = dev->data->dev_private;
4968 if (mlx4_is_secondary())
4969 return -E_RTE_SECONDARY;
4971 ret = vlan_filter_set(dev, vlan_id, on);
4977 static const struct eth_dev_ops mlx4_dev_ops = {
4978 .dev_configure = mlx4_dev_configure,
4979 .dev_start = mlx4_dev_start,
4980 .dev_stop = mlx4_dev_stop,
4981 .dev_close = mlx4_dev_close,
4982 .promiscuous_enable = mlx4_promiscuous_enable,
4983 .promiscuous_disable = mlx4_promiscuous_disable,
4984 .allmulticast_enable = mlx4_allmulticast_enable,
4985 .allmulticast_disable = mlx4_allmulticast_disable,
4986 .link_update = mlx4_link_update,
4987 .stats_get = mlx4_stats_get,
4988 .stats_reset = mlx4_stats_reset,
4989 .queue_stats_mapping_set = NULL,
4990 .dev_infos_get = mlx4_dev_infos_get,
4991 .vlan_filter_set = mlx4_vlan_filter_set,
4992 .vlan_tpid_set = NULL,
4993 .vlan_strip_queue_set = NULL,
4994 .vlan_offload_set = NULL,
4995 .rx_queue_setup = mlx4_rx_queue_setup,
4996 .tx_queue_setup = mlx4_tx_queue_setup,
4997 .rx_queue_release = mlx4_rx_queue_release,
4998 .tx_queue_release = mlx4_tx_queue_release,
5000 .dev_led_off = NULL,
5001 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5002 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5003 .priority_flow_ctrl_set = NULL,
5004 .mac_addr_remove = mlx4_mac_addr_remove,
5005 .mac_addr_add = mlx4_mac_addr_add,
5006 .mtu_set = mlx4_dev_set_mtu,
5010 * Get PCI information from struct ibv_device.
5013 * Pointer to Ethernet device structure.
5014 * @param[out] pci_addr
5015 * PCI bus address output buffer.
5018 * 0 on success, -1 on failure and errno is set.
5021 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5022 struct rte_pci_addr *pci_addr)
5026 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5028 file = fopen(path, "rb");
5031 while (fgets(line, sizeof(line), file) == line) {
5032 size_t len = strlen(line);
5035 /* Truncate long lines. */
5036 if (len == (sizeof(line) - 1))
5037 while (line[(len - 1)] != '\n') {
5041 line[(len - 1)] = ret;
5043 /* Extract information. */
5046 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5050 &pci_addr->function) == 4) {
5060 * Get MAC address by querying netdevice.
5063 * struct priv for the requested device.
5065 * MAC address output buffer.
5068 * 0 on success, -1 on failure and errno is set.
5071 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5073 struct ifreq request;
5075 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5077 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5081 /* Support up to 32 adapters. */
5083 struct rte_pci_addr pci_addr; /* associated PCI address */
5084 uint32_t ports; /* physical ports bitfield. */
5088 * Get device index in mlx4_dev[] from PCI bus address.
5090 * @param[in] pci_addr
5091 * PCI bus address to look for.
5094 * mlx4_dev[] index on success, -1 on failure.
5097 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5102 assert(pci_addr != NULL);
5103 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5104 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5105 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5106 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5107 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5109 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5116 * Retrieve integer value from environment variable.
5119 * Environment variable name.
5122 * Integer value, 0 if the variable is not set.
5125 mlx4_getenv_int(const char *name)
5127 const char *val = getenv(name);
5135 mlx4_dev_link_status_handler(void *);
5137 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5140 * Link status handler.
5143 * Pointer to private structure.
5145 * Pointer to the rte_eth_dev structure.
5148 * Nonzero if the callback process can be called immediately.
5151 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5153 struct ibv_async_event event;
5154 int port_change = 0;
5157 /* Read all message and acknowledge them. */
5159 if (ibv_get_async_event(priv->ctx, &event))
5162 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5163 event.event_type == IBV_EVENT_PORT_ERR)
5166 DEBUG("event type %d on port %d not handled",
5167 event.event_type, event.element.port_num);
5168 ibv_ack_async_event(&event);
5171 if (port_change ^ priv->pending_alarm) {
5172 struct rte_eth_link *link = &dev->data->dev_link;
5174 priv->pending_alarm = 0;
5175 mlx4_link_update_unlocked(dev, 0);
5176 if (((link->link_speed == 0) && link->link_status) ||
5177 ((link->link_speed != 0) && !link->link_status)) {
5178 /* Inconsistent status, check again later. */
5179 priv->pending_alarm = 1;
5180 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5181 mlx4_dev_link_status_handler,
5190 * Handle delayed link status event.
5193 * Registered argument.
5196 mlx4_dev_link_status_handler(void *arg)
5198 struct rte_eth_dev *dev = arg;
5199 struct priv *priv = dev->data->dev_private;
5203 assert(priv->pending_alarm == 1);
5204 ret = priv_dev_link_status_handler(priv, dev);
5207 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5211 * Handle interrupts from the NIC.
5213 * @param[in] intr_handle
5214 * Interrupt handler.
5216 * Callback argument.
5219 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5221 struct rte_eth_dev *dev = cb_arg;
5222 struct priv *priv = dev->data->dev_private;
5227 ret = priv_dev_link_status_handler(priv, dev);
5230 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC);
5234 * Uninstall interrupt handler.
5237 * Pointer to private structure.
5239 * Pointer to the rte_eth_dev structure.
5242 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5244 if (!dev->data->dev_conf.intr_conf.lsc)
5246 rte_intr_callback_unregister(&priv->intr_handle,
5247 mlx4_dev_interrupt_handler,
5249 if (priv->pending_alarm)
5250 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5251 priv->pending_alarm = 0;
5252 priv->intr_handle.fd = 0;
5253 priv->intr_handle.type = 0;
5257 * Install interrupt handler.
5260 * Pointer to private structure.
5262 * Pointer to the rte_eth_dev structure.
5265 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5269 if (!dev->data->dev_conf.intr_conf.lsc)
5271 assert(priv->ctx->async_fd > 0);
5272 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5273 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5275 INFO("failed to change file descriptor async event queue");
5276 dev->data->dev_conf.intr_conf.lsc = 0;
5278 priv->intr_handle.fd = priv->ctx->async_fd;
5279 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5280 rte_intr_callback_register(&priv->intr_handle,
5281 mlx4_dev_interrupt_handler,
5286 static struct eth_driver mlx4_driver;
5289 * DPDK callback to register a PCI device.
5291 * This function creates an Ethernet device for each port of a given
5294 * @param[in] pci_drv
5295 * PCI driver structure (mlx4_driver).
5296 * @param[in] pci_dev
5297 * PCI device information.
5300 * 0 on success, negative errno value on failure.
5303 mlx4_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5305 struct ibv_device **list;
5306 struct ibv_device *ibv_dev;
5308 struct ibv_context *attr_ctx = NULL;
5309 struct ibv_device_attr device_attr;
5315 assert(pci_drv == &mlx4_driver.pci_drv);
5316 /* Get mlx4_dev[] index. */
5317 idx = mlx4_dev_idx(&pci_dev->addr);
5319 ERROR("this driver cannot support any more adapters");
5322 DEBUG("using driver device index %d", idx);
5324 /* Save PCI address. */
5325 mlx4_dev[idx].pci_addr = pci_dev->addr;
5326 list = ibv_get_device_list(&i);
5329 if (errno == ENOSYS) {
5330 WARN("cannot list devices, is ib_uverbs loaded?");
5337 * For each listed device, check related sysfs entry against
5338 * the provided PCI ID.
5341 struct rte_pci_addr pci_addr;
5344 DEBUG("checking device \"%s\"", list[i]->name);
5345 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5347 if ((pci_dev->addr.domain != pci_addr.domain) ||
5348 (pci_dev->addr.bus != pci_addr.bus) ||
5349 (pci_dev->addr.devid != pci_addr.devid) ||
5350 (pci_dev->addr.function != pci_addr.function))
5352 vf = (pci_dev->id.device_id ==
5353 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5354 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5355 list[i]->name, (vf ? "true" : "false"));
5356 attr_ctx = ibv_open_device(list[i]);
5360 if (attr_ctx == NULL) {
5361 ibv_free_device_list(list);
5364 WARN("cannot access device, is mlx4_ib loaded?");
5367 WARN("cannot use device, are drivers up to date?");
5375 DEBUG("device opened");
5376 if (ibv_query_device(attr_ctx, &device_attr))
5378 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5380 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5381 uint32_t port = i + 1; /* ports are indexed from one */
5382 uint32_t test = (1 << i);
5383 struct ibv_context *ctx = NULL;
5384 struct ibv_port_attr port_attr;
5385 struct ibv_pd *pd = NULL;
5386 struct priv *priv = NULL;
5387 struct rte_eth_dev *eth_dev = NULL;
5388 #ifdef HAVE_EXP_QUERY_DEVICE
5389 struct ibv_exp_device_attr exp_device_attr;
5390 #endif /* HAVE_EXP_QUERY_DEVICE */
5391 struct ether_addr mac;
5393 #ifdef HAVE_EXP_QUERY_DEVICE
5394 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5396 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5397 #endif /* RSS_SUPPORT */
5398 #endif /* HAVE_EXP_QUERY_DEVICE */
5400 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5402 ctx = ibv_open_device(ibv_dev);
5406 /* Check port status. */
5407 err = ibv_query_port(ctx, port, &port_attr);
5409 ERROR("port query failed: %s", strerror(err));
5412 if (port_attr.state != IBV_PORT_ACTIVE)
5413 DEBUG("port %d is not active: \"%s\" (%d)",
5414 port, ibv_port_state_str(port_attr.state),
5417 /* Allocate protection domain. */
5418 pd = ibv_alloc_pd(ctx);
5420 ERROR("PD allocation failure");
5425 mlx4_dev[idx].ports |= test;
5427 /* from rte_ethdev.c */
5428 priv = rte_zmalloc("ethdev private structure",
5430 RTE_CACHE_LINE_SIZE);
5432 ERROR("priv allocation failure");
5438 priv->device_attr = device_attr;
5441 priv->mtu = ETHER_MTU;
5442 #ifdef HAVE_EXP_QUERY_DEVICE
5443 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5444 ERROR("ibv_exp_query_device() failed");
5448 if ((exp_device_attr.exp_device_cap_flags &
5449 IBV_EXP_DEVICE_QPG) &&
5450 (exp_device_attr.exp_device_cap_flags &
5451 IBV_EXP_DEVICE_UD_RSS) &&
5452 (exp_device_attr.comp_mask &
5453 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5454 (exp_device_attr.max_rss_tbl_sz > 0)) {
5457 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5461 priv->max_rss_tbl_sz = 0;
5463 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5464 IBV_EXP_DEVICE_UD_TSS);
5465 DEBUG("device flags: %s%s%s",
5466 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5467 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5468 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5470 DEBUG("maximum RSS indirection table size: %u",
5471 exp_device_attr.max_rss_tbl_sz);
5472 #endif /* RSS_SUPPORT */
5475 ((exp_device_attr.exp_device_cap_flags &
5476 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5477 (exp_device_attr.exp_device_cap_flags &
5478 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5479 DEBUG("checksum offloading is %ssupported",
5480 (priv->hw_csum ? "" : "not "));
5482 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5483 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5484 DEBUG("L2 tunnel checksum offloads are %ssupported",
5485 (priv->hw_csum_l2tun ? "" : "not "));
5488 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5490 if (priv->inl_recv_size) {
5491 exp_device_attr.comp_mask =
5492 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5493 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5494 INFO("Couldn't query device for inline-receive"
5496 priv->inl_recv_size = 0;
5498 if ((unsigned)exp_device_attr.inline_recv_sz <
5499 priv->inl_recv_size) {
5500 INFO("Max inline-receive (%d) <"
5501 " requested inline-receive (%u)",
5502 exp_device_attr.inline_recv_sz,
5503 priv->inl_recv_size);
5504 priv->inl_recv_size =
5505 exp_device_attr.inline_recv_sz;
5508 INFO("Set inline receive size to %u",
5509 priv->inl_recv_size);
5511 #endif /* INLINE_RECV */
5512 #endif /* HAVE_EXP_QUERY_DEVICE */
5514 (void)mlx4_getenv_int;
5516 /* Configure the first MAC address by default. */
5517 if (priv_get_mac(priv, &mac.addr_bytes)) {
5518 ERROR("cannot get MAC address, is mlx4_en loaded?"
5519 " (errno: %s)", strerror(errno));
5522 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5524 mac.addr_bytes[0], mac.addr_bytes[1],
5525 mac.addr_bytes[2], mac.addr_bytes[3],
5526 mac.addr_bytes[4], mac.addr_bytes[5]);
5527 /* Register MAC and broadcast addresses. */
5528 claim_zero(priv_mac_addr_add(priv, 0,
5529 (const uint8_t (*)[ETHER_ADDR_LEN])
5531 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5532 &(const uint8_t [ETHER_ADDR_LEN])
5533 { "\xff\xff\xff\xff\xff\xff" }));
5536 char ifname[IF_NAMESIZE];
5538 if (priv_get_ifname(priv, &ifname) == 0)
5539 DEBUG("port %u ifname is \"%s\"",
5540 priv->port, ifname);
5542 DEBUG("port %u ifname is unknown", priv->port);
5545 /* Get actual MTU if possible. */
5546 priv_get_mtu(priv, &priv->mtu);
5547 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5549 /* from rte_ethdev.c */
5551 char name[RTE_ETH_NAME_MAX_LEN];
5553 snprintf(name, sizeof(name), "%s port %u",
5554 ibv_get_device_name(ibv_dev), port);
5555 eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI);
5557 if (eth_dev == NULL) {
5558 ERROR("can not allocate rte ethdev");
5563 /* Secondary processes have to use local storage for their
5564 * private data as well as a copy of eth_dev->data, but this
5565 * pointer must not be modified before burst functions are
5566 * actually called. */
5567 if (mlx4_is_secondary()) {
5568 struct mlx4_secondary_data *sd =
5569 &mlx4_secondary_data[eth_dev->data->port_id];
5571 sd->primary_priv = eth_dev->data->dev_private;
5572 if (sd->primary_priv == NULL) {
5573 ERROR("no private data for port %u",
5574 eth_dev->data->port_id);
5578 sd->shared_dev_data = eth_dev->data;
5579 rte_spinlock_init(&sd->lock);
5580 memcpy(sd->data.name, sd->shared_dev_data->name,
5581 sizeof(sd->data.name));
5582 sd->data.dev_private = priv;
5583 sd->data.rx_mbuf_alloc_failed = 0;
5584 sd->data.mtu = ETHER_MTU;
5585 sd->data.port_id = sd->shared_dev_data->port_id;
5586 sd->data.mac_addrs = priv->mac;
5587 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5588 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5590 eth_dev->data->dev_private = priv;
5591 eth_dev->data->rx_mbuf_alloc_failed = 0;
5592 eth_dev->data->mtu = ETHER_MTU;
5593 eth_dev->data->mac_addrs = priv->mac;
5595 eth_dev->pci_dev = pci_dev;
5597 rte_eth_copy_pci_info(eth_dev, pci_dev);
5599 eth_dev->driver = &mlx4_driver;
5601 priv->dev = eth_dev;
5602 eth_dev->dev_ops = &mlx4_dev_ops;
5603 TAILQ_INIT(ð_dev->link_intr_cbs);
5605 /* Bring Ethernet device up. */
5606 DEBUG("forcing Ethernet interface up");
5607 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5613 claim_zero(ibv_dealloc_pd(pd));
5615 claim_zero(ibv_close_device(ctx));
5617 rte_eth_dev_release_port(eth_dev);
5622 * XXX if something went wrong in the loop above, there is a resource
5623 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5624 * long as the dpdk does not provide a way to deallocate a ethdev and a
5625 * way to enumerate the registered ethdevs to free the previous ones.
5628 /* no port found, complain */
5629 if (!mlx4_dev[idx].ports) {
5636 claim_zero(ibv_close_device(attr_ctx));
5638 ibv_free_device_list(list);
5643 static const struct rte_pci_id mlx4_pci_id_map[] = {
5645 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5646 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3,
5647 .subsystem_vendor_id = PCI_ANY_ID,
5648 .subsystem_device_id = PCI_ANY_ID
5651 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5652 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO,
5653 .subsystem_vendor_id = PCI_ANY_ID,
5654 .subsystem_device_id = PCI_ANY_ID
5657 .vendor_id = PCI_VENDOR_ID_MELLANOX,
5658 .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX3VF,
5659 .subsystem_vendor_id = PCI_ANY_ID,
5660 .subsystem_device_id = PCI_ANY_ID
5667 static struct eth_driver mlx4_driver = {
5669 .name = MLX4_DRIVER_NAME,
5670 .id_table = mlx4_pci_id_map,
5671 .devinit = mlx4_pci_devinit,
5672 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5674 .dev_private_size = sizeof(struct priv)
5678 * Driver initialization routine.
5681 rte_mlx4_pmd_init(const char *name, const char *args)
5686 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5687 * huge pages. Calling ibv_fork_init() during init allows
5688 * applications to use fork() safely for purposes other than
5689 * using this PMD, which is not supported in forked processes.
5691 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5693 rte_eal_pci_register(&mlx4_driver.pci_drv);
5697 static struct rte_driver rte_mlx4_driver = {
5699 .name = MLX4_DRIVER_NAME,
5700 .init = rte_mlx4_pmd_init,
5703 PMD_REGISTER_DRIVER(rte_mlx4_driver)