2 Copyright(c) 2017 Marvell International Ltd.
3 Copyright(c) 2017 Semihalf.
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions
10 * Redistributions of source code must retain the above copyright
11 notice, this list of conditions and the following disclaimer.
12 * Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in
14 the documentation and/or other materials provided with the
16 * Neither the name of the copyright holder nor the names of its
17 contributors may be used to endorse or promote products derived
18 from this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 .. _mvpp2_poll_mode_driver:
34 MVPP2 Poll Mode Driver
35 ======================
37 The MVPP2 PMD (librte_pmd_mvpp2) provides poll mode driver support
38 for the Marvell PPv2 (Packet Processor v2) 1/10 Gbps adapter.
40 Detailed information about SoCs that use PPv2 can be obtained here:
42 * https://www.marvell.com/embedded-processors/armada-70xx/
43 * https://www.marvell.com/embedded-processors/armada-80xx/
47 Due to external dependencies, this driver is disabled by default. It must
48 be enabled manually by setting relevant configuration option manually.
49 Please refer to `Config File Options`_ section for further details.
55 Features of the MVPP2 PMD are:
65 - Multicast MAC filter
82 - Number of lcores is limited to 9 by MUSDK internal design. If more lcores
83 need to be allocated, locking will have to be considered. Number of available
84 lcores can be changed via ``MRVL_MUSDK_HIFS_RESERVED`` define in
85 ``mrvl_ethdev.c`` source file.
87 - Flushing vlans added for filtering is not possible due to MUSDK missing
88 functionality. Current workaround is to reset board so that PPv2 has a
89 chance to start in a sane state.
95 - Custom Linux Kernel sources
97 .. code-block:: console
99 git clone https://github.com/MarvellEmbeddedProcessors/linux-marvell.git -b linux-4.4.52-armada-17.10
101 - Out of tree `mvpp2x_sysfs` kernel module sources
103 .. code-block:: console
105 git clone https://github.com/MarvellEmbeddedProcessors/mvpp2x-marvell.git -b mvpp2x-armada-17.10
107 - MUSDK (Marvell User-Space SDK) sources
109 .. code-block:: console
111 git clone https://github.com/MarvellEmbeddedProcessors/musdk-marvell.git -b musdk-armada-17.10
113 MUSDK is a light-weight library that provides direct access to Marvell's
114 PPv2 (Packet Processor v2). Alternatively prebuilt MUSDK library can be
115 requested from `Marvell Extranet <https://extranet.marvell.com>`_. Once
116 approval has been granted, library can be found by typing ``musdk`` in
119 To get better understanding of the library one can consult documentation
120 available in the ``doc`` top level directory of the MUSDK sources.
122 MUSDK must be configured with the following features:
124 .. code-block:: console
126 --enable-bpool-dma=64
130 Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup
137 The following options can be modified in the ``config`` file.
139 - ``CONFIG_RTE_LIBRTE_MVPP2_PMD`` (default ``n``)
141 Toggle compilation of the librte mvpp2 driver.
147 QoS configuration is done through external configuration file. Path to the
148 file must be given as `cfg` in driver's vdev parameter list.
153 .. code-block:: console
155 [port <portnum> default]
156 default_tc = <default_tc>
157 mapping_priority = <mapping_priority>
158 policer_enable = <policer_enable>
159 token_unit = <token_unit>
165 rate_limit_enable = <rate_limit_enable>
166 rate_limit = <rate_limit>
167 burst_size = <burst_size>
169 [port <portnum> tc <traffic_class>]
170 rxq = <rx_queue_list>
173 default_color = <default_color>
175 [port <portnum> tc <traffic_class>]
176 rxq = <rx_queue_list>
180 [port <portnum> txq <txqnum>]
181 sched_mode = <sched_mode>
182 wrr_weight = <wrr_weight>
184 rate_limit_enable = <rate_limit_enable>
185 rate_limit = <rate_limit>
186 burst_size = <burst_size>
190 - ``<portnum>``: DPDK Port number (0..n).
192 - ``<default_tc>``: Default traffic class (e.g. 0)
194 - ``<mapping_priority>``: QoS priority for mapping (`ip`, `vlan`, `ip/vlan` or `vlan/ip`).
196 - ``<traffic_class>``: Traffic Class to be configured.
198 - ``<rx_queue_list>``: List of DPDK RX queues (e.g. 0 1 3-4)
200 - ``<pcp_list>``: List of PCP values to handle in particular TC (e.g. 0 1 3-4 7).
202 - ``<dscp_list>``: List of DSCP values to handle in particular TC (e.g. 0-12 32-48 63).
204 - ``<policer_enable>``: Enable ingress policer.
206 - ``<token_unit>``: Policer token unit (`bytes` or `packets`).
208 - ``<color_mode>``: Policer color mode (`aware` or `blind`).
210 - ``<cir>``: Committed information rate in unit of kilo bits per second (data rate) or packets per second.
212 - ``<cbs>``: Committed burst size in unit of kilo bytes or number of packets.
214 - ``<ebs>``: Excess burst size in unit of kilo bytes or number of packets.
216 - ``<default_color>``: Default color for specific tc.
218 - ``<rate_limit_enable>``: Enables per port or per txq rate limiting.
220 - ``<rate_limit>``: Committed information rate, in kilo bits per second.
222 - ``<burst_size>``: Committed burst size, in kilo bytes.
224 - ``<sched_mode>``: Egress scheduler mode (`wrr` or `sp`).
226 - ``<wrr_weight>``: Txq weight.
228 Setting PCP/DSCP values for the default TC is not required. All PCP/DSCP
229 values not assigned explicitly to particular TC will be handled by the
232 Configuration file example
233 ^^^^^^^^^^^^^^^^^^^^^^^^^^
235 .. code-block:: console
239 mapping_priority = ip
241 rate_limit_enable = 1
266 mapping_priority = vlan/ip
288 rate_limit_enable = 1
295 .. code-block:: console
297 ./testpmd --vdev=eth_mvpp2,iface=eth0,iface=eth2,cfg=/home/user/mrvl.conf \
298 -c 7 -- -i -a --disable-hw-vlan-strip --rxq=3 --txq=3
304 Driver needs precompiled MUSDK library during compilation.
306 .. code-block:: console
308 export CROSS_COMPILE=<toolchain>/bin/aarch64-linux-gnu-
310 ./configure --host=aarch64-linux-gnu --enable-bpool-dma=64
313 MUSDK will be installed to `usr/local` under current directory.
314 For the detailed build instructions please consult ``doc/musdk_get_started.txt``.
316 Before the DPDK build process the environmental variable ``LIBMUSDK_PATH`` with
317 the path to the MUSDK installation directory needs to be exported.
319 .. code-block:: console
321 export LIBMUSDK_PATH=<musdk>/usr/local
322 export CROSS=aarch64-linux-gnu-
323 make config T=arm64-armv8a-linuxapp-gcc
324 sed -ri 's,(MVPP2_PMD=)n,\1y,' build/.config
330 PPv2 offers packet classification capabilities via classifier engine which
331 can be configured via generic flow API offered by DPDK.
333 Supported flow actions
334 ~~~~~~~~~~~~~~~~~~~~~~
336 Following flow action items are supported by the driver:
344 Following flow items and their respective fields are supported by the driver:
362 * destination address
369 * destination address
381 Classifier match engine
382 ~~~~~~~~~~~~~~~~~~~~~~~
384 Classifier has an internal match engine which can be configured to
385 operate in either exact or maskable mode.
387 Mode is selected upon creation of the first unique flow rule as follows:
389 * maskable, if key size is up to 8 bytes.
390 * exact, otherwise, i.e for keys bigger than 8 bytes.
392 Where the key size equals the number of bytes of all fields specified
395 .. table:: Examples of key size calculation
397 +----------------------------------------------------------------------------+-------------------+-------------+
398 | Flow pattern | Key size in bytes | Used engine |
399 +============================================================================+===================+=============+
400 | ETH (destination MAC) / VLAN (VID) | 6 + 2 = 8 | Maskable |
401 +----------------------------------------------------------------------------+-------------------+-------------+
402 | VLAN (VID) / IPV4 (source address) | 2 + 4 = 6 | Maskable |
403 +----------------------------------------------------------------------------+-------------------+-------------+
404 | TCP (source port, destination port) | 2 + 2 = 4 | Maskable |
405 +----------------------------------------------------------------------------+-------------------+-------------+
406 | VLAN (priority) / IPV4 (source address) | 1 + 4 = 5 | Maskable |
407 +----------------------------------------------------------------------------+-------------------+-------------+
408 | IPV4 (destination address) / UDP (source port, destination port) | 6 + 2 + 2 = 10 | Exact |
409 +----------------------------------------------------------------------------+-------------------+-------------+
410 | VLAN (VID) / IPV6 (flow label, destination address) | 2 + 3 + 16 = 21 | Exact |
411 +----------------------------------------------------------------------------+-------------------+-------------+
412 | IPV4 (DSCP, source address, destination address) | 1 + 4 + 4 = 9 | Exact |
413 +----------------------------------------------------------------------------+-------------------+-------------+
414 | IPV6 (flow label, source address, destination address) | 3 + 16 + 16 = 35 | Exact |
415 +----------------------------------------------------------------------------+-------------------+-------------+
417 From the user perspective maskable mode means that masks specified
418 via flow rules are respected. In case of exact match mode, masks
419 which do not provide exact matching (all bits masked) are ignored.
421 If the flow matches more than one classifier rule the first
422 (with the lowest index) matched takes precedence.
424 Flow rules usage example
425 ~~~~~~~~~~~~~~~~~~~~~~~~
427 Before proceeding run testpmd user application:
429 .. code-block:: console
431 ./testpmd --vdev=eth_mvpp2,iface=eth0,iface=eth2 -c 3 -- -i --p 3 -a --disable-hw-vlan-strip
436 .. code-block:: console
438 testpmd> flow create 0 ingress pattern eth src is 10:11:12:13:14:15 / end actions drop / end
440 In this case key size is 6 bytes thus maskable type is selected. Testpmd
441 will set mask to ff:ff:ff:ff:ff:ff i.e traffic explicitly matching
442 above rule will be dropped.
447 .. code-block:: console
449 testpmd> flow create 0 ingress pattern ipv4 src spec 10.10.10.0 src mask 255.255.255.0 / tcp src spec 0x10 src mask 0x10 / end action drop / end
451 In this case key size is 8 bytes thus maskable type is selected.
452 Flows which have IPv4 source addresses ranging from 10.10.10.0 to 10.10.10.255
453 and tcp source port set to 16 will be dropped.
458 .. code-block:: console
460 testpmd> flow create 0 ingress pattern vlan vid spec 0x10 vid mask 0x10 / ipv4 src spec 10.10.1.1 src mask 255.255.0.0 dst spec 11.11.11.1 dst mask 255.255.255.0 / end actions drop / end
462 In this case key size is 10 bytes thus exact type is selected.
463 Even though each item has partial mask set, masks will be ignored.
464 As a result only flows with VID set to 16 and IPv4 source and destination
465 addresses set to 10.10.1.1 and 11.11.11.1 respectively will be dropped.
470 Following limitations need to be taken into account while creating flow rules:
472 * For IPv4 exact match type the key size must be up to 12 bytes.
473 * For IPv6 exact match type the key size must be up to 36 bytes.
474 * Following fields cannot be partially masked (all masks are treated as
481 * TCP/UDP: source port, destination port
483 * Only one classifier table can be created thus all rules in the table
484 have to match table format. Table format is set during creation of
485 the first unique flow rule.
486 * Up to 5 fields can be specified per flow rule.
487 * Up to 20 flow rules can be added.
489 For additional information about classifier please consult
490 ``doc/musdk_cls_user_guide.txt``.
495 MVPP2 PMD requires extra out of tree kernel modules to function properly.
496 `musdk_uio` and `mv_pp_uio` sources are part of the MUSDK. Please consult
497 ``doc/musdk_get_started.txt`` for the detailed build instructions.
498 For `mvpp2x_sysfs` please consult ``Documentation/pp22_sysfs.txt`` for the
499 detailed build instructions.
501 .. code-block:: console
505 insmod mvpp2x_sysfs.ko
507 Additionally interfaces used by DPDK application need to be put up:
509 .. code-block:: console
514 In order to run testpmd example application following command can be used:
516 .. code-block:: console
518 ./testpmd --vdev=eth_mvpp2,iface=eth0,iface=eth2 -c 7 -- \
519 --burst=128 --txd=2048 --rxd=1024 --rxq=2 --txq=2 --nb-cores=2 \