1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
14 #include <rte_atomic.h>
16 #include <rte_bus_pci.h>
17 #include <rte_errno.h>
18 #include <rte_memory.h>
19 #include <rte_malloc.h>
20 #include <rte_spinlock.h>
23 #include "octeontx_mbox.h"
24 #include "octeontx_fpavf.h"
26 /* FPA Mbox Message */
29 #define FPA_CONFIGSET 0x1
30 #define FPA_CONFIGGET 0x2
31 #define FPA_START_COUNT 0x3
32 #define FPA_STOP_COUNT 0x4
33 #define FPA_ATTACHAURA 0x5
34 #define FPA_DETACHAURA 0x6
35 #define FPA_SETAURALVL 0x7
36 #define FPA_GETAURALVL 0x8
38 #define FPA_COPROC 0x1
41 struct octeontx_mbox_fpa_cfg {
44 uint64_t pool_stack_base;
45 uint64_t pool_stack_end;
49 struct __attribute__((__packed__)) gen_req {
53 struct __attribute__((__packed__)) idn_req {
57 struct __attribute__((__packed__)) gen_resp {
62 struct __attribute__((__packed__)) dcfg_resp {
68 uint8_t net_port_count;
69 uint8_t virt_port_count;
72 #define FPA_MAX_POOL 32
73 #define FPA_PF_PAGE_SZ 4096
75 #define FPA_LN_SIZE 128
76 #define FPA_ROUND_UP(x, size) \
77 ((((unsigned long)(x)) + size-1) & (~(size-1)))
78 #define FPA_OBJSZ_2_CACHE_LINE(sz) (((sz) + RTE_CACHE_LINE_MASK) >> 7)
79 #define FPA_CACHE_LINE_2_OBJSZ(sz) ((sz) << 7)
81 #define POOL_ENA (0x1 << 0)
82 #define POOL_DIS (0x0 << 0)
83 #define POOL_SET_NAT_ALIGN (0x1 << 1)
84 #define POOL_DIS_NAT_ALIGN (0x0 << 1)
85 #define POOL_STYPE(x) (((x) & 0x1) << 2)
86 #define POOL_LTYPE(x) (((x) & 0x3) << 3)
87 #define POOL_BUF_OFFSET(x) (((x) & 0x7fffULL) << 16)
88 #define POOL_BUF_SIZE(x) (((x) & 0x7ffULL) << 32)
91 void *pool_stack_base;
93 uint64_t stack_ln_ptr;
95 uint16_t vf_id; /* gpool_id */
96 uint16_t sz128; /* Block size in cache lines */
100 struct octeontx_fpadev {
102 uint8_t total_gpool_cnt;
103 struct fpavf_res pool[FPA_VF_MAX];
106 static struct octeontx_fpadev fpadev;
108 int octeontx_logtype_fpavf;
109 int octeontx_logtype_fpavf_mbox;
111 RTE_INIT(otx_pool_init_log);
113 otx_pool_init_log(void)
115 octeontx_logtype_fpavf = rte_log_register("pmd.mempool.octeontx");
116 if (octeontx_logtype_fpavf >= 0)
117 rte_log_set_level(octeontx_logtype_fpavf, RTE_LOG_NOTICE);
120 /* lock is taken by caller */
122 octeontx_fpa_gpool_alloc(unsigned int object_size)
124 struct fpavf_res *res = NULL;
128 sz128 = FPA_OBJSZ_2_CACHE_LINE(object_size);
130 for (gpool = 0; gpool < FPA_VF_MAX; gpool++) {
132 /* Skip VF that is not mapped Or _inuse */
133 if ((fpadev.pool[gpool].bar0 == NULL) ||
134 (fpadev.pool[gpool].is_inuse == true))
137 res = &fpadev.pool[gpool];
139 RTE_ASSERT(res->domain_id != (uint16_t)~0);
140 RTE_ASSERT(res->vf_id != (uint16_t)~0);
141 RTE_ASSERT(res->stack_ln_ptr != 0);
143 if (res->sz128 == 0) {
146 fpavf_log_dbg("gpool %d blk_sz %d\n", gpool, sz128);
154 /* lock is taken by caller */
155 static __rte_always_inline uintptr_t
156 octeontx_fpa_gpool2handle(uint16_t gpool)
158 struct fpavf_res *res = NULL;
160 RTE_ASSERT(gpool < FPA_VF_MAX);
162 res = &fpadev.pool[gpool];
163 return (uintptr_t)res->bar0 | gpool;
166 static __rte_always_inline bool
167 octeontx_fpa_handle_valid(uintptr_t handle)
169 struct fpavf_res *res = NULL;
174 if (unlikely(!handle))
178 gpool = octeontx_fpa_bufpool_gpool(handle);
180 /* get the bar address */
181 handle &= ~(uint64_t)FPA_GPOOL_MASK;
182 for (i = 0; i < FPA_VF_MAX; i++) {
183 if ((uintptr_t)fpadev.pool[i].bar0 != handle)
190 res = &fpadev.pool[i];
192 if (res->sz128 == 0 || res->domain_id == (uint16_t)~0 ||
193 res->stack_ln_ptr == 0)
204 octeontx_fpapf_pool_setup(unsigned int gpool, unsigned int buf_size,
205 signed short buf_offset, unsigned int max_buf_count)
208 rte_iova_t phys_addr;
210 struct fpavf_res *fpa = NULL;
212 struct octeontx_mbox_hdr hdr;
213 struct dcfg_resp resp;
214 struct octeontx_mbox_fpa_cfg cfg;
217 fpa = &fpadev.pool[gpool];
218 memsz = FPA_ROUND_UP(max_buf_count / fpa->stack_ln_ptr, FPA_LN_SIZE) *
221 /* Round-up to page size */
222 memsz = (memsz + FPA_PF_PAGE_SZ - 1) & ~(uintptr_t)(FPA_PF_PAGE_SZ-1);
223 memptr = rte_malloc(NULL, memsz, RTE_CACHE_LINE_SIZE);
224 if (memptr == NULL) {
229 /* Configure stack */
230 fpa->pool_stack_base = memptr;
231 phys_addr = rte_malloc_virt2iova(memptr);
233 buf_size /= FPA_LN_SIZE;
236 hdr.coproc = FPA_COPROC;
237 hdr.msg = FPA_CONFIGSET;
238 hdr.vfid = fpa->vf_id;
241 buf_offset /= FPA_LN_SIZE;
242 reg = POOL_BUF_SIZE(buf_size) | POOL_BUF_OFFSET(buf_offset) |
243 POOL_LTYPE(0x2) | POOL_STYPE(0) | POOL_SET_NAT_ALIGN |
248 cfg.pool_stack_base = phys_addr;
249 cfg.pool_stack_end = phys_addr + memsz;
250 cfg.aura_cfg = (1 << 9);
252 ret = octeontx_mbox_send(&hdr, &cfg,
253 sizeof(struct octeontx_mbox_fpa_cfg),
254 &resp, sizeof(resp));
260 fpavf_log_dbg(" vfid %d gpool %d aid %d pool_cfg 0x%x pool_stack_base %" PRIx64 " pool_stack_end %" PRIx64" aura_cfg %" PRIx64 "\n",
261 fpa->vf_id, gpool, cfg.aid, (unsigned int)cfg.pool_cfg,
262 cfg.pool_stack_base, cfg.pool_stack_end, cfg.aura_cfg);
264 /* Now pool is in_use */
265 fpa->is_inuse = true;
275 octeontx_fpapf_pool_destroy(unsigned int gpool_index)
277 struct octeontx_mbox_hdr hdr;
278 struct dcfg_resp resp;
279 struct octeontx_mbox_fpa_cfg cfg;
280 struct fpavf_res *fpa = NULL;
283 fpa = &fpadev.pool[gpool_index];
285 hdr.coproc = FPA_COPROC;
286 hdr.msg = FPA_CONFIGSET;
287 hdr.vfid = fpa->vf_id;
290 /* reset and free the pool */
293 cfg.pool_stack_base = 0;
294 cfg.pool_stack_end = 0;
297 ret = octeontx_mbox_send(&hdr, &cfg,
298 sizeof(struct octeontx_mbox_fpa_cfg),
299 &resp, sizeof(resp));
307 /* anycase free pool stack memory */
308 rte_free(fpa->pool_stack_base);
309 fpa->pool_stack_base = NULL;
314 octeontx_fpapf_aura_attach(unsigned int gpool_index)
316 struct octeontx_mbox_hdr hdr;
317 struct dcfg_resp resp;
318 struct octeontx_mbox_fpa_cfg cfg;
321 if (gpool_index >= FPA_MAX_POOL) {
325 hdr.coproc = FPA_COPROC;
326 hdr.msg = FPA_ATTACHAURA;
327 hdr.vfid = gpool_index;
329 memset(&cfg, 0x0, sizeof(struct octeontx_mbox_fpa_cfg));
330 cfg.aid = gpool_index; /* gpool is guara */
332 ret = octeontx_mbox_send(&hdr, &cfg,
333 sizeof(struct octeontx_mbox_fpa_cfg),
334 &resp, sizeof(resp));
336 fpavf_log_err("Could not attach fpa ");
337 fpavf_log_err("aura %d to pool %d. Err=%d. FuncErr=%d\n",
338 gpool_index, gpool_index, ret, hdr.res_code);
347 octeontx_fpapf_aura_detach(unsigned int gpool_index)
349 struct octeontx_mbox_fpa_cfg cfg = {0};
350 struct octeontx_mbox_hdr hdr = {0};
353 if (gpool_index >= FPA_MAX_POOL) {
358 cfg.aid = gpool_index; /* gpool is gaura */
359 hdr.coproc = FPA_COPROC;
360 hdr.msg = FPA_DETACHAURA;
361 hdr.vfid = gpool_index;
362 ret = octeontx_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0);
364 fpavf_log_err("Couldn't detach FPA aura %d Err=%d FuncErr=%d\n",
365 gpool_index, ret, hdr.res_code);
374 octeontx_fpavf_pool_set_range(uintptr_t handle, unsigned long memsz,
375 void *memva, uint16_t gpool)
379 if (unlikely(!handle))
382 va_end = (uintptr_t)memva + memsz;
383 va_end &= ~RTE_CACHE_LINE_MASK;
386 fpavf_write64((uintptr_t)memva,
387 (void *)((uintptr_t)handle +
388 FPA_VF_VHPOOL_START_ADDR(gpool)));
389 fpavf_write64(va_end,
390 (void *)((uintptr_t)handle +
391 FPA_VF_VHPOOL_END_ADDR(gpool)));
396 octeontx_fpapf_start_count(uint16_t gpool_index)
399 struct octeontx_mbox_hdr hdr = {0};
401 if (gpool_index >= FPA_MAX_POOL) {
406 hdr.coproc = FPA_COPROC;
407 hdr.msg = FPA_START_COUNT;
408 hdr.vfid = gpool_index;
409 ret = octeontx_mbox_send(&hdr, NULL, 0, NULL, 0);
411 fpavf_log_err("Could not start buffer counting for ");
412 fpavf_log_err("FPA pool %d. Err=%d. FuncErr=%d\n",
413 gpool_index, ret, hdr.res_code);
422 static __rte_always_inline int
423 octeontx_fpavf_free(unsigned int gpool)
427 if (gpool >= FPA_MAX_POOL) {
433 fpadev.pool[gpool].is_inuse = false;
439 static __rte_always_inline int
440 octeontx_gpool_free(uint16_t gpool)
442 if (fpadev.pool[gpool].sz128 != 0) {
443 fpadev.pool[gpool].sz128 = 0;
450 * Return buffer size for a given pool
453 octeontx_fpa_bufpool_block_size(uintptr_t handle)
455 struct fpavf_res *res = NULL;
458 if (unlikely(!octeontx_fpa_handle_valid(handle)))
462 gpool = octeontx_fpa_bufpool_gpool(handle);
463 res = &fpadev.pool[gpool];
464 return FPA_CACHE_LINE_2_OBJSZ(res->sz128);
468 octeontx_fpa_bufpool_free_count(uintptr_t handle)
470 uint64_t cnt, limit, avail;
474 if (unlikely(!octeontx_fpa_handle_valid(handle)))
478 gpool = octeontx_fpa_bufpool_gpool(handle);
480 /* Get pool bar address from handle */
481 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
483 cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
484 FPA_VF_VHAURA_CNT(gpool)));
485 limit = fpavf_read64((void *)((uintptr_t)pool_bar +
486 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
488 avail = fpavf_read64((void *)((uintptr_t)pool_bar +
489 FPA_VF_VHPOOL_AVAILABLE(gpool)));
491 return RTE_MIN(avail, (limit - cnt));
495 octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,
496 unsigned int buf_offset, int node_id)
499 uintptr_t gpool_handle;
503 RTE_SET_USED(node_id);
504 RTE_BUILD_BUG_ON(sizeof(struct rte_mbuf) > OCTEONTX_FPAVF_BUF_OFFSET);
506 object_size = RTE_CACHE_LINE_ROUNDUP(object_size);
507 if (object_size > FPA_MAX_OBJ_SIZE) {
512 rte_spinlock_lock(&fpadev.lock);
513 res = octeontx_fpa_gpool_alloc(object_size);
516 if (unlikely(res < 0)) {
524 /* get pool handle */
525 gpool_handle = octeontx_fpa_gpool2handle(gpool);
526 if (!octeontx_fpa_handle_valid(gpool_handle)) {
528 goto error_gpool_free;
531 /* Get pool bar address from handle */
532 pool_bar = gpool_handle & ~(uint64_t)FPA_GPOOL_MASK;
534 res = octeontx_fpapf_pool_setup(gpool, object_size, buf_offset,
538 goto error_gpool_free;
541 /* populate AURA fields */
542 res = octeontx_fpapf_aura_attach(gpool);
545 goto error_pool_destroy;
549 rte_spinlock_unlock(&fpadev.lock);
551 /* populate AURA registers */
552 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
553 FPA_VF_VHAURA_CNT(gpool)));
554 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
555 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
556 fpavf_write64(object_count + 1, (void *)((uintptr_t)pool_bar +
557 FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
559 octeontx_fpapf_start_count(gpool);
564 octeontx_fpavf_free(gpool);
565 octeontx_fpapf_pool_destroy(gpool);
567 octeontx_gpool_free(gpool);
569 rte_spinlock_unlock(&fpadev.lock);
571 return (uintptr_t)NULL;
575 * Destroy a buffer pool.
578 octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
580 void **node, **curr, *head = NULL;
587 RTE_SET_USED(node_id);
589 /* Wait for all outstanding writes to be committed */
592 if (unlikely(!octeontx_fpa_handle_valid(handle)))
596 gpool = octeontx_fpa_bufpool_gpool(handle);
598 /* Get pool bar address from handle */
599 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
601 /* Check for no outstanding buffers */
602 cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
603 FPA_VF_VHAURA_CNT(gpool)));
605 fpavf_log_dbg("buffer exist in pool cnt %" PRId64 "\n", cnt);
609 rte_spinlock_lock(&fpadev.lock);
611 avail = fpavf_read64((void *)((uintptr_t)pool_bar +
612 FPA_VF_VHPOOL_AVAILABLE(gpool)));
614 /* Prepare to empty the entire POOL */
615 fpavf_write64(avail, (void *)((uintptr_t)pool_bar +
616 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
617 fpavf_write64(avail + 1, (void *)((uintptr_t)pool_bar +
618 FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
621 /* Invalidate the POOL */
622 octeontx_gpool_free(gpool);
624 /* Process all buffers in the pool */
627 /* Yank a buffer from the pool */
628 node = (void *)(uintptr_t)
629 fpavf_read64((void *)
630 (pool_bar + FPA_VF_VHAURA_OP_ALLOC(gpool)));
633 fpavf_log_err("GAURA[%u] missing %" PRIx64 " buf\n",
638 /* Imsert it into an ordered linked list */
639 for (curr = &head; curr[0] != NULL; curr = curr[0]) {
640 if ((uintptr_t)node <= (uintptr_t)curr[0])
647 /* Verify the linked list to be a perfect series */
648 sz = octeontx_fpa_bufpool_block_size(handle) << 7;
649 for (curr = head; curr != NULL && curr[0] != NULL;
651 if (curr == curr[0] ||
652 ((uintptr_t)curr != ((uintptr_t)curr[0] - sz))) {
653 fpavf_log_err("POOL# %u buf sequence err (%p vs. %p)\n",
654 gpool, curr, curr[0]);
658 /* Disable pool operation */
659 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar +
660 FPA_VF_VHPOOL_START_ADDR(gpool)));
661 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar +
662 FPA_VF_VHPOOL_END_ADDR(gpool)));
664 (void)octeontx_fpapf_pool_destroy(gpool);
666 /* Deactivate the AURA */
667 fpavf_write64(0, (void *)((uintptr_t)pool_bar +
668 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
669 fpavf_write64(0, (void *)((uintptr_t)pool_bar +
670 FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
672 ret = octeontx_fpapf_aura_detach(gpool);
674 fpavf_log_err("Failed to dettach gaura %u. error code=%d\n",
679 (void)octeontx_fpavf_free(gpool);
681 rte_spinlock_unlock(&fpadev.lock);
686 octeontx_fpavf_setup(void)
689 static bool init_once;
692 rte_spinlock_init(&fpadev.lock);
693 fpadev.total_gpool_cnt = 0;
695 for (i = 0; i < FPA_VF_MAX; i++) {
697 fpadev.pool[i].domain_id = ~0;
698 fpadev.pool[i].stack_ln_ptr = 0;
699 fpadev.pool[i].sz128 = 0;
700 fpadev.pool[i].bar0 = NULL;
701 fpadev.pool[i].pool_stack_base = NULL;
702 fpadev.pool[i].is_inuse = false;
709 octeontx_fpavf_identify(void *bar0)
714 uint64_t stack_ln_ptr;
716 val = fpavf_read64((void *)((uintptr_t)bar0 +
717 FPA_VF_VHAURA_CNT_THRESHOLD(0)));
719 domain_id = (val >> 8) & 0xffff;
720 vf_id = (val >> 24) & 0xffff;
722 stack_ln_ptr = fpavf_read64((void *)((uintptr_t)bar0 +
723 FPA_VF_VHPOOL_THRESHOLD(0)));
724 if (vf_id >= FPA_VF_MAX) {
725 fpavf_log_err("vf_id(%d) greater than max vf (32)\n", vf_id);
729 if (fpadev.pool[vf_id].is_inuse) {
730 fpavf_log_err("vf_id %d is_inuse\n", vf_id);
734 fpadev.pool[vf_id].domain_id = domain_id;
735 fpadev.pool[vf_id].vf_id = vf_id;
736 fpadev.pool[vf_id].bar0 = bar0;
737 fpadev.pool[vf_id].stack_ln_ptr = stack_ln_ptr;
743 /* FPAVF pcie device aka mempool probe */
745 fpavf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
749 struct fpavf_res *fpa = NULL;
751 RTE_SET_USED(pci_drv);
754 /* For secondary processes, the primary has done all the work */
755 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
758 if (pci_dev->mem_resource[0].addr == NULL) {
759 fpavf_log_err("Empty bars %p ", pci_dev->mem_resource[0].addr);
762 idreg = pci_dev->mem_resource[0].addr;
764 octeontx_fpavf_setup();
766 res = octeontx_fpavf_identify(idreg);
770 fpa = &fpadev.pool[res];
771 fpadev.total_gpool_cnt++;
774 fpavf_log_dbg("total_fpavfs %d bar0 %p domain %d vf %d stk_ln_ptr 0x%x",
775 fpadev.total_gpool_cnt, fpa->bar0, fpa->domain_id,
776 fpa->vf_id, (unsigned int)fpa->stack_ln_ptr);
781 static const struct rte_pci_id pci_fpavf_map[] = {
783 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
784 PCI_DEVICE_ID_OCTEONTX_FPA_VF)
791 static struct rte_pci_driver pci_fpavf = {
792 .id_table = pci_fpavf_map,
793 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
794 .probe = fpavf_probe,
797 RTE_PMD_REGISTER_PCI(octeontx_fpavf, pci_fpavf);