1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
8 #include <rte_bus_pci.h>
10 #include "../octeontx_logs.h"
11 #include "octeontx_io.h"
12 #include "octeontx_pkivf.h"
15 struct octeontx_pkivf {
22 struct octeontx_pki_vf_ctl_s {
23 struct octeontx_pkivf pki[PKI_VF_MAX];
26 static struct octeontx_pki_vf_ctl_s pki_vf_ctl;
29 octeontx_pki_port_open(int port)
31 uint16_t global_domain = octeontx_get_global_domain();
32 struct octeontx_mbox_hdr hdr;
33 pki_port_type_t port_type;
36 /* Check if atleast one PKI vf is in application domain. */
37 for (i = 0; i < PKI_VF_MAX; i++) {
38 if (pki_vf_ctl.pki[i].domain != global_domain)
46 port_type.port_type = OCTTX_PORT_TYPE_NET;
47 hdr.coproc = OCTEONTX_PKI_COPROC;
48 hdr.msg = MBOX_PKI_PORT_OPEN;
51 res = octeontx_mbox_send(&hdr, &port_type, sizeof(pki_port_type_t),
59 octeontx_pki_port_hash_config(int port, pki_hash_cfg_t *hash_cfg)
61 struct octeontx_mbox_hdr hdr;
64 pki_hash_cfg_t h_cfg = *(pki_hash_cfg_t *)hash_cfg;
65 int len = sizeof(pki_hash_cfg_t);
67 hdr.coproc = OCTEONTX_PKI_COPROC;
68 hdr.msg = MBOX_PKI_PORT_HASH_CONFIG;
71 res = octeontx_mbox_send(&hdr, &h_cfg, len, NULL, 0);
79 octeontx_pki_port_pktbuf_config(int port, pki_pktbuf_cfg_t *buf_cfg)
81 struct octeontx_mbox_hdr hdr;
84 pki_pktbuf_cfg_t b_cfg = *(pki_pktbuf_cfg_t *)buf_cfg;
85 int len = sizeof(pki_pktbuf_cfg_t);
87 hdr.coproc = OCTEONTX_PKI_COPROC;
88 hdr.msg = MBOX_PKI_PORT_PKTBUF_CONFIG;
91 res = octeontx_mbox_send(&hdr, &b_cfg, len, NULL, 0);
98 octeontx_pki_port_create_qos(int port, pki_qos_cfg_t *qos_cfg)
100 struct octeontx_mbox_hdr hdr;
103 pki_qos_cfg_t q_cfg = *(pki_qos_cfg_t *)qos_cfg;
104 int len = sizeof(pki_qos_cfg_t);
106 hdr.coproc = OCTEONTX_PKI_COPROC;
107 hdr.msg = MBOX_PKI_PORT_CREATE_QOS;
110 res = octeontx_mbox_send(&hdr, &q_cfg, len, NULL, 0);
119 octeontx_pki_port_errchk_config(int port, pki_errchk_cfg_t *cfg)
121 struct octeontx_mbox_hdr hdr;
124 pki_errchk_cfg_t e_cfg;
125 e_cfg = *((pki_errchk_cfg_t *)(cfg));
126 int len = sizeof(pki_errchk_cfg_t);
128 hdr.coproc = OCTEONTX_PKI_COPROC;
129 hdr.msg = MBOX_PKI_PORT_ERRCHK_CONFIG;
132 res = octeontx_mbox_send(&hdr, &e_cfg, len, NULL, 0);
139 #define PCI_VENDOR_ID_CAVIUM 0x177D
140 #define PCI_DEVICE_ID_OCTEONTX_PKI_VF 0xA0DD
142 /* PKIVF pcie device */
144 pkivf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
146 struct octeontx_pkivf *res;
147 static uint8_t vf_cnt;
153 RTE_SET_USED(pci_drv);
154 /* For secondary processes, the primary has done all the work */
155 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
158 if (pci_dev->mem_resource[0].addr == NULL) {
159 octeontx_log_err("PKI Empty bar[0] %p",
160 pci_dev->mem_resource[0].addr);
164 bar0 = pci_dev->mem_resource[0].addr;
165 val = octeontx_read64(bar0);
166 domain = val & 0xffff;
167 vfid = (val >> 16) & 0xffff;
169 if (unlikely(vfid >= PKI_VF_MAX)) {
170 octeontx_log_err("pki: Invalid vfid %d", vfid);
174 res = &pki_vf_ctl.pki[vf_cnt++];
176 res->domain = domain;
179 octeontx_log_dbg("PKI Domain=%d vfid=%d", res->domain, res->vfid);
183 static const struct rte_pci_id pci_pkivf_map[] = {
185 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
186 PCI_DEVICE_ID_OCTEONTX_PKI_VF)
193 static struct rte_pci_driver pci_pkivf = {
194 .id_table = pci_pkivf_map,
195 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
196 .probe = pkivf_probe,
199 RTE_PMD_REGISTER_PCI(octeontx_pkivf, pci_pkivf);