1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2018 Intel Corporation
8 #include <rte_common.h>
9 #include <rte_memory.h>
10 #include <rte_lcore.h>
11 #include <rte_power.h>
12 #include <rte_string_fns.h>
14 #include "perf_core.h"
18 static uint16_t hp_lcores[RTE_MAX_LCORE];
19 static uint16_t nb_hp_lcores;
21 struct perf_lcore_params {
26 } __rte_cache_aligned;
28 static struct perf_lcore_params prf_lc_prms[MAX_LCORE_PARAMS];
29 static uint16_t nb_prf_lc_prms;
32 update_lcore_params(void)
34 uint8_t non_perf_lcores[RTE_MAX_LCORE];
35 uint16_t nb_non_perf_lcores = 0;
38 /* if perf-config option was not used do nothing */
39 if (nb_prf_lc_prms == 0)
42 /* if high-perf-cores option was not used query every available core */
43 if (nb_hp_lcores == 0) {
44 for (i = 0; i < RTE_MAX_LCORE; i++) {
45 if (rte_lcore_is_enabled(i)) {
46 struct rte_power_core_capabilities caps;
47 ret = rte_power_get_capabilities(i, &caps);
48 if (ret == 0 && caps.turbo) {
49 hp_lcores[nb_hp_lcores] = i;
56 /* create a list on non high performance cores*/
57 for (i = 0; i < RTE_MAX_LCORE; i++) {
58 if (rte_lcore_is_enabled(i)) {
60 for (j = 0; j < nb_hp_lcores; j++) {
61 if (hp_lcores[j] == i) {
67 non_perf_lcores[nb_non_perf_lcores++] = i;
71 /* update the lcore config */
72 for (i = 0; i < nb_prf_lc_prms; i++) {
74 if (prf_lc_prms[i].high_perf) {
75 if (prf_lc_prms[i].lcore_idx < nb_hp_lcores)
76 lcore = hp_lcores[prf_lc_prms[i].lcore_idx];
78 if (prf_lc_prms[i].lcore_idx < nb_non_perf_lcores)
80 non_perf_lcores[prf_lc_prms[i].lcore_idx];
84 printf("Performance cores configuration error\n");
88 lcore_params_array[i].lcore_id = lcore;
89 lcore_params_array[i].queue_id = prf_lc_prms[i].queue_id;
90 lcore_params_array[i].port_id = prf_lc_prms[i].port_id;
93 lcore_params = lcore_params_array;
94 nb_lcore_params = nb_prf_lc_prms;
96 printf("Updated performance core configuration\n");
97 for (i = 0; i < nb_prf_lc_prms; i++)
98 printf("\t(%d,%d,%d)\n", lcore_params[i].port_id,
99 lcore_params[i].queue_id,
100 lcore_params[i].lcore_id);
106 parse_perf_config(const char *q_arg)
109 const char *p, *p0 = q_arg;
118 unsigned long int_fld[_NUM_FLD];
119 char *str_fld[_NUM_FLD];
125 while ((p = strchr(p0, '(')) != NULL) {
132 if (size >= sizeof(s))
135 snprintf(s, sizeof(s), "%.*s", size, p);
136 if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') !=
139 for (i = 0; i < _NUM_FLD; i++) {
141 int_fld[i] = strtoul(str_fld[i], &end, 0);
142 if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
145 if (nb_prf_lc_prms >= MAX_LCORE_PARAMS) {
146 printf("exceeded max number of lcore params: %hu\n",
150 prf_lc_prms[nb_prf_lc_prms].port_id =
151 (uint8_t)int_fld[FLD_PORT];
152 prf_lc_prms[nb_prf_lc_prms].queue_id =
153 (uint8_t)int_fld[FLD_QUEUE];
154 prf_lc_prms[nb_prf_lc_prms].high_perf =
155 !!(uint8_t)int_fld[FLD_LCORE_HP];
156 prf_lc_prms[nb_prf_lc_prms].lcore_idx =
157 (uint8_t)int_fld[FLD_LCORE_IDX];
165 parse_perf_core_list(const char *corelist)
168 unsigned int count = 0;
172 if (corelist == NULL) {
173 printf("invalid core list\n");
178 /* Remove all blank characters ahead and after */
179 while (isblank(*corelist))
181 i = strlen(corelist);
182 while ((i > 0) && isblank(corelist[i - 1]))
185 /* Get list of cores */
188 while (isblank(*corelist))
190 if (*corelist == '\0')
193 idx = strtoul(corelist, &end, 10);
194 if (errno || end == NULL)
196 while (isblank(*end))
200 } else if ((*end == ',') || (*end == '\0')) {
202 if (min == RTE_MAX_LCORE)
204 for (idx = min; idx <= max; idx++) {
205 hp_lcores[count] = idx;
210 printf("invalid core list\n");
214 } while (*end != '\0');
217 printf("invalid core list\n");
221 nb_hp_lcores = count;
223 printf("Configured %d high performance cores\n", nb_hp_lcores);
224 for (i = 0; i < nb_hp_lcores; i++)
225 printf("\tHigh performance core %d %d\n",