2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
16 #define QEDE_ALARM_TIMEOUT_US 100000
18 /* Global variable to hold absolute path of fw file */
19 char fw_file[PATH_MAX];
21 const char *QEDE_DEFAULT_FIRMWARE =
22 "/lib/firmware/qed/qed_init_values-8.18.9.0.bin";
25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
29 for (i = 0; i < edev->num_hwfns; i++) {
30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
31 p_hwfn->pf_params = *params;
35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
37 edev->regview = pci_dev->mem_resource[0].addr;
38 edev->doorbells = pci_dev->mem_resource[2].addr;
42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
43 enum qed_protocol protocol, uint32_t dp_module,
44 uint8_t dp_level, bool is_vf)
46 struct ecore_hw_prepare_params hw_prepare_params;
47 struct qede_dev *qdev = (struct qede_dev *)edev;
50 ecore_init_struct(edev);
51 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
52 qdev->protocol = protocol;
57 ecore_init_dp(edev, dp_module, dp_level, NULL);
58 qed_init_pci(edev, pci_dev);
60 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
61 hw_prepare_params.personality = ECORE_PCI_ETH;
62 hw_prepare_params.drv_resc_alloc = false;
63 hw_prepare_params.chk_reg_fifo = false;
64 hw_prepare_params.initiate_pf_flr = true;
65 hw_prepare_params.epoch = (u32)time(NULL);
66 rc = ecore_hw_prepare(edev, &hw_prepare_params);
68 DP_ERR(edev, "hw prepare failed\n");
75 static int qed_nic_setup(struct ecore_dev *edev)
79 rc = ecore_resc_alloc(edev);
83 DP_INFO(edev, "Allocated qed resources\n");
84 ecore_resc_setup(edev);
89 #ifdef CONFIG_ECORE_ZIPPED_FW
90 static int qed_alloc_stream_mem(struct ecore_dev *edev)
94 for_each_hwfn(edev, i) {
95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
98 sizeof(*p_hwfn->stream));
106 static void qed_free_stream_mem(struct ecore_dev *edev)
110 for_each_hwfn(edev, i) {
111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
121 #ifdef CONFIG_ECORE_BINARY_FW
122 static int qed_load_firmware_data(struct ecore_dev *edev)
126 const char *fw = RTE_LIBRTE_QEDE_FW;
128 if (strcmp(fw, "") == 0)
129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
133 fd = open(fw_file, O_RDONLY);
135 DP_NOTICE(edev, false, "Can't open firmware file\n");
139 if (fstat(fd, &st) < 0) {
140 DP_NOTICE(edev, false, "Can't stat firmware file\n");
145 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
146 RTE_CACHE_LINE_SIZE);
147 if (!edev->firmware) {
148 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
153 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
154 DP_NOTICE(edev, false, "Can't read firmware data\n");
159 edev->fw_len = st.st_size;
160 if (edev->fw_len < 104) {
161 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
178 if (is_mac_exist && is_mac_forced)
179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
181 /* Always update link configuration according to bulletin */
182 qed_link_update(hwfn);
185 static void qede_vf_task(void *arg)
187 struct ecore_hwfn *p_hwfn = arg;
190 /* Read the bulletin board, and re-schedule the task */
191 ecore_vf_read_bulletin(p_hwfn, &change);
193 qed_handle_bulletin_change(p_hwfn);
195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
198 static void qed_start_iov_task(struct ecore_dev *edev)
200 struct ecore_hwfn *p_hwfn;
203 for_each_hwfn(edev, i) {
204 p_hwfn = &edev->hwfns[i];
206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
211 static void qed_stop_iov_task(struct ecore_dev *edev)
213 struct ecore_hwfn *p_hwfn;
216 for_each_hwfn(edev, i) {
217 p_hwfn = &edev->hwfns[i];
219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
222 static int qed_slowpath_start(struct ecore_dev *edev,
223 struct qed_slowpath_params *params)
225 const uint8_t *data = NULL;
226 struct ecore_hwfn *hwfn;
227 struct ecore_mcp_drv_version drv_version;
228 struct ecore_hw_init_params hw_init_params;
229 struct ecore_ptt *p_ptt;
233 #ifdef CONFIG_ECORE_BINARY_FW
234 rc = qed_load_firmware_data(edev);
236 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
240 hwfn = ECORE_LEADING_HWFN(edev);
241 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
242 p_ptt = ecore_ptt_acquire(hwfn);
244 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
246 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
253 rc = qed_nic_setup(edev);
257 /* set int_coalescing_mode */
258 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
260 #ifdef CONFIG_ECORE_ZIPPED_FW
262 /* Allocate stream for unzipping */
263 rc = qed_alloc_stream_mem(edev);
265 DP_NOTICE(edev, true,
266 "Failed to allocate stream memory\n");
272 qed_start_iov_task(edev);
274 #ifdef CONFIG_ECORE_BINARY_FW
276 data = (const uint8_t *)edev->firmware + sizeof(u32);
279 /* Start the slowpath */
280 memset(&hw_init_params, 0, sizeof(hw_init_params));
281 hw_init_params.b_hw_start = true;
282 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
283 hw_init_params.allow_npar_tx_switch = true;
284 hw_init_params.bin_fw_data = data;
285 hw_init_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
286 hw_init_params.avoid_eng_reset = false;
287 rc = ecore_hw_init(edev, &hw_init_params);
289 DP_ERR(edev, "ecore_hw_init failed\n");
293 DP_INFO(edev, "HW inited and function started\n");
296 hwfn = ECORE_LEADING_HWFN(edev);
297 drv_version.version = (params->drv_major << 24) |
298 (params->drv_minor << 16) |
299 (params->drv_rev << 8) | (params->drv_eng);
301 strncpy((char *)drv_version.name, (const char *)params->name,
302 MCP_DRV_VER_STR_SIZE - 4);
303 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
306 DP_NOTICE(edev, true,
307 "Failed sending drv version command\n");
312 ecore_reset_vport_stats(edev);
319 qed_stop_iov_task(edev);
320 #ifdef CONFIG_ECORE_ZIPPED_FW
321 qed_free_stream_mem(edev);
324 ecore_resc_free(edev);
326 #ifdef CONFIG_ECORE_BINARY_FW
329 rte_free(edev->firmware);
330 edev->firmware = NULL;
333 qed_stop_iov_task(edev);
339 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
341 struct ecore_ptt *ptt = NULL;
342 struct ecore_tunnel_info *tun = &edev->tunnel;
344 memset(dev_info, 0, sizeof(struct qed_dev_info));
346 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
347 tun->vxlan.b_mode_enabled)
348 dev_info->vxlan_enable = true;
350 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
351 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
352 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
353 dev_info->gre_enable = true;
355 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
356 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
357 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
358 dev_info->geneve_enable = true;
360 dev_info->num_hwfns = edev->num_hwfns;
361 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
362 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
364 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
367 dev_info->fw_major = FW_MAJOR_VERSION;
368 dev_info->fw_minor = FW_MINOR_VERSION;
369 dev_info->fw_rev = FW_REVISION_VERSION;
370 dev_info->fw_eng = FW_ENGINEERING_VERSION;
373 dev_info->mf_mode = edev->mf_mode;
374 dev_info->tx_switching = false;
376 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
378 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
379 &dev_info->mfw_rev, NULL);
381 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
382 &dev_info->flash_size);
384 /* Workaround to allow PHY-read commands for
387 if (ECORE_IS_BB_B0(edev))
388 dev_info->flash_size = 0xffffffff;
390 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
393 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
394 &dev_info->mfw_rev, NULL);
401 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
406 memset(info, 0, sizeof(*info));
408 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
411 int max_vf_vlan_filters = 0;
413 info->num_queues = 0;
414 for_each_hwfn(edev, i)
416 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
418 if (edev->p_iov_info)
419 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
420 ECORE_ETH_VF_NUM_VLAN_FILTERS;
421 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
424 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
427 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
429 if (edev->num_hwfns > 1) {
430 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
431 info->num_queues += queues;
434 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
435 (u8 *)&info->num_vlan_filters);
437 ecore_vf_get_port_mac(&edev->hwfns[0],
438 (uint8_t *)&info->port_mac);
440 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
443 qed_fill_dev_info(edev, &info->common);
446 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
451 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
455 rte_memcpy(edev->name, name, NAME_SIZE);
456 for_each_hwfn(edev, i) {
457 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
462 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
463 void *sb_virt_addr, dma_addr_t sb_phy_addr,
464 uint16_t sb_id, enum qed_sb_type type)
466 struct ecore_hwfn *p_hwfn;
472 /* RoCE uses single engine and CMT uses two engines. When using both
473 * we force only a single engine. Storage uses only engine 0 too.
475 if (type == QED_SB_TYPE_L2_QUEUE)
476 n_hwfns = edev->num_hwfns;
480 hwfn_index = sb_id % n_hwfns;
481 p_hwfn = &edev->hwfns[hwfn_index];
482 rel_sb_id = sb_id / n_hwfns;
484 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
485 hwfn_index, rel_sb_id, sb_id);
487 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
488 sb_virt_addr, sb_phy_addr, rel_sb_id);
493 static void qed_fill_link(struct ecore_hwfn *hwfn,
494 struct qed_link_output *if_link)
496 struct ecore_mcp_link_params params;
497 struct ecore_mcp_link_state link;
498 struct ecore_mcp_link_capabilities link_caps;
501 memset(if_link, 0, sizeof(*if_link));
503 /* Prepare source inputs */
504 if (IS_PF(hwfn->p_dev)) {
505 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
507 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
508 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
511 ecore_vf_read_bulletin(hwfn, &change);
512 ecore_vf_get_link_params(hwfn, ¶ms);
513 ecore_vf_get_link_state(hwfn, &link);
514 ecore_vf_get_link_caps(hwfn, &link_caps);
517 /* Set the link parameters to pass to protocol driver */
519 if_link->link_up = true;
522 if_link->speed = link.speed;
524 if_link->duplex = QEDE_DUPLEX_FULL;
526 /* Fill up the native advertised speed cap mask */
527 if_link->adv_speed = params.speed.advertised_speeds;
529 if (params.speed.autoneg)
530 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
532 if (params.pause.autoneg || params.pause.forced_rx ||
533 params.pause.forced_tx)
534 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
536 if (params.pause.autoneg)
537 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
539 if (params.pause.forced_rx)
540 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
542 if (params.pause.forced_tx)
543 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
547 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
549 qed_fill_link(&edev->hwfns[0], if_link);
551 #ifdef CONFIG_QED_SRIOV
552 for_each_hwfn(cdev, i)
553 qed_inform_vf_link_state(&cdev->hwfns[i]);
557 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
559 struct ecore_hwfn *hwfn;
560 struct ecore_ptt *ptt;
561 struct ecore_mcp_link_params *link_params;
567 /* The link should be set only once per PF */
568 hwfn = &edev->hwfns[0];
570 ptt = ecore_ptt_acquire(hwfn);
574 link_params = ecore_mcp_get_link_params(hwfn);
575 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
576 link_params->speed.autoneg = params->autoneg;
578 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
579 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
580 link_params->pause.autoneg = true;
582 link_params->pause.autoneg = false;
583 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
584 link_params->pause.forced_rx = true;
586 link_params->pause.forced_rx = false;
587 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
588 link_params->pause.forced_tx = true;
590 link_params->pause.forced_tx = false;
593 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
595 ecore_ptt_release(hwfn, ptt);
600 void qed_link_update(struct ecore_hwfn *hwfn)
602 struct qed_link_output if_link;
604 qed_fill_link(hwfn, &if_link);
607 static int qed_drain(struct ecore_dev *edev)
609 struct ecore_hwfn *hwfn;
610 struct ecore_ptt *ptt;
616 for_each_hwfn(edev, i) {
617 hwfn = &edev->hwfns[i];
618 ptt = ecore_ptt_acquire(hwfn);
620 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
623 rc = ecore_mcp_drain(hwfn, ptt);
626 ecore_ptt_release(hwfn, ptt);
632 static int qed_nic_stop(struct ecore_dev *edev)
636 rc = ecore_hw_stop(edev);
637 for (i = 0; i < edev->num_hwfns; i++) {
638 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
640 if (p_hwfn->b_sp_dpc_enabled)
641 p_hwfn->b_sp_dpc_enabled = false;
646 static int qed_slowpath_stop(struct ecore_dev *edev)
648 #ifdef CONFIG_QED_SRIOV
656 #ifdef CONFIG_ECORE_ZIPPED_FW
657 qed_free_stream_mem(edev);
660 #ifdef CONFIG_QED_SRIOV
661 if (IS_QED_ETH_IF(edev))
662 qed_sriov_disable(edev, true);
668 ecore_resc_free(edev);
669 qed_stop_iov_task(edev);
674 static void qed_remove(struct ecore_dev *edev)
679 ecore_hw_remove(edev);
682 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
684 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
685 struct ecore_ptt *ptt;
688 ptt = ecore_ptt_acquire(hwfn);
692 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
693 ECORE_OV_DRIVER_STATE_ACTIVE :
694 ECORE_OV_DRIVER_STATE_DISABLED);
696 ecore_ptt_release(hwfn, ptt);
701 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
702 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
704 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
705 struct ecore_ptt *ptt;
711 ptt = ecore_ptt_acquire(hwfn);
713 DP_NOTICE(hwfn, true, "Can't acquire PTT\n");
717 memset(sb_dbg, 0, sizeof(*sb_dbg));
718 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
720 ecore_ptt_release(hwfn, ptt);
724 const struct qed_common_ops qed_common_ops_pass = {
725 INIT_STRUCT_FIELD(probe, &qed_probe),
726 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
727 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
728 INIT_STRUCT_FIELD(set_name, &qed_set_name),
729 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
730 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
731 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
732 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
733 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
734 INIT_STRUCT_FIELD(set_link, &qed_set_link),
735 INIT_STRUCT_FIELD(drain, &qed_drain),
736 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
737 INIT_STRUCT_FIELD(remove, &qed_remove),
738 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),