1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
7 #include <rte_common.h>
8 #include <rte_cryptodev.h>
12 #include <ethdev_driver.h>
13 #include <rte_event_eth_rx_adapter.h>
14 #include <rte_kvargs.h>
15 #include <rte_lcore.h>
17 #include <rte_malloc.h>
18 #include <rte_memory.h>
19 #include <rte_bus_vdev.h>
21 #include "ssovf_evdev.h"
22 #include "timvf_evdev.h"
23 #include "otx_cryptodev_hw_access.h"
25 static uint8_t timvf_enable_stats;
27 RTE_LOG_REGISTER_DEFAULT(otx_logtype_ssovf, NOTICE);
29 /* SSOPF Mailbox messages */
31 struct ssovf_mbox_dev_info {
32 uint64_t min_deq_timeout_ns;
33 uint64_t max_deq_timeout_ns;
34 uint32_t max_num_events;
38 ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
40 struct octeontx_mbox_hdr hdr = {0};
41 uint16_t len = sizeof(struct ssovf_mbox_dev_info);
43 hdr.coproc = SSO_COPROC;
44 hdr.msg = SSO_GET_DEV_INFO;
48 return octeontx_mbox_send(&hdr, NULL, 0, info, len);
51 struct ssovf_mbox_getwork_wait {
56 ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
58 struct octeontx_mbox_hdr hdr = {0};
59 struct ssovf_mbox_getwork_wait tmo_set;
60 uint16_t len = sizeof(struct ssovf_mbox_getwork_wait);
63 hdr.coproc = SSO_COPROC;
64 hdr.msg = SSO_SET_GETWORK_WAIT;
67 tmo_set.wait_ns = timeout_ns;
68 ret = octeontx_mbox_send(&hdr, &tmo_set, len, NULL, 0);
70 ssovf_log_err("Failed to set getwork timeout(%d)", ret);
75 struct ssovf_mbox_grp_pri {
77 uint8_t wgt_left; /* Read only */
84 ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
86 struct octeontx_mbox_hdr hdr = {0};
87 struct ssovf_mbox_grp_pri grp;
88 uint16_t len = sizeof(struct ssovf_mbox_grp_pri);
91 hdr.coproc = SSO_COPROC;
92 hdr.msg = SSO_GRP_SET_PRIORITY;
98 grp.priority = prio / 32; /* Normalize to 0 to 7 */
100 ret = octeontx_mbox_send(&hdr, &grp, len, NULL, 0);
102 ssovf_log_err("Failed to set grp=%d prio=%d", queue, prio);
107 struct ssovf_mbox_convert_ns_getworks_iter {
109 uint32_t getwork_iter;/* Get_work iterations for the given wait_ns */
113 ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
115 struct octeontx_mbox_hdr hdr = {0};
116 struct ssovf_mbox_convert_ns_getworks_iter ns2iter;
117 uint16_t len = sizeof(ns2iter);
120 hdr.coproc = SSO_COPROC;
121 hdr.msg = SSO_CONVERT_NS_GETWORK_ITER;
124 memset(&ns2iter, 0, len);
125 ns2iter.wait_ns = ns;
126 ret = octeontx_mbox_send(&hdr, &ns2iter, len, &ns2iter, len);
127 if (ret < 0 || (ret != len)) {
128 ssovf_log_err("Failed to get tmo ticks ns=%"PRId64"", ns);
132 *tmo_ticks = ns2iter.getwork_iter;
137 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
139 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
141 dev_info->driver_name = RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD);
142 dev_info->min_dequeue_timeout_ns = edev->min_deq_timeout_ns;
143 dev_info->max_dequeue_timeout_ns = edev->max_deq_timeout_ns;
144 dev_info->max_event_queues = edev->max_event_queues;
145 dev_info->max_event_queue_flows = (1ULL << 20);
146 dev_info->max_event_queue_priority_levels = 8;
147 dev_info->max_event_priority_levels = 1;
148 dev_info->max_event_ports = edev->max_event_ports;
149 dev_info->max_event_port_dequeue_depth = 1;
150 dev_info->max_event_port_enqueue_depth = 1;
151 dev_info->max_num_events = edev->max_num_events;
152 dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
153 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
154 RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES|
155 RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
156 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
157 RTE_EVENT_DEV_CAP_NONSEQ_MODE |
158 RTE_EVENT_DEV_CAP_CARRY_FLOW_ID;
163 ssovf_configure(const struct rte_eventdev *dev)
165 struct rte_event_dev_config *conf = &dev->data->dev_conf;
166 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
170 deq_tmo_ns = conf->dequeue_timeout_ns;
172 deq_tmo_ns = edev->min_deq_timeout_ns;
174 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
175 edev->is_timeout_deq = 1;
176 deq_tmo_ns = edev->min_deq_timeout_ns;
178 edev->nb_event_queues = conf->nb_event_queues;
179 edev->nb_event_ports = conf->nb_event_ports;
181 return ssovf_mbox_getwork_tmo_set(deq_tmo_ns);
185 ssovf_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
186 struct rte_event_queue_conf *queue_conf)
189 RTE_SET_USED(queue_id);
191 queue_conf->nb_atomic_flows = (1ULL << 20);
192 queue_conf->nb_atomic_order_sequences = (1ULL << 20);
193 queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
194 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
198 ssovf_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
201 RTE_SET_USED(queue_id);
205 ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
206 const struct rte_event_queue_conf *queue_conf)
209 ssovf_func_trace("queue=%d prio=%d", queue_id, queue_conf->priority);
211 return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
215 ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
216 struct rte_event_port_conf *port_conf)
218 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
220 RTE_SET_USED(port_id);
221 port_conf->new_event_threshold = edev->max_num_events;
222 port_conf->dequeue_depth = 1;
223 port_conf->enqueue_depth = 1;
224 port_conf->event_port_cfg = 0;
228 ssovf_port_release(void *port)
234 ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
235 const struct rte_event_port_conf *port_conf)
240 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
242 ssovf_func_trace("port=%d", port_id);
243 RTE_SET_USED(port_conf);
245 /* Free memory prior to re-allocation if needed */
246 if (dev->data->ports[port_id] != NULL) {
247 ssovf_port_release(dev->data->ports[port_id]);
248 dev->data->ports[port_id] = NULL;
251 /* Allocate event port memory */
252 ws = rte_zmalloc_socket("eventdev ssows",
253 sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
254 dev->data->socket_id);
256 ssovf_log_err("Failed to alloc memory for port=%d", port_id);
260 ws->base = ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
261 if (ws->base == NULL) {
263 ssovf_log_err("Failed to get hws base addr port=%d", port_id);
267 reg_off = SSOW_VHWS_OP_GET_WORK0;
268 reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
269 reg_off |= 1 << 16; /* Wait */
270 ws->getwork = ws->base + reg_off;
272 ws->lookup_mem = octeontx_fastpath_lookup_mem_get();
274 for (q = 0; q < edev->nb_event_queues; q++) {
275 ws->grps[q] = ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
276 if (ws->grps[q] == NULL) {
278 ssovf_log_err("Failed to get grp%d base addr", q);
283 dev->data->ports[port_id] = ws;
284 ssovf_log_dbg("port=%d ws=%p", port_id, ws);
289 ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
290 const uint8_t priorities[], uint16_t nb_links)
294 struct ssows *ws = port;
296 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
298 RTE_SET_USED(priorities);
300 for (link = 0; link < nb_links; link++) {
302 val |= (1ULL << 24); /* Set membership */
303 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
305 return (int)nb_links;
309 ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
314 struct ssows *ws = port;
316 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
319 for (unlink = 0; unlink < nb_unlinks; unlink++) {
320 val = queues[unlink];
321 val &= ~(1ULL << 24); /* Clear membership */
322 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
324 return (int)nb_unlinks;
328 ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
332 return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
336 ssows_dump(struct ssows *ws, FILE *f)
338 uint8_t *base = ws->base;
341 fprintf(f, "\t---------------port%d---------------\n", ws->port);
342 val = ssovf_read64(base + SSOW_VHWS_TAG);
343 fprintf(f, "\ttag=0x%x tt=%d head=%d tail=%d grp=%d index=%d tail=%d\n",
344 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
345 (int)(val >> 34) & 0x1, (int)(val >> 35) & 0x1,
346 (int)(val >> 36) & 0x3ff, (int)(val >> 48) & 0x3ff,
347 (int)(val >> 63) & 0x1);
349 val = ssovf_read64(base + SSOW_VHWS_WQP);
350 fprintf(f, "\twqp=0x%"PRIx64"\n", val);
352 val = ssovf_read64(base + SSOW_VHWS_LINKS);
353 fprintf(f, "\tindex=%d valid=%d revlink=%d tail=%d head=%d grp=%d\n",
354 (int)(val & 0x3ff), (int)(val >> 10) & 0x1,
355 (int)(val >> 11) & 0x3ff, (int)(val >> 26) & 0x1,
356 (int)(val >> 27) & 0x1, (int)(val >> 28) & 0x3ff);
358 val = ssovf_read64(base + SSOW_VHWS_PENDTAG);
359 fprintf(f, "\tptag=0x%x ptt=%d pgwi=%d pdesc=%d pgw=%d pgww=%d ps=%d\n",
360 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
361 (int)(val >> 56) & 0x1, (int)(val >> 58) & 0x1,
362 (int)(val >> 61) & 0x1, (int)(val >> 62) & 0x1,
363 (int)(val >> 63) & 0x1);
365 val = ssovf_read64(base + SSOW_VHWS_PENDWQP);
366 fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
370 ssovf_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
371 const struct rte_eth_dev *eth_dev, uint32_t *caps)
376 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
378 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
380 *caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT;
386 ssovf_eth_rx_adapter_queue_add(const struct rte_eventdev *dev,
387 const struct rte_eth_dev *eth_dev, int32_t rx_queue_id,
388 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
390 const struct octeontx_nic *nic = eth_dev->data->dev_private;
391 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
392 uint16_t free_idx = UINT16_MAX;
393 struct octeontx_rxq *rxq;
394 pki_mod_qos_t pki_qos;
395 uint8_t found = false;
399 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
403 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
406 /* eth_octeontx only supports one rq. */
407 rx_queue_id = rx_queue_id == -1 ? 0 : rx_queue_id;
408 rxq = eth_dev->data->rx_queues[rx_queue_id];
409 /* Add rxq pool to list of used pools and reduce available events. */
410 for (i = 0; i < edev->rxq_pools; i++) {
411 if (edev->rxq_pool_array[i] == (uintptr_t)rxq->pool) {
412 edev->rxq_pool_rcnt[i]++;
415 } else if (free_idx == UINT16_MAX &&
416 edev->rxq_pool_array[i] == 0) {
424 if (edev->available_events < rxq->pool->size) {
426 "Max available events %"PRIu32" requested events in rxq pool %"PRIu32"",
427 edev->available_events, rxq->pool->size);
431 if (free_idx != UINT16_MAX) {
434 old_ptr = edev->rxq_pool_array;
436 edev->rxq_pool_array = rte_realloc(
437 edev->rxq_pool_array,
438 sizeof(uint64_t) * edev->rxq_pools, 0);
439 if (edev->rxq_pool_array == NULL) {
441 edev->rxq_pool_array = old_ptr;
445 old_ptr = edev->rxq_pool_rcnt;
446 edev->rxq_pool_rcnt = rte_realloc(
448 sizeof(uint8_t) * edev->rxq_pools, 0);
449 if (edev->rxq_pool_rcnt == NULL) {
451 edev->rxq_pool_rcnt = old_ptr;
454 idx = edev->rxq_pools - 1;
457 edev->rxq_pool_array[idx] = (uintptr_t)rxq->pool;
458 edev->rxq_pool_rcnt[idx] = 1;
459 edev->available_events -= rxq->pool->size;
462 memset(&pki_qos, 0, sizeof(pki_mod_qos_t));
464 pki_qos.port_type = 0;
466 pki_qos.mmask.f_tag_type = 1;
467 pki_qos.mmask.f_port_add = 1;
468 pki_qos.mmask.f_grp_ok = 1;
469 pki_qos.mmask.f_grp_bad = 1;
470 pki_qos.mmask.f_grptag_ok = 1;
471 pki_qos.mmask.f_grptag_bad = 1;
473 pki_qos.qos_entry.tag_type = queue_conf->ev.sched_type;
474 pki_qos.qos_entry.port_add = 0;
475 pki_qos.qos_entry.ggrp_ok = queue_conf->ev.queue_id;
476 pki_qos.qos_entry.ggrp_bad = queue_conf->ev.queue_id;
477 pki_qos.qos_entry.grptag_bad = 0;
478 pki_qos.qos_entry.grptag_ok = 0;
480 ret = octeontx_pki_port_modify_qos(nic->port_id, &pki_qos);
482 ssovf_log_err("failed to modify QOS, port=%d, q=%d",
483 nic->port_id, queue_conf->ev.queue_id);
485 edev->rx_offload_flags = nic->rx_offload_flags;
486 edev->tx_offload_flags = nic->tx_offload_flags;
491 ssovf_eth_rx_adapter_queue_del(const struct rte_eventdev *dev,
492 const struct rte_eth_dev *eth_dev, int32_t rx_queue_id)
494 const struct octeontx_nic *nic = eth_dev->data->dev_private;
495 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
496 struct octeontx_rxq *rxq;
497 pki_del_qos_t pki_qos;
498 uint8_t found = false;
501 rx_queue_id = rx_queue_id == -1 ? 0 : rx_queue_id;
502 rxq = eth_dev->data->rx_queues[rx_queue_id];
503 for (i = 0; i < edev->rxq_pools; i++) {
504 if (edev->rxq_pool_array[i] == (uintptr_t)rxq->pool) {
511 edev->rxq_pool_rcnt[i]--;
512 if (edev->rxq_pool_rcnt[i] == 0)
513 edev->rxq_pool_array[i] = 0;
514 edev->available_events += rxq->pool->size;
517 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
521 pki_qos.port_type = 0;
523 memset(&pki_qos, 0, sizeof(pki_del_qos_t));
524 ret = octeontx_pki_port_delete_qos(nic->port_id, &pki_qos);
526 ssovf_log_err("Failed to delete QOS port=%d, q=%d",
527 nic->port_id, rx_queue_id);
532 ssovf_eth_rx_adapter_start(const struct rte_eventdev *dev,
533 const struct rte_eth_dev *eth_dev)
536 RTE_SET_USED(eth_dev);
543 ssovf_eth_rx_adapter_stop(const struct rte_eventdev *dev,
544 const struct rte_eth_dev *eth_dev)
547 RTE_SET_USED(eth_dev);
553 ssovf_eth_tx_adapter_caps_get(const struct rte_eventdev *dev,
554 const struct rte_eth_dev *eth_dev, uint32_t *caps)
559 ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
563 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT;
569 ssovf_eth_tx_adapter_create(uint8_t id, const struct rte_eventdev *dev)
577 ssovf_eth_tx_adapter_free(uint8_t id, const struct rte_eventdev *dev)
585 ssovf_eth_tx_adapter_queue_add(uint8_t id, const struct rte_eventdev *dev,
586 const struct rte_eth_dev *eth_dev, int32_t tx_queue_id)
590 RTE_SET_USED(eth_dev);
591 RTE_SET_USED(tx_queue_id);
596 ssovf_eth_tx_adapter_queue_del(uint8_t id, const struct rte_eventdev *dev,
597 const struct rte_eth_dev *eth_dev, int32_t tx_queue_id)
601 RTE_SET_USED(eth_dev);
602 RTE_SET_USED(tx_queue_id);
607 ssovf_eth_tx_adapter_start(uint8_t id, const struct rte_eventdev *dev)
615 ssovf_eth_tx_adapter_stop(uint8_t id, const struct rte_eventdev *dev)
624 ssovf_dump(struct rte_eventdev *dev, FILE *f)
626 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
629 /* Dump SSOWVF debug registers */
630 for (port = 0; port < edev->nb_event_ports; port++)
631 ssows_dump(dev->data->ports[port], f);
635 ssovf_start(struct rte_eventdev *dev)
637 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
643 for (i = 0; i < edev->nb_event_ports; i++) {
644 ws = dev->data->ports[i];
649 for (i = 0; i < edev->nb_event_queues; i++) {
650 /* Consume all the events through HWS0 */
651 ssows_flush_events(dev->data->ports[0], i, NULL, NULL);
653 base = ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
654 base += SSO_VHGRP_QCTL;
655 ssovf_write64(1, base); /* Enable SSO group */
658 ssovf_fastpath_fns_set(dev);
663 ssows_handle_event(void *arg, struct rte_event event)
665 struct rte_eventdev *dev = arg;
667 if (dev->dev_ops->dev_stop_flush != NULL)
668 dev->dev_ops->dev_stop_flush(dev->data->dev_id, event,
669 dev->data->dev_stop_flush_arg);
673 ssovf_stop(struct rte_eventdev *dev)
675 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
681 for (i = 0; i < edev->nb_event_ports; i++) {
682 ws = dev->data->ports[i];
687 for (i = 0; i < edev->nb_event_queues; i++) {
688 /* Consume all the events through HWS0 */
689 ssows_flush_events(dev->data->ports[0], i,
690 ssows_handle_event, dev);
692 base = ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
693 base += SSO_VHGRP_QCTL;
694 ssovf_write64(0, base); /* Disable SSO group */
699 ssovf_close(struct rte_eventdev *dev)
701 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
702 uint8_t all_queues[RTE_EVENT_MAX_QUEUES_PER_DEV];
705 for (i = 0; i < edev->nb_event_queues; i++)
708 for (i = 0; i < edev->nb_event_ports; i++)
709 ssovf_port_unlink(dev, dev->data->ports[i], all_queues,
710 edev->nb_event_queues);
715 ssovf_parsekv(const char *key __rte_unused, const char *value, void *opaque)
718 *flag = !!atoi(value);
723 ssovf_timvf_caps_get(const struct rte_eventdev *dev, uint64_t flags,
724 uint32_t *caps, const struct rte_event_timer_adapter_ops **ops)
726 return timvf_timer_adapter_caps_get(dev, flags, caps, ops,
731 ssovf_crypto_adapter_caps_get(const struct rte_eventdev *dev,
732 const struct rte_cryptodev *cdev, uint32_t *caps)
737 *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD |
738 RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA;
744 ssovf_crypto_adapter_qp_add(const struct rte_eventdev *dev,
745 const struct rte_cryptodev *cdev,
746 int32_t queue_pair_id,
747 const struct rte_event *event)
749 struct cpt_instance *qp;
754 if (queue_pair_id == -1) {
755 for (qp_id = 0; qp_id < cdev->data->nb_queue_pairs; qp_id++) {
756 qp = cdev->data->queue_pairs[qp_id];
760 qp = cdev->data->queue_pairs[queue_pair_id];
764 ssovf_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
770 ssovf_crypto_adapter_qp_del(const struct rte_eventdev *dev,
771 const struct rte_cryptodev *cdev,
772 int32_t queue_pair_id)
774 struct cpt_instance *qp;
779 if (queue_pair_id == -1) {
780 for (qp_id = 0; qp_id < cdev->data->nb_queue_pairs; qp_id++) {
781 qp = cdev->data->queue_pairs[qp_id];
785 qp = cdev->data->queue_pairs[queue_pair_id];
792 /* Initialize and register event driver with DPDK Application */
793 static struct rte_eventdev_ops ssovf_ops = {
794 .dev_infos_get = ssovf_info_get,
795 .dev_configure = ssovf_configure,
796 .queue_def_conf = ssovf_queue_def_conf,
797 .queue_setup = ssovf_queue_setup,
798 .queue_release = ssovf_queue_release,
799 .port_def_conf = ssovf_port_def_conf,
800 .port_setup = ssovf_port_setup,
801 .port_release = ssovf_port_release,
802 .port_link = ssovf_port_link,
803 .port_unlink = ssovf_port_unlink,
804 .timeout_ticks = ssovf_timeout_ticks,
806 .eth_rx_adapter_caps_get = ssovf_eth_rx_adapter_caps_get,
807 .eth_rx_adapter_queue_add = ssovf_eth_rx_adapter_queue_add,
808 .eth_rx_adapter_queue_del = ssovf_eth_rx_adapter_queue_del,
809 .eth_rx_adapter_start = ssovf_eth_rx_adapter_start,
810 .eth_rx_adapter_stop = ssovf_eth_rx_adapter_stop,
812 .eth_tx_adapter_caps_get = ssovf_eth_tx_adapter_caps_get,
813 .eth_tx_adapter_create = ssovf_eth_tx_adapter_create,
814 .eth_tx_adapter_free = ssovf_eth_tx_adapter_free,
815 .eth_tx_adapter_queue_add = ssovf_eth_tx_adapter_queue_add,
816 .eth_tx_adapter_queue_del = ssovf_eth_tx_adapter_queue_del,
817 .eth_tx_adapter_start = ssovf_eth_tx_adapter_start,
818 .eth_tx_adapter_stop = ssovf_eth_tx_adapter_stop,
820 .timer_adapter_caps_get = ssovf_timvf_caps_get,
822 .crypto_adapter_caps_get = ssovf_crypto_adapter_caps_get,
823 .crypto_adapter_queue_pair_add = ssovf_crypto_adapter_qp_add,
824 .crypto_adapter_queue_pair_del = ssovf_crypto_adapter_qp_del,
826 .dev_selftest = test_eventdev_octeontx,
829 .dev_start = ssovf_start,
830 .dev_stop = ssovf_stop,
831 .dev_close = ssovf_close
835 ssovf_vdev_probe(struct rte_vdev_device *vdev)
837 struct ssovf_info oinfo;
838 struct ssovf_mbox_dev_info info;
839 struct ssovf_evdev *edev;
840 struct rte_eventdev *eventdev;
841 static int ssovf_init_once;
846 static const char *const args[] = {
847 TIMVF_ENABLE_STATS_ARG,
851 name = rte_vdev_device_name(vdev);
852 /* More than one instance is not supported */
853 if (ssovf_init_once) {
854 ssovf_log_err("Request to create >1 %s instance", name);
858 params = rte_vdev_device_args(vdev);
859 if (params != NULL && params[0] != '\0') {
860 struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
864 "Ignoring unsupported params supplied '%s'",
867 ret = rte_kvargs_process(kvlist, TIMVF_ENABLE_STATS_ARG,
869 &timvf_enable_stats);
871 ssovf_log_err("%s: Error in timvf stats", name);
872 rte_kvargs_free(kvlist);
877 rte_kvargs_free(kvlist);
880 eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
882 if (eventdev == NULL) {
883 ssovf_log_err("Failed to create eventdev vdev %s", name);
886 eventdev->dev_ops = &ssovf_ops;
888 timvf_set_eventdevice(eventdev);
890 /* For secondary processes, the primary has done all the work */
891 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
892 ssovf_fastpath_fns_set(eventdev);
896 octeontx_mbox_init();
897 ret = ssovf_info(&oinfo);
899 ssovf_log_err("Failed to probe and validate ssovfs %d", ret);
903 edev = ssovf_pmd_priv(eventdev);
904 edev->max_event_ports = oinfo.total_ssowvfs;
905 edev->max_event_queues = oinfo.total_ssovfs;
906 edev->is_timeout_deq = 0;
908 ret = ssovf_mbox_dev_info(&info);
909 if (ret < 0 || ret != sizeof(struct ssovf_mbox_dev_info)) {
910 ssovf_log_err("Failed to get mbox devinfo %d", ret);
914 edev->min_deq_timeout_ns = info.min_deq_timeout_ns;
915 edev->max_deq_timeout_ns = info.max_deq_timeout_ns;
916 edev->max_num_events = info.max_num_events;
917 edev->available_events = info.max_num_events;
919 ssovf_log_dbg("min_deq_tmo=%" PRId64 " max_deq_tmo=%" PRId64
921 info.min_deq_timeout_ns, info.max_deq_timeout_ns,
922 info.max_num_events);
924 if (!edev->max_event_ports || !edev->max_event_queues) {
925 ssovf_log_err("Not enough eventdev resource queues=%d ports=%d",
926 edev->max_event_queues, edev->max_event_ports);
931 ssovf_log_info("Initializing %s domain=%d max_queues=%d max_ports=%d",
932 name, oinfo.domain, edev->max_event_queues,
933 edev->max_event_ports);
939 rte_event_pmd_vdev_uninit(name);
944 ssovf_vdev_remove(struct rte_vdev_device *vdev)
948 name = rte_vdev_device_name(vdev);
949 ssovf_log_info("Closing %s", name);
950 return rte_event_pmd_vdev_uninit(name);
953 static struct rte_vdev_driver vdev_ssovf_pmd = {
954 .probe = ssovf_vdev_probe,
955 .remove = ssovf_vdev_remove
958 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_OCTEONTX_PMD, vdev_ssovf_pmd);