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37 #include <sys/queue.h>
39 #include <rte_memory.h>
40 #include <rte_per_lcore.h>
41 #include <rte_launch.h>
42 #include <rte_atomic.h>
44 #include <rte_lcore.h>
52 * - The main test function performs three subtests. The first test
53 * checks that the usual inc/dec/add/sub functions are working
56 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to specific
59 * - These variables are incremented and decremented on each core at
60 * the same time in ``test_atomic_usual()``.
62 * - The function checks that once all lcores finish their function,
63 * the value of the atomic variables are still the same.
65 * - The second test verifies the behavior of "test and set" functions.
67 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
69 * - Invoke ``test_atomic_tas()`` on each lcore: before doing anything
70 * else. The cores are waiting a synchro using ``while
71 * (rte_atomic32_read(&val) == 0)`` which is triggered by the main test
72 * function. Then all cores do a
73 * ``rte_atomicXX_test_and_set()`` at the same time. If it is successful,
74 * it increments another atomic counter.
76 * - The main function checks that the atomic counter was incremented
77 * twice only (one for 16-bit, one for 32-bit and one for 64-bit values).
79 * - Test "add/sub and return"
81 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
83 * - Invoke ``test_atomic_addsub_return()`` on each lcore. Before doing
84 * anything else, the cores are waiting a synchro. Each lcore does
85 * this operation several times::
87 * tmp = rte_atomicXX_add_return(&a, 1);
88 * atomic_add(&count, tmp);
89 * tmp = rte_atomicXX_sub_return(&a, 1);
90 * atomic_sub(&count, tmp+1);
92 * - At the end of the test, the *count* value must be 0.
95 #define NUM_ATOMIC_TYPES 3
99 static rte_atomic16_t a16;
100 static rte_atomic32_t a32;
101 static rte_atomic64_t a64;
102 static rte_atomic64_t count;
103 static rte_atomic32_t synchro;
106 test_atomic_usual(__attribute__((unused)) void *arg)
110 while (rte_atomic32_read(&synchro) == 0)
113 for (i = 0; i < N; i++)
114 rte_atomic16_inc(&a16);
115 for (i = 0; i < N; i++)
116 rte_atomic16_dec(&a16);
117 for (i = 0; i < (N / 5); i++)
118 rte_atomic16_add(&a16, 5);
119 for (i = 0; i < (N / 5); i++)
120 rte_atomic16_sub(&a16, 5);
122 for (i = 0; i < N; i++)
123 rte_atomic32_inc(&a32);
124 for (i = 0; i < N; i++)
125 rte_atomic32_dec(&a32);
126 for (i = 0; i < (N / 5); i++)
127 rte_atomic32_add(&a32, 5);
128 for (i = 0; i < (N / 5); i++)
129 rte_atomic32_sub(&a32, 5);
131 for (i = 0; i < N; i++)
132 rte_atomic64_inc(&a64);
133 for (i = 0; i < N; i++)
134 rte_atomic64_dec(&a64);
135 for (i = 0; i < (N / 5); i++)
136 rte_atomic64_add(&a64, 5);
137 for (i = 0; i < (N / 5); i++)
138 rte_atomic64_sub(&a64, 5);
144 test_atomic_tas(__attribute__((unused)) void *arg)
146 while (rte_atomic32_read(&synchro) == 0)
149 if (rte_atomic16_test_and_set(&a16))
150 rte_atomic64_inc(&count);
151 if (rte_atomic32_test_and_set(&a32))
152 rte_atomic64_inc(&count);
153 if (rte_atomic64_test_and_set(&a64))
154 rte_atomic64_inc(&count);
160 test_atomic_addsub_and_return(__attribute__((unused)) void *arg)
167 while (rte_atomic32_read(&synchro) == 0)
170 for (i = 0; i < N; i++) {
171 tmp16 = rte_atomic16_add_return(&a16, 1);
172 rte_atomic64_add(&count, tmp16);
174 tmp16 = rte_atomic16_sub_return(&a16, 1);
175 rte_atomic64_sub(&count, tmp16+1);
177 tmp32 = rte_atomic32_add_return(&a32, 1);
178 rte_atomic64_add(&count, tmp32);
180 tmp32 = rte_atomic32_sub_return(&a32, 1);
181 rte_atomic64_sub(&count, tmp32+1);
183 tmp64 = rte_atomic64_add_return(&a64, 1);
184 rte_atomic64_add(&count, tmp64);
186 tmp64 = rte_atomic64_sub_return(&a64, 1);
187 rte_atomic64_sub(&count, tmp64+1);
194 * rte_atomic32_inc_and_test() would increase a 32 bits counter by one and then
195 * test if that counter is equal to 0. It would return true if the counter is 0
196 * and false if the counter is not 0. rte_atomic64_inc_and_test() could do the
197 * same thing but for a 64 bits counter.
198 * Here checks that if the 32/64 bits counter is equal to 0 after being atomically
199 * increased by one. If it is, increase the variable of "count" by one which would
200 * be checked as the result later.
204 test_atomic_inc_and_test(__attribute__((unused)) void *arg)
206 while (rte_atomic32_read(&synchro) == 0)
209 if (rte_atomic16_inc_and_test(&a16)) {
210 rte_atomic64_inc(&count);
212 if (rte_atomic32_inc_and_test(&a32)) {
213 rte_atomic64_inc(&count);
215 if (rte_atomic64_inc_and_test(&a64)) {
216 rte_atomic64_inc(&count);
223 * rte_atomicXX_dec_and_test() should decrease a 32 bits counter by one and then
224 * test if that counter is equal to 0. It should return true if the counter is 0
225 * and false if the counter is not 0.
226 * This test checks if the counter is equal to 0 after being atomically
227 * decreased by one. If it is, increase the value of "count" by one which is to
228 * be checked as the result later.
231 test_atomic_dec_and_test(__attribute__((unused)) void *arg)
233 while (rte_atomic32_read(&synchro) == 0)
236 if (rte_atomic16_dec_and_test(&a16))
237 rte_atomic64_inc(&count);
239 if (rte_atomic32_dec_and_test(&a32))
240 rte_atomic64_inc(&count);
242 if (rte_atomic64_dec_and_test(&a64))
243 rte_atomic64_inc(&count);
251 rte_atomic16_init(&a16);
252 rte_atomic32_init(&a32);
253 rte_atomic64_init(&a64);
254 rte_atomic64_init(&count);
255 rte_atomic32_init(&synchro);
257 rte_atomic16_set(&a16, 1UL << 10);
258 rte_atomic32_set(&a32, 1UL << 10);
259 rte_atomic64_set(&a64, 1ULL << 33);
261 printf("usual inc/dec/add/sub functions\n");
263 rte_eal_mp_remote_launch(test_atomic_usual, NULL, SKIP_MASTER);
264 rte_atomic32_set(&synchro, 1);
265 rte_eal_mp_wait_lcore();
266 rte_atomic32_set(&synchro, 0);
268 if (rte_atomic16_read(&a16) != 1UL << 10) {
269 printf("Atomic16 usual functions failed\n");
273 if (rte_atomic32_read(&a32) != 1UL << 10) {
274 printf("Atomic32 usual functions failed\n");
278 if (rte_atomic64_read(&a64) != 1ULL << 33) {
279 printf("Atomic64 usual functions failed\n");
283 printf("test and set\n");
285 rte_atomic64_set(&a64, 0);
286 rte_atomic32_set(&a32, 0);
287 rte_atomic16_set(&a16, 0);
288 rte_atomic64_set(&count, 0);
289 rte_eal_mp_remote_launch(test_atomic_tas, NULL, SKIP_MASTER);
290 rte_atomic32_set(&synchro, 1);
291 rte_eal_mp_wait_lcore();
292 rte_atomic32_set(&synchro, 0);
294 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
295 printf("Atomic test and set failed\n");
299 printf("add/sub and return\n");
301 rte_atomic64_set(&a64, 0);
302 rte_atomic32_set(&a32, 0);
303 rte_atomic16_set(&a16, 0);
304 rte_atomic64_set(&count, 0);
305 rte_eal_mp_remote_launch(test_atomic_addsub_and_return, NULL,
307 rte_atomic32_set(&synchro, 1);
308 rte_eal_mp_wait_lcore();
309 rte_atomic32_set(&synchro, 0);
311 if (rte_atomic64_read(&count) != 0) {
312 printf("Atomic add/sub+return failed\n");
317 * Set a64, a32 and a16 with the same value of minus "number of slave
318 * lcores", launch all slave lcores to atomically increase by one and
319 * test them respectively.
320 * Each lcore should have only one chance to increase a64 by one and
321 * then check if it is equal to 0, but there should be only one lcore
322 * that finds that it is 0. It is similar for a32 and a16.
323 * Then a variable of "count", initialized to zero, is increased by
324 * one if a64, a32 or a16 is 0 after being increased and tested
326 * We can check if "count" is finally equal to 3 to see if all slave
327 * lcores performed "atomic inc and test" right.
329 printf("inc and test\n");
331 rte_atomic64_clear(&a64);
332 rte_atomic32_clear(&a32);
333 rte_atomic16_clear(&a16);
334 rte_atomic32_clear(&synchro);
335 rte_atomic64_clear(&count);
337 rte_atomic64_set(&a64, (int64_t)(1 - (int64_t)rte_lcore_count()));
338 rte_atomic32_set(&a32, (int32_t)(1 - (int32_t)rte_lcore_count()));
339 rte_atomic16_set(&a16, (int16_t)(1 - (int16_t)rte_lcore_count()));
340 rte_eal_mp_remote_launch(test_atomic_inc_and_test, NULL, SKIP_MASTER);
341 rte_atomic32_set(&synchro, 1);
342 rte_eal_mp_wait_lcore();
343 rte_atomic32_clear(&synchro);
345 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
346 printf("Atomic inc and test failed %d\n", (int)count.cnt);
351 * Same as above, but this time we set the values to "number of slave
352 * lcores", and decrement instead of increment.
354 printf("dec and test\n");
356 rte_atomic32_clear(&synchro);
357 rte_atomic64_clear(&count);
359 rte_atomic64_set(&a64, (int64_t)(rte_lcore_count() - 1));
360 rte_atomic32_set(&a32, (int32_t)(rte_lcore_count() - 1));
361 rte_atomic16_set(&a16, (int16_t)(rte_lcore_count() - 1));
362 rte_eal_mp_remote_launch(test_atomic_dec_and_test, NULL, SKIP_MASTER);
363 rte_atomic32_set(&synchro, 1);
364 rte_eal_mp_wait_lcore();
365 rte_atomic32_clear(&synchro);
367 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
368 printf("Atomic dec and test failed\n");
375 REGISTER_TEST_COMMAND(atomic_autotest, test_atomic);