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37 #include <sys/queue.h>
39 #include <rte_memory.h>
40 #include <rte_memzone.h>
41 #include <rte_per_lcore.h>
42 #include <rte_launch.h>
43 #include <rte_atomic.h>
45 #include <rte_lcore.h>
53 * - The main test function performs three subtests. The first test
54 * checks that the usual inc/dec/add/sub functions are working
57 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to specific
60 * - These variables are incremented and decremented on each core at
61 * the same time in ``test_atomic_usual()``.
63 * - The function checks that once all lcores finish their function,
64 * the value of the atomic variables are still the same.
66 * - The second test verifies the behavior of "test and set" functions.
68 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
70 * - Invoke ``test_atomic_tas()`` on each lcore: before doing anything
71 * else. The cores are waiting a synchro using ``while
72 * (rte_atomic32_read(&val) == 0)`` which is triggered by the main test
73 * function. Then all cores do a
74 * ``rte_atomicXX_test_and_set()`` at the same time. If it is successful,
75 * it increments another atomic counter.
77 * - The main function checks that the atomic counter was incremented
78 * twice only (one for 16-bit, one for 32-bit and one for 64-bit values).
80 * - Test "add/sub and return"
82 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
84 * - Invoke ``test_atomic_addsub_return()`` on each lcore. Before doing
85 * anything else, the cores are waiting a synchro. Each lcore does
86 * this operation several times::
88 * tmp = rte_atomicXX_add_return(&a, 1);
89 * atomic_add(&count, tmp);
90 * tmp = rte_atomicXX_sub_return(&a, 1);
91 * atomic_sub(&count, tmp+1);
93 * - At the end of the test, the *count* value must be 0.
96 #define NUM_ATOMIC_TYPES 3
100 static rte_atomic16_t a16;
101 static rte_atomic32_t a32;
102 static rte_atomic64_t a64;
103 static rte_atomic64_t count;
104 static rte_atomic32_t synchro;
107 test_atomic_usual(__attribute__((unused)) void *arg)
111 while (rte_atomic32_read(&synchro) == 0)
114 for (i = 0; i < N; i++)
115 rte_atomic16_inc(&a16);
116 for (i = 0; i < N; i++)
117 rte_atomic16_dec(&a16);
118 for (i = 0; i < (N / 5); i++)
119 rte_atomic16_add(&a16, 5);
120 for (i = 0; i < (N / 5); i++)
121 rte_atomic16_sub(&a16, 5);
123 for (i = 0; i < N; i++)
124 rte_atomic32_inc(&a32);
125 for (i = 0; i < N; i++)
126 rte_atomic32_dec(&a32);
127 for (i = 0; i < (N / 5); i++)
128 rte_atomic32_add(&a32, 5);
129 for (i = 0; i < (N / 5); i++)
130 rte_atomic32_sub(&a32, 5);
132 for (i = 0; i < N; i++)
133 rte_atomic64_inc(&a64);
134 for (i = 0; i < N; i++)
135 rte_atomic64_dec(&a64);
136 for (i = 0; i < (N / 5); i++)
137 rte_atomic64_add(&a64, 5);
138 for (i = 0; i < (N / 5); i++)
139 rte_atomic64_sub(&a64, 5);
145 test_atomic_tas(__attribute__((unused)) void *arg)
147 while (rte_atomic32_read(&synchro) == 0)
150 if (rte_atomic16_test_and_set(&a16))
151 rte_atomic64_inc(&count);
152 if (rte_atomic32_test_and_set(&a32))
153 rte_atomic64_inc(&count);
154 if (rte_atomic64_test_and_set(&a64))
155 rte_atomic64_inc(&count);
161 test_atomic_addsub_and_return(__attribute__((unused)) void *arg)
168 while (rte_atomic32_read(&synchro) == 0)
171 for (i = 0; i < N; i++) {
172 tmp16 = rte_atomic16_add_return(&a16, 1);
173 rte_atomic64_add(&count, tmp16);
175 tmp16 = rte_atomic16_sub_return(&a16, 1);
176 rte_atomic64_sub(&count, tmp16+1);
178 tmp32 = rte_atomic32_add_return(&a32, 1);
179 rte_atomic64_add(&count, tmp32);
181 tmp32 = rte_atomic32_sub_return(&a32, 1);
182 rte_atomic64_sub(&count, tmp32+1);
184 tmp64 = rte_atomic64_add_return(&a64, 1);
185 rte_atomic64_add(&count, tmp64);
187 tmp64 = rte_atomic64_sub_return(&a64, 1);
188 rte_atomic64_sub(&count, tmp64+1);
195 * rte_atomic32_inc_and_test() would increase a 32 bits counter by one and then
196 * test if that counter is equal to 0. It would return true if the counter is 0
197 * and false if the counter is not 0. rte_atomic64_inc_and_test() could do the
198 * same thing but for a 64 bits counter.
199 * Here checks that if the 32/64 bits counter is equal to 0 after being atomically
200 * increased by one. If it is, increase the variable of "count" by one which would
201 * be checked as the result later.
205 test_atomic_inc_and_test(__attribute__((unused)) void *arg)
207 while (rte_atomic32_read(&synchro) == 0)
210 if (rte_atomic16_inc_and_test(&a16)) {
211 rte_atomic64_inc(&count);
213 if (rte_atomic32_inc_and_test(&a32)) {
214 rte_atomic64_inc(&count);
216 if (rte_atomic64_inc_and_test(&a64)) {
217 rte_atomic64_inc(&count);
224 * rte_atomicXX_dec_and_test() should decrease a 32 bits counter by one and then
225 * test if that counter is equal to 0. It should return true if the counter is 0
226 * and false if the counter is not 0.
227 * This test checks if the counter is equal to 0 after being atomically
228 * decreased by one. If it is, increase the value of "count" by one which is to
229 * be checked as the result later.
232 test_atomic_dec_and_test(__attribute__((unused)) void *arg)
234 while (rte_atomic32_read(&synchro) == 0)
237 if (rte_atomic16_dec_and_test(&a16))
238 rte_atomic64_inc(&count);
240 if (rte_atomic32_dec_and_test(&a32))
241 rte_atomic64_inc(&count);
243 if (rte_atomic64_dec_and_test(&a64))
244 rte_atomic64_inc(&count);
252 rte_atomic16_init(&a16);
253 rte_atomic32_init(&a32);
254 rte_atomic64_init(&a64);
255 rte_atomic64_init(&count);
256 rte_atomic32_init(&synchro);
258 rte_atomic16_set(&a16, 1UL << 10);
259 rte_atomic32_set(&a32, 1UL << 10);
260 rte_atomic64_set(&a64, 1ULL << 33);
262 printf("usual inc/dec/add/sub functions\n");
264 rte_eal_mp_remote_launch(test_atomic_usual, NULL, SKIP_MASTER);
265 rte_atomic32_set(&synchro, 1);
266 rte_eal_mp_wait_lcore();
267 rte_atomic32_set(&synchro, 0);
269 if (rte_atomic16_read(&a16) != 1UL << 10) {
270 printf("Atomic16 usual functions failed\n");
274 if (rte_atomic32_read(&a32) != 1UL << 10) {
275 printf("Atomic32 usual functions failed\n");
279 if (rte_atomic64_read(&a64) != 1ULL << 33) {
280 printf("Atomic64 usual functions failed\n");
284 printf("test and set\n");
286 rte_atomic64_set(&a64, 0);
287 rte_atomic32_set(&a32, 0);
288 rte_atomic16_set(&a16, 0);
289 rte_atomic64_set(&count, 0);
290 rte_eal_mp_remote_launch(test_atomic_tas, NULL, SKIP_MASTER);
291 rte_atomic32_set(&synchro, 1);
292 rte_eal_mp_wait_lcore();
293 rte_atomic32_set(&synchro, 0);
295 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
296 printf("Atomic test and set failed\n");
300 printf("add/sub and return\n");
302 rte_atomic64_set(&a64, 0);
303 rte_atomic32_set(&a32, 0);
304 rte_atomic16_set(&a16, 0);
305 rte_atomic64_set(&count, 0);
306 rte_eal_mp_remote_launch(test_atomic_addsub_and_return, NULL,
308 rte_atomic32_set(&synchro, 1);
309 rte_eal_mp_wait_lcore();
310 rte_atomic32_set(&synchro, 0);
312 if (rte_atomic64_read(&count) != 0) {
313 printf("Atomic add/sub+return failed\n");
318 * Set a64, a32 and a16 with the same value of minus "number of slave
319 * lcores", launch all slave lcores to atomically increase by one and
320 * test them respectively.
321 * Each lcore should have only one chance to increase a64 by one and
322 * then check if it is equal to 0, but there should be only one lcore
323 * that finds that it is 0. It is similar for a32 and a16.
324 * Then a variable of "count", initialized to zero, is increased by
325 * one if a64, a32 or a16 is 0 after being increased and tested
327 * We can check if "count" is finally equal to 3 to see if all slave
328 * lcores performed "atomic inc and test" right.
330 printf("inc and test\n");
332 rte_atomic64_clear(&a64);
333 rte_atomic32_clear(&a32);
334 rte_atomic16_clear(&a16);
335 rte_atomic32_clear(&synchro);
336 rte_atomic64_clear(&count);
338 rte_atomic64_set(&a64, (int64_t)(1 - (int64_t)rte_lcore_count()));
339 rte_atomic32_set(&a32, (int32_t)(1 - (int32_t)rte_lcore_count()));
340 rte_atomic16_set(&a16, (int16_t)(1 - (int16_t)rte_lcore_count()));
341 rte_eal_mp_remote_launch(test_atomic_inc_and_test, NULL, SKIP_MASTER);
342 rte_atomic32_set(&synchro, 1);
343 rte_eal_mp_wait_lcore();
344 rte_atomic32_clear(&synchro);
346 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
347 printf("Atomic inc and test failed %d\n", (int)count.cnt);
352 * Same as above, but this time we set the values to "number of slave
353 * lcores", and decrement instead of increment.
355 printf("dec and test\n");
357 rte_atomic32_clear(&synchro);
358 rte_atomic64_clear(&count);
360 rte_atomic64_set(&a64, (int64_t)(rte_lcore_count() - 1));
361 rte_atomic32_set(&a32, (int32_t)(rte_lcore_count() - 1));
362 rte_atomic16_set(&a16, (int16_t)(rte_lcore_count() - 1));
363 rte_eal_mp_remote_launch(test_atomic_dec_and_test, NULL, SKIP_MASTER);
364 rte_atomic32_set(&synchro, 1);
365 rte_eal_mp_wait_lcore();
366 rte_atomic32_clear(&synchro);
368 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
369 printf("Atomic dec and test failed\n");
376 REGISTER_TEST_COMMAND(atomic_autotest, test_atomic);