4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 #ifdef RTE_LIBRTE_TIMER
43 * The objective of the timer stress tests is to check that there are no
44 * race conditions in list and status management. This test launches,
45 * resets and stops the timer very often on many cores at the same
48 * - Only one timer is used for this test.
49 * - On each core, the rte_timer_manage() function is called from the main
50 * loop every 3 microseconds.
51 * - In the main loop, the timer may be reset (randomly, with a
52 * probability of 0.5 %) 100 microseconds later on a random core, or
53 * stopped (with a probability of 0.5 % also).
54 * - In callback, the timer is can be reset (randomly, with a
55 * probability of 0.5 %) 100 microseconds later on the same core or
56 * on another core (same probability), or stopped (same
61 * The objective of this test is similar to the first in that it attempts
62 * to find if there are any race conditions in the timer library. However,
63 * it is less complex in terms of operations performed and duration, as it
64 * is designed to have a predictable outcome that can be tested.
66 * - A set of timers is initialized for use by the test
67 * - All cores then simultaneously are set to schedule all the timers at
68 * the same time, so conflicts should occur.
69 * - Then there is a delay while we wait for the timers to expire
70 * - Then the master lcore calls timer_manage() and we check that all
71 * timers have had their callbacks called exactly once - no more no less.
72 * - Then we repeat the process, except after setting up the timers, we have
73 * all cores randomly reschedule them.
74 * - Again we check that the expected number of callbacks has occurred when
75 * we call timer-manage.
79 * This test performs basic functional checks of the timers. The test
80 * uses four different timers that are loaded and stopped under
81 * specific conditions in specific contexts.
83 * - Four timers are used for this test.
84 * - On each core, the rte_timer_manage() function is called from main loop
85 * every 3 microseconds.
87 * The autotest python script checks that the behavior is correct:
91 * - At initialization, timer0 is loaded by the master core, on master core
92 * in "single" mode (time = 1 second).
93 * - In the first 19 callbacks, timer0 is reloaded on the same core,
94 * then, it is explicitly stopped at the 20th call.
95 * - At t=25s, timer0 is reloaded once by timer2.
99 * - At initialization, timer1 is loaded by the master core, on the
100 * master core in "single" mode (time = 2 seconds).
101 * - In the first 9 callbacks, timer1 is reloaded on another
102 * core. After the 10th callback, timer1 is not reloaded anymore.
106 * - At initialization, timer2 is loaded by the master core, on the
107 * master core in "periodical" mode (time = 1 second).
108 * - In the callback, when t=25s, it stops timer3 and reloads timer0
109 * on the current core.
113 * - At initialization, timer3 is loaded by the master core, on
114 * another core in "periodical" mode (time = 1 second).
115 * - It is stopped at t=25s by timer2.
123 #include <inttypes.h>
124 #include <sys/queue.h>
127 #include <cmdline_parse.h>
129 #include <rte_common.h>
131 #include <rte_memory.h>
132 #include <rte_memzone.h>
133 #include <rte_launch.h>
134 #include <rte_cycles.h>
135 #include <rte_tailq.h>
137 #include <rte_per_lcore.h>
138 #include <rte_lcore.h>
139 #include <rte_atomic.h>
140 #include <rte_timer.h>
141 #include <rte_random.h>
142 #include <rte_malloc.h>
145 #define TEST_DURATION_S 20 /* in seconds */
148 #define RTE_LOGTYPE_TESTTIMER RTE_LOGTYPE_USER3
150 static volatile uint64_t end_time;
153 struct rte_timer tim;
158 static struct mytimerinfo mytiminfo[NB_TIMER];
160 static void timer_basic_cb(struct rte_timer *tim, void *arg);
163 mytimer_reset(struct mytimerinfo *timinfo, uint64_t ticks,
164 enum rte_timer_type type, unsigned tim_lcore,
167 rte_timer_reset_sync(&timinfo->tim, ticks, type, tim_lcore,
171 /* timer callback for stress tests */
173 timer_stress_cb(__attribute__((unused)) struct rte_timer *tim,
174 __attribute__((unused)) void *arg)
177 unsigned lcore_id = rte_lcore_id();
178 uint64_t hz = rte_get_timer_hz();
180 if (rte_timer_pending(tim))
184 if ((r & 0xff) == 0) {
185 mytimer_reset(&mytiminfo[0], hz, SINGLE, lcore_id,
188 else if ((r & 0xff) == 1) {
189 mytimer_reset(&mytiminfo[0], hz, SINGLE,
190 rte_get_next_lcore(lcore_id, 0, 1),
193 else if ((r & 0xff) == 2) {
194 rte_timer_stop(&mytiminfo[0].tim);
199 timer_stress_main_loop(__attribute__((unused)) void *arg)
201 uint64_t hz = rte_get_timer_hz();
202 unsigned lcore_id = rte_lcore_id();
209 /* call the timer handler on each core */
212 /* simulate the processing of a packet
213 * (1 us = 2000 cycles at 2 Ghz) */
216 /* randomly stop or reset timer */
218 lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
219 if ((r & 0xff) == 0) {
221 mytimer_reset(&mytiminfo[0], hz/10000, SINGLE, lcore_id,
224 else if ((r & 0xff) == 1) {
225 rte_timer_stop_sync(&mytiminfo[0].tim);
227 cur_time = rte_get_timer_cycles();
228 diff = end_time - cur_time;
231 lcore_id = rte_lcore_id();
232 RTE_LOG(INFO, TESTTIMER, "core %u finished\n", lcore_id);
237 static volatile int cb_count = 0;
239 /* callback for second stress test. will only be called
242 timer_stress2_cb(struct rte_timer *tim __rte_unused, void *arg __rte_unused)
247 #define NB_STRESS2_TIMERS 8192
250 timer_stress2_main_loop(__attribute__((unused)) void *arg)
252 static struct rte_timer *timers;
254 static volatile int ready = 0;
255 uint64_t delay = rte_get_timer_hz() / 4;
256 unsigned lcore_id = rte_lcore_id();
258 if (lcore_id == rte_get_master_lcore()) {
259 timers = rte_malloc(NULL, sizeof(*timers) * NB_STRESS2_TIMERS, 0);
260 if (timers == NULL) {
261 printf("Test Failed\n");
262 printf("- Cannot allocate memory for timers\n" );
265 for (i = 0; i < NB_STRESS2_TIMERS; i++)
266 rte_timer_init(&timers[i]);
273 /* have all cores schedule all timers on master lcore */
274 for (i = 0; i < NB_STRESS2_TIMERS; i++)
275 rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(),
276 timer_stress2_cb, NULL);
281 /* now check that we get the right number of callbacks */
282 if (lcore_id == rte_get_master_lcore()) {
284 if (cb_count != NB_STRESS2_TIMERS) {
285 printf("Test Failed\n");
286 printf("- Stress test 2, part 1 failed\n");
287 printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS,
297 /* now test again, just stop and restart timers at random after init*/
298 for (i = 0; i < NB_STRESS2_TIMERS; i++)
299 rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(),
300 timer_stress2_cb, NULL);
303 /* pick random timer to reset, stopping them first half the time */
304 for (i = 0; i < 100000; i++) {
305 int r = rand() % NB_STRESS2_TIMERS;
307 rte_timer_stop(&timers[r]);
308 rte_timer_reset(&timers[r], delay, SINGLE, rte_get_master_lcore(),
309 timer_stress2_cb, NULL);
314 /* now check that we get the right number of callbacks */
315 if (lcore_id == rte_get_master_lcore()) {
317 if (cb_count != NB_STRESS2_TIMERS) {
318 printf("Test Failed\n");
319 printf("- Stress test 2, part 2 failed\n");
320 printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS,
330 /* timer callback for basic tests */
332 timer_basic_cb(struct rte_timer *tim, void *arg)
334 struct mytimerinfo *timinfo = arg;
335 uint64_t hz = rte_get_timer_hz();
336 unsigned lcore_id = rte_lcore_id();
337 uint64_t cur_time = rte_get_timer_cycles();
339 if (rte_timer_pending(tim))
344 RTE_LOG(INFO, TESTTIMER,
345 "%"PRIu64": callback id=%u count=%u on core %u\n",
346 cur_time, timinfo->id, timinfo->count, lcore_id);
348 /* reload timer 0 on same core */
349 if (timinfo->id == 0 && timinfo->count < 20) {
350 mytimer_reset(timinfo, hz, SINGLE, lcore_id, timer_basic_cb);
354 /* reload timer 1 on next core */
355 if (timinfo->id == 1 && timinfo->count < 10) {
356 mytimer_reset(timinfo, hz*2, SINGLE,
357 rte_get_next_lcore(lcore_id, 0, 1),
362 /* Explicitelly stop timer 0. Once stop() called, we can even
363 * erase the content of the structure: it is not referenced
364 * anymore by any code (in case of dynamic structure, it can
366 if (timinfo->id == 0 && timinfo->count == 20) {
368 /* stop_sync() is not needed, because we know that the
369 * status of timer is only modified by this core */
371 memset(tim, 0xAA, sizeof(struct rte_timer));
375 /* stop timer3, and restart a new timer0 (it was removed 5
376 * seconds ago) for a single shot */
377 if (timinfo->id == 2 && timinfo->count == 25) {
378 rte_timer_stop_sync(&mytiminfo[3].tim);
380 /* need to reinit because structure was erased with 0xAA */
381 rte_timer_init(&mytiminfo[0].tim);
382 mytimer_reset(&mytiminfo[0], hz, SINGLE, lcore_id,
388 timer_basic_main_loop(__attribute__((unused)) void *arg)
390 uint64_t hz = rte_get_timer_hz();
391 unsigned lcore_id = rte_lcore_id();
395 /* launch all timers on core 0 */
396 if (lcore_id == rte_get_master_lcore()) {
397 mytimer_reset(&mytiminfo[0], hz, SINGLE, lcore_id,
399 mytimer_reset(&mytiminfo[1], hz*2, SINGLE, lcore_id,
401 mytimer_reset(&mytiminfo[2], hz, PERIODICAL, lcore_id,
403 mytimer_reset(&mytiminfo[3], hz, PERIODICAL,
404 rte_get_next_lcore(lcore_id, 0, 1),
410 /* call the timer handler on each core */
413 /* simulate the processing of a packet
414 * (3 us = 6000 cycles at 2 Ghz) */
417 cur_time = rte_get_timer_cycles();
418 diff = end_time - cur_time;
420 RTE_LOG(INFO, TESTTIMER, "core %u finished\n", lcore_id);
426 timer_sanity_check(void)
428 #ifdef RTE_LIBEAL_USE_HPET
429 if (eal_timer_source != EAL_TIMER_HPET) {
430 printf("Not using HPET, can't sanity check timer sources\n");
434 const uint64_t t_hz = rte_get_tsc_hz();
435 const uint64_t h_hz = rte_get_hpet_hz();
436 printf("Hertz values: TSC = %"PRIu64", HPET = %"PRIu64"\n", t_hz, h_hz);
438 const uint64_t tsc_start = rte_get_tsc_cycles();
439 const uint64_t hpet_start = rte_get_hpet_cycles();
440 rte_delay_ms(100); /* delay 1/10 second */
441 const uint64_t tsc_end = rte_get_tsc_cycles();
442 const uint64_t hpet_end = rte_get_hpet_cycles();
443 printf("Measured cycles: TSC = %"PRIu64", HPET = %"PRIu64"\n",
444 tsc_end-tsc_start, hpet_end-hpet_start);
446 const double tsc_time = (double)(tsc_end - tsc_start)/t_hz;
447 const double hpet_time = (double)(hpet_end - hpet_start)/h_hz;
448 /* get the percentage that the times differ by */
449 const double time_diff = fabs(tsc_time - hpet_time)*100/tsc_time;
450 printf("Measured time: TSC = %.4f, HPET = %.4f\n", tsc_time, hpet_time);
452 printf("Elapsed time measured by TSC and HPET differ by %f%%\n",
454 if (time_diff > 0.1) {
455 printf("Error times differ by >0.1%%");
469 /* sanity check our timer sources and timer config values */
470 if (timer_sanity_check() < 0) {
471 printf("Timer sanity checks failed\n");
475 if (rte_lcore_count() < 2) {
476 printf("not enough lcores for this test\n");
481 for (i=0; i<NB_TIMER; i++) {
482 memset(&mytiminfo[i], 0, sizeof(struct mytimerinfo));
484 rte_timer_init(&mytiminfo[i].tim);
487 /* calculate the "end of test" time */
488 cur_time = rte_get_timer_cycles();
489 hz = rte_get_timer_hz();
490 end_time = cur_time + (hz * TEST_DURATION_S);
492 /* start other cores */
493 printf("Start timer stress tests (%d seconds)\n", TEST_DURATION_S);
494 rte_eal_mp_remote_launch(timer_stress_main_loop, NULL, CALL_MASTER);
495 rte_eal_mp_wait_lcore();
497 /* stop timer 0 used for stress test */
498 rte_timer_stop_sync(&mytiminfo[0].tim);
500 /* run a second, slightly different set of stress tests */
501 printf("Start timer stress tests 2\n");
502 rte_eal_mp_remote_launch(timer_stress2_main_loop, NULL, CALL_MASTER);
503 rte_eal_mp_wait_lcore();
505 /* calculate the "end of test" time */
506 cur_time = rte_get_timer_cycles();
507 hz = rte_get_timer_hz();
508 end_time = cur_time + (hz * TEST_DURATION_S);
510 /* start other cores */
511 printf("Start timer basic tests (%d seconds)\n", TEST_DURATION_S);
512 rte_eal_mp_remote_launch(timer_basic_main_loop, NULL, CALL_MASTER);
513 rte_eal_mp_wait_lcore();
515 /* stop all timers */
516 for (i=0; i<NB_TIMER; i++) {
517 rte_timer_stop_sync(&mytiminfo[i].tim);
520 rte_timer_dump_stats();