1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Cavium, Inc
8 #include "test_order_common.h"
10 /* See http://doc.dpdk.org/guides/tools/testeventdev.html for test details */
12 static __rte_always_inline void
13 order_atq_process_stage_0(struct rte_event *const ev)
15 ev->sub_event_type = 1; /* move to stage 1 (atomic) on the same queue */
16 ev->op = RTE_EVENT_OP_FORWARD;
17 ev->sched_type = RTE_SCHED_TYPE_ATOMIC;
18 ev->event_type = RTE_EVENT_TYPE_CPU;
22 order_atq_worker(void *arg)
27 while (t->err == false) {
28 uint16_t event = rte_event_dequeue_burst(dev_id, port,
31 if (rte_atomic64_read(outstand_pkts) <= 0)
37 if (ev.sub_event_type == 0) { /* stage 0 from producer */
38 order_atq_process_stage_0(&ev);
39 while (rte_event_enqueue_burst(dev_id, port, &ev, 1)
42 } else if (ev.sub_event_type == 1) { /* stage 1 */
43 order_process_stage_1(t, &ev, nb_flows,
44 expected_flow_seq, outstand_pkts);
46 order_process_stage_invalid(t, &ev);
53 order_atq_worker_burst(void *arg)
56 struct rte_event ev[BURST_SIZE];
59 while (t->err == false) {
60 uint16_t const nb_rx = rte_event_dequeue_burst(dev_id, port, ev,
64 if (rte_atomic64_read(outstand_pkts) <= 0)
70 for (i = 0; i < nb_rx; i++) {
71 if (ev[i].sub_event_type == 0) { /*stage 0 */
72 order_atq_process_stage_0(&ev[i]);
73 } else if (ev[i].sub_event_type == 1) { /* stage 1 */
74 order_process_stage_1(t, &ev[i], nb_flows,
75 expected_flow_seq, outstand_pkts);
76 ev[i].op = RTE_EVENT_OP_RELEASE;
78 order_process_stage_invalid(t, &ev[i]);
84 enq = rte_event_enqueue_burst(dev_id, port, ev, nb_rx);
86 enq += rte_event_enqueue_burst(dev_id, port,
87 ev + enq, nb_rx - enq);
94 worker_wrapper(void *arg)
96 struct worker_data *w = arg;
97 const bool burst = evt_has_burst_mode(w->dev_id);
100 return order_atq_worker_burst(arg);
102 return order_atq_worker(arg);
106 order_atq_launch_lcores(struct evt_test *test, struct evt_options *opt)
108 return order_launch_lcores(test, opt, worker_wrapper);
113 order_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt)
117 const uint8_t nb_workers = evt_nr_active_lcores(opt->wlcores);
118 /* number of active worker cores + 1 producer */
119 const uint8_t nb_ports = nb_workers + 1;
121 ret = evt_configure_eventdev(opt, NB_QUEUES, nb_ports);
123 evt_err("failed to configure eventdev %d", opt->dev_id);
127 /* q0 all types queue configuration */
128 struct rte_event_queue_conf q0_conf = {
129 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
130 .event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES,
131 .nb_atomic_flows = opt->nb_flows,
132 .nb_atomic_order_sequences = opt->nb_flows,
134 ret = rte_event_queue_setup(opt->dev_id, 0, &q0_conf);
136 evt_err("failed to setup queue0 eventdev %d", opt->dev_id);
140 /* setup one port per worker, linking to all queues */
141 ret = order_event_dev_port_setup(test, opt, nb_workers, NB_QUEUES);
145 if (!evt_has_distributed_sched(opt->dev_id)) {
147 rte_event_dev_service_id_get(opt->dev_id, &service_id);
148 ret = evt_service_setup(service_id);
150 evt_err("No service lcore found to run event dev.");
155 ret = rte_event_dev_start(opt->dev_id);
157 evt_err("failed to start eventdev %d", opt->dev_id);
165 order_atq_opt_dump(struct evt_options *opt)
168 evt_dump("nb_evdev_queues", "%d", NB_QUEUES);
172 order_atq_capability_check(struct evt_options *opt)
174 struct rte_event_dev_info dev_info;
176 rte_event_dev_info_get(opt->dev_id, &dev_info);
177 if (dev_info.max_event_queues < NB_QUEUES || dev_info.max_event_ports <
178 order_nb_event_ports(opt)) {
179 evt_err("not enough eventdev queues=%d/%d or ports=%d/%d",
180 NB_QUEUES, dev_info.max_event_queues,
181 order_nb_event_ports(opt), dev_info.max_event_ports);
185 if (!evt_has_all_types_queue(opt->dev_id))
191 static const struct evt_test_ops order_atq = {
192 .cap_check = order_atq_capability_check,
193 .opt_check = order_opt_check,
194 .opt_dump = order_atq_opt_dump,
195 .test_setup = order_test_setup,
196 .mempool_setup = order_mempool_setup,
197 .eventdev_setup = order_atq_eventdev_setup,
198 .launch_lcores = order_atq_launch_lcores,
199 .eventdev_destroy = order_eventdev_destroy,
200 .mempool_destroy = order_mempool_destroy,
201 .test_result = order_test_result,
202 .test_destroy = order_test_destroy,
205 EVT_TEST_REGISTER(order_atq);