1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019-2021 Broadcom
6 #include <rte_common.h>
8 #include "cfa_resource_types.h"
10 #include "tf_identifier.h"
14 #include "tf_tcam_shared.h"
15 #endif /* TF_TCAM_SHARED */
17 #include "tf_if_tbl.h"
19 #include "tf_msg_common.h"
21 #define TF_DEV_P4_PARIF_MAX 16
22 #define TF_DEV_P4_PF_MASK 0xfUL
24 const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = {
25 [CFA_RESOURCE_TYPE_P4_MCG] = "mc_group",
26 [CFA_RESOURCE_TYPE_P4_ENCAP_8B] = "encap_8 ",
27 [CFA_RESOURCE_TYPE_P4_ENCAP_16B] = "encap_16",
28 [CFA_RESOURCE_TYPE_P4_ENCAP_64B] = "encap_64",
29 [CFA_RESOURCE_TYPE_P4_SP_MAC] = "sp_mac ",
30 [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4] = "sp_macv4",
31 [CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6] = "sp_macv6",
32 [CFA_RESOURCE_TYPE_P4_COUNTER_64B] = "ctr_64b ",
33 [CFA_RESOURCE_TYPE_P4_NAT_PORT] = "nat_port",
34 [CFA_RESOURCE_TYPE_P4_NAT_IPV4] = "nat_ipv4",
35 [CFA_RESOURCE_TYPE_P4_METER] = "meter ",
36 [CFA_RESOURCE_TYPE_P4_FLOW_STATE] = "flow_st ",
37 [CFA_RESOURCE_TYPE_P4_FULL_ACTION] = "full_act",
38 [CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION] = "fmt0_act",
39 [CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION] = "ext0_act",
40 [CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION] = "fmt1_act",
41 [CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION] = "fmt2_act",
42 [CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION] = "fmt3_act",
43 [CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION] = "fmt4_act",
44 [CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION] = "fmt5_act",
45 [CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION] = "fmt6_act",
46 [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_HIGH] = "l2ctx_hi",
47 [CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM_LOW] = "l2ctx_lo",
48 [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH] = "l2ctr_hi",
49 [CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_LOW] = "l2ctr_lo",
50 [CFA_RESOURCE_TYPE_P4_PROF_FUNC] = "prf_func",
51 [CFA_RESOURCE_TYPE_P4_PROF_TCAM] = "prf_tcam",
52 [CFA_RESOURCE_TYPE_P4_EM_PROF_ID] = "em_prof ",
53 [CFA_RESOURCE_TYPE_P4_EM_REC] = "em_rec ",
54 [CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID] = "wc_prof ",
55 [CFA_RESOURCE_TYPE_P4_WC_TCAM] = "wc_tcam ",
56 [CFA_RESOURCE_TYPE_P4_METER_PROF] = "mtr_prof",
57 [CFA_RESOURCE_TYPE_P4_MIRROR] = "mirror ",
58 [CFA_RESOURCE_TYPE_P4_SP_TCAM] = "sp_tcam ",
59 [CFA_RESOURCE_TYPE_P4_TBL_SCOPE] = "tb_scope",
63 * Device specific function that retrieves the MAX number of HCAPI
64 * types the device supports.
67 * Pointer to TF handle
70 * Pointer to the MAX number of CFA resource types supported
73 * - (0) if successful.
74 * - (-EINVAL) on failure.
77 tf_dev_p4_get_max_types(struct tf *tfp,
80 if (max_types == NULL || tfp == NULL)
83 *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
88 * Device specific function that retrieves a human readable
89 * string to identify a CFA resource type.
92 * Pointer to TF handle
95 * HCAPI CFA resource id
101 * - (0) if successful.
102 * - (-EINVAL) on failure.
105 tf_dev_p4_get_resource_str(struct tf *tfp __rte_unused,
106 uint16_t resource_id,
107 const char **resource_str)
109 if (resource_str == NULL)
112 if (resource_id > CFA_RESOURCE_TYPE_P4_LAST)
115 *resource_str = tf_resource_str_p4[resource_id];
121 * Device specific function that set the WC TCAM slices the
125 * Pointer to TF handle
127 * [in] num_slices_per_row
128 * The WC TCAM row slice configuration
131 * - (0) if successful.
132 * - (-EINVAL) on failure.
135 tf_dev_p4_set_tcam_slice_info(struct tf *tfp __rte_unused,
136 enum tf_wc_num_slice num_slices_per_row)
138 switch (num_slices_per_row) {
139 case TF_WC_TCAM_1_SLICE_PER_ROW:
140 case TF_WC_TCAM_2_SLICE_PER_ROW:
141 case TF_WC_TCAM_4_SLICE_PER_ROW:
142 g_wc_num_slices_per_row = num_slices_per_row;
152 * Device specific function that retrieves the TCAM slices the
156 * Pointer to TF handle
164 * [out] num_slices_per_row
165 * Pointer to the WC TCAM row slice configuration
168 * - (0) if successful.
169 * - (-EINVAL) on failure.
172 tf_dev_p4_get_tcam_slice_info(struct tf *tfp __rte_unused,
173 enum tf_tcam_tbl_type type,
175 uint16_t *num_slices_per_row)
177 /* Single slice support */
178 #define CFA_P4_WC_TCAM_SLICE_SIZE 12
180 if (type == TF_TCAM_TBL_TYPE_WC_TCAM) {
181 *num_slices_per_row = g_wc_num_slices_per_row;
182 if (key_sz > *num_slices_per_row * CFA_P4_WC_TCAM_SLICE_SIZE)
184 } else { /* for other type of tcam */
185 *num_slices_per_row = 1;
192 tf_dev_p4_map_parif(struct tf *tfp __rte_unused,
193 uint16_t parif_bitmask,
197 uint16_t sz_in_bytes)
199 uint32_t parif_pf[2] = { 0 };
200 uint32_t parif_pf_mask[2] = { 0 };
204 if (sz_in_bytes != sizeof(uint64_t))
207 for (parif = 0; parif < TF_DEV_P4_PARIF_MAX; parif++) {
208 if (parif_bitmask & (1UL << parif)) {
211 parif_pf_mask[0] |= TF_DEV_P4_PF_MASK << shift;
212 parif_pf[0] |= pf << shift;
214 shift = 4 * (parif - 8);
215 parif_pf_mask[1] |= TF_DEV_P4_PF_MASK << shift;
216 parif_pf[1] |= pf << shift;
220 tfp_memcpy(data, parif_pf, sz_in_bytes);
221 tfp_memcpy(mask, parif_pf_mask, sz_in_bytes);
227 * Device specific function that retrieves the increment
228 * required for certain table types in a shared session
234 * pointer to parms structure
237 * - (0) if successful.
238 * - (-EINVAL) on failure.
240 static int tf_dev_p4_get_shared_tbl_increment(struct tf *tfp __rte_unused,
241 struct tf_get_shared_tbl_increment_parms *parms)
243 parms->increment_cnt = 1;
246 static int tf_dev_p4_get_mailbox(void)
251 static int tf_dev_p4_word_align(uint16_t size)
253 return ((((size) + 31) >> 5) * 4);
257 * Indicates whether the index table type is SRAM managed
260 * Pointer to TF handle
263 * Truflow index table type, e.g. TF_TYPE_FULL_ACT_RECORD
266 * - (0) if the table is not managed by the SRAM manager
267 * - (1) if the table is managed by the SRAM manager
269 static bool tf_dev_p4_is_sram_managed(struct tf *tfp __rte_unused,
270 enum tf_tbl_type type __rte_unused)
275 * Truflow P4 device specific functions
277 const struct tf_dev_ops tf_dev_ops_p4_init = {
278 .tf_dev_get_max_types = tf_dev_p4_get_max_types,
279 .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
280 .tf_dev_set_tcam_slice_info = tf_dev_p4_set_tcam_slice_info,
281 .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
282 .tf_dev_alloc_ident = NULL,
283 .tf_dev_free_ident = NULL,
284 .tf_dev_search_ident = NULL,
285 .tf_dev_get_ident_resc_info = NULL,
286 .tf_dev_get_tbl_info = NULL,
287 .tf_dev_is_sram_managed = tf_dev_p4_is_sram_managed,
288 .tf_dev_alloc_ext_tbl = NULL,
289 .tf_dev_alloc_tbl = NULL,
290 .tf_dev_alloc_sram_tbl = NULL,
291 .tf_dev_free_ext_tbl = NULL,
292 .tf_dev_free_tbl = NULL,
293 .tf_dev_free_sram_tbl = NULL,
294 .tf_dev_set_tbl = NULL,
295 .tf_dev_set_ext_tbl = NULL,
296 .tf_dev_set_sram_tbl = NULL,
297 .tf_dev_get_tbl = NULL,
298 .tf_dev_get_sram_tbl = NULL,
299 .tf_dev_get_bulk_tbl = NULL,
300 .tf_dev_get_bulk_sram_tbl = NULL,
301 .tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment,
302 .tf_dev_get_tbl_resc_info = NULL,
303 .tf_dev_alloc_tcam = NULL,
304 .tf_dev_free_tcam = NULL,
305 .tf_dev_alloc_search_tcam = NULL,
306 .tf_dev_set_tcam = NULL,
307 .tf_dev_get_tcam = NULL,
308 .tf_dev_get_tcam_resc_info = NULL,
309 .tf_dev_insert_int_em_entry = NULL,
310 .tf_dev_delete_int_em_entry = NULL,
311 .tf_dev_insert_ext_em_entry = NULL,
312 .tf_dev_delete_ext_em_entry = NULL,
313 .tf_dev_get_em_resc_info = NULL,
314 .tf_dev_alloc_tbl_scope = NULL,
315 .tf_dev_map_tbl_scope = NULL,
316 .tf_dev_map_parif = NULL,
317 .tf_dev_free_tbl_scope = NULL,
318 .tf_dev_set_if_tbl = NULL,
319 .tf_dev_get_if_tbl = NULL,
320 .tf_dev_set_global_cfg = NULL,
321 .tf_dev_get_global_cfg = NULL,
322 .tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
323 .tf_dev_word_align = NULL,
327 * Truflow P4 device specific functions
329 const struct tf_dev_ops tf_dev_ops_p4 = {
330 .tf_dev_get_max_types = tf_dev_p4_get_max_types,
331 .tf_dev_get_resource_str = tf_dev_p4_get_resource_str,
332 .tf_dev_set_tcam_slice_info = tf_dev_p4_set_tcam_slice_info,
333 .tf_dev_get_tcam_slice_info = tf_dev_p4_get_tcam_slice_info,
334 .tf_dev_alloc_ident = tf_ident_alloc,
335 .tf_dev_free_ident = tf_ident_free,
336 .tf_dev_search_ident = tf_ident_search,
337 .tf_dev_get_ident_resc_info = tf_ident_get_resc_info,
338 .tf_dev_get_tbl_info = NULL,
339 .tf_dev_is_sram_managed = tf_dev_p4_is_sram_managed,
340 .tf_dev_alloc_tbl = tf_tbl_alloc,
341 .tf_dev_alloc_ext_tbl = tf_tbl_ext_alloc,
342 .tf_dev_alloc_sram_tbl = tf_tbl_alloc,
343 .tf_dev_free_tbl = tf_tbl_free,
344 .tf_dev_free_ext_tbl = tf_tbl_ext_free,
345 .tf_dev_free_sram_tbl = tf_tbl_free,
346 .tf_dev_set_tbl = tf_tbl_set,
347 .tf_dev_set_ext_tbl = tf_tbl_ext_common_set,
348 .tf_dev_set_sram_tbl = NULL,
349 .tf_dev_get_tbl = tf_tbl_get,
350 .tf_dev_get_sram_tbl = NULL,
351 .tf_dev_get_bulk_tbl = tf_tbl_bulk_get,
352 .tf_dev_get_bulk_sram_tbl = NULL,
353 .tf_dev_get_shared_tbl_increment = tf_dev_p4_get_shared_tbl_increment,
354 .tf_dev_get_tbl_resc_info = tf_tbl_get_resc_info,
355 #ifdef TF_TCAM_SHARED
356 .tf_dev_alloc_tcam = tf_tcam_shared_alloc,
357 .tf_dev_free_tcam = tf_tcam_shared_free,
358 .tf_dev_set_tcam = tf_tcam_shared_set,
359 .tf_dev_get_tcam = tf_tcam_shared_get,
360 .tf_dev_move_tcam = tf_tcam_shared_move_p4,
361 .tf_dev_clear_tcam = tf_tcam_shared_clear,
362 #else /* !TF_TCAM_SHARED */
363 .tf_dev_alloc_tcam = tf_tcam_alloc,
364 .tf_dev_free_tcam = tf_tcam_free,
365 .tf_dev_set_tcam = tf_tcam_set,
366 .tf_dev_get_tcam = tf_tcam_get,
368 .tf_dev_alloc_search_tcam = tf_tcam_alloc_search,
369 .tf_dev_get_tcam_resc_info = tf_tcam_get_resc_info,
370 .tf_dev_insert_int_em_entry = tf_em_insert_int_entry,
371 .tf_dev_delete_int_em_entry = tf_em_delete_int_entry,
372 .tf_dev_insert_ext_em_entry = tf_em_insert_ext_entry,
373 .tf_dev_delete_ext_em_entry = tf_em_delete_ext_entry,
374 .tf_dev_get_em_resc_info = tf_em_get_resc_info,
375 .tf_dev_alloc_tbl_scope = tf_em_ext_common_alloc,
376 .tf_dev_map_tbl_scope = tf_em_ext_map_tbl_scope,
377 .tf_dev_map_parif = tf_dev_p4_map_parif,
378 .tf_dev_free_tbl_scope = tf_em_ext_common_free,
379 .tf_dev_set_if_tbl = tf_if_tbl_set,
380 .tf_dev_get_if_tbl = tf_if_tbl_get,
381 .tf_dev_set_global_cfg = tf_global_cfg_set,
382 .tf_dev_get_global_cfg = tf_global_cfg_get,
383 .tf_dev_get_mailbox = tf_dev_p4_get_mailbox,
384 .tf_dev_word_align = tf_dev_p4_word_align,
385 .tf_dev_cfa_key_hash = hcapi_cfa_p4_key_hash