/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
#define EFSYS_HAS_UINT64 1
#define EFSYS_USE_UINT64 1
-#define EFSYS_HAS_SSE2_M128 1
+/*
+ * __SSE2__ is defined by a compiler if target architecture supports
+ * Streaming SIMD Extensions 2 (SSE2). __m128i is a data type used
+ * by the extension instructions.
+ */
+#if defined(__SSE2__)
+#define EFSYS_HAS_UINT128 1
+typedef __m128i efsys_uint128_t;
+/*
+ * __int128 and unsigned __int128 are compiler extensions (built-in types).
+ * __SIZEOF_INT128__ is defined by the compiler if these data types are
+ * available.
+ */
+#elif defined(__SIZEOF_INT128__)
+#define EFSYS_HAS_UINT128 1
+typedef unsigned __int128 efsys_uint128_t;
+#else
+#error Unsigned 128-bit width integers support is required
+#endif
#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
#define EFSYS_IS_BIG_ENDIAN 1
#define EFSYS_OPT_DESC_PROXY 0
+#define EFSYS_OPT_MAE 1
+
+#define EFSYS_OPT_VIRTIO 0
+
/* ID */
typedef struct __efsys_identifier_s efsys_identifier_t;
#define EFSYS_MEM_READO(_esmp, _offset, _eop) \
do { \
volatile uint8_t *_base = (_esmp)->esm_base; \
- volatile __m128i *_addr; \
+ volatile efsys_uint128_t *_addr; \
\
_NOTE(CONSTANTCONDITION); \
SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
sizeof(efx_oword_t))); \
\
- _addr = (volatile __m128i *)(_base + (_offset)); \
+ _addr = (volatile efsys_uint128_t *)(_base + (_offset));\
(_eop)->eo_u128[0] = _addr[0]; \
\
EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
#define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
do { \
volatile uint8_t *_base = (_esmp)->esm_base; \
- volatile __m128i *_addr; \
+ volatile efsys_uint128_t *_addr; \
\
_NOTE(CONSTANTCONDITION); \
SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
uint32_t, (_eop)->eo_u32[1], \
uint32_t, (_eop)->eo_u32[0]); \
\
- _addr = (volatile __m128i *)(_base + (_offset)); \
+ _addr = (volatile efsys_uint128_t *)(_base + (_offset));\
_addr[0] = (_eop)->eo_u128[0]; \
\
_NOTE(CONSTANTCONDITION); \
#define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
do { \
volatile uint8_t *_base = (_esbp)->esb_base; \
- volatile __m128i *_addr; \
+ volatile efsys_uint128_t *_addr; \
\
_NOTE(CONSTANTCONDITION); \
SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
if (_lock) \
SFC_BAR_LOCK(_esbp); \
\
- _addr = (volatile __m128i *)(_base + (_offset)); \
+ _addr = (volatile efsys_uint128_t *)(_base + (_offset));\
rte_rmb(); \
/* There is no rte_read128_relaxed() yet */ \
(_eop)->eo_u128[0] = _addr[0]; \
#define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
do { \
volatile uint8_t *_base = (_esbp)->esb_base; \
- volatile __m128i *_addr; \
+ volatile efsys_uint128_t *_addr; \
\
_NOTE(CONSTANTCONDITION); \
SFC_EFX_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \
uint32_t, (_eop)->eo_u32[1], \
uint32_t, (_eop)->eo_u32[0]); \
\
- _addr = (volatile __m128i *)(_base + (_offset)); \
+ _addr = (volatile efsys_uint128_t *)(_base + (_offset));\
/* There is no rte_write128_relaxed() yet */ \
_addr[0] = (_eop)->eo_u128[0]; \
rte_wmb(); \