#ifndef __SSOVF_EVDEV_H__
#define __SSOVF_EVDEV_H__
+#include <rte_event_eth_tx_adapter.h>
#include <rte_eventdev_pmd_vdev.h>
#include <rte_io.h>
#include <octeontx_mbox.h>
#include <octeontx_ethdev.h>
+#include "octeontx_rxtx.h"
+
+#define SSO_RX_ADPTR_ENQ_FASTPATH_FUNC OCCTX_RX_FASTPATH_MODES
+#define SSO_TX_ADPTR_ENQ_FASTPATH_FUNC OCCTX_TX_FASTPATH_MODES
+
#define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
#define SSOVF_LOG(level, fmt, args...) \
#define ssovf_log_dbg(fmt, ...) SSOVF_LOG(DEBUG, fmt, ##__VA_ARGS__)
#define ssovf_log_err(fmt, ...) SSOVF_LOG(ERR, fmt, ##__VA_ARGS__)
#define ssovf_func_trace ssovf_log_dbg
+#define ssovf_log_selftest ssovf_log_info
#define SSO_MAX_VHGRP (64)
#define SSO_MAX_VHWS (32)
#define SSO_GRP_SET_PRIORITY 0x8
/*
- * In Cavium OcteonTX SoC, all accesses to the device registers are
+ * In Cavium OCTEON TX SoC, all accesses to the device registers are
* implictly strongly ordered. So, The relaxed version of IO operation is
* safe to use with out any IO memory barriers.
*/
} while (0)
#endif
+struct ssovf_info {
+ uint16_t domain; /* Domain id */
+ uint8_t total_ssovfs; /* Total sso groups available in domain */
+ uint8_t total_ssowvfs;/* Total sso hws available in domain */
+};
+
+enum ssovf_type {
+ OCTEONTX_SSO_GROUP, /* SSO group vf */
+ OCTEONTX_SSO_HWS, /* SSO hardware workslot vf */
+};
struct ssovf_evdev {
+ OFFLOAD_FLAGS; /*Sequence should not be changed */
uint8_t max_event_queues;
uint8_t max_event_ports;
uint8_t is_timeout_deq;
uint32_t min_deq_timeout_ns;
uint32_t max_deq_timeout_ns;
int32_t max_num_events;
+ uint32_t available_events;
+ uint16_t rxq_pools;
+ uint64_t *rxq_pool_array;
+ uint8_t *rxq_pool_rcnt;
+ uint16_t tim_ring_cnt;
+ uint16_t *tim_ring_ids;
} __rte_cache_aligned;
/* Event port aka HWS */
uint8_t *getwork;
uint8_t *grps[SSO_MAX_VHGRP];
uint8_t port;
+ void *lookup_mem;
} __rte_cache_aligned;
static inline struct ssovf_evdev *
const struct rte_event ev[], uint16_t nb_events);
uint16_t ssows_enq_fwd_burst(void *port,
const struct rte_event ev[], uint16_t nb_events);
-uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks);
-uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
- uint16_t nb_events, uint64_t timeout_ticks);
-uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
- uint64_t timeout_ticks);
-uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
- uint16_t nb_events, uint64_t timeout_ticks);
-void ssows_flush_events(struct ssows *ws, uint8_t queue_id);
+typedef void (*ssows_handle_event_t)(void *arg, struct rte_event ev);
+void ssows_flush_events(struct ssows *ws, uint8_t queue_id,
+ ssows_handle_event_t fn, void *arg);
void ssows_reset(struct ssows *ws);
+int ssovf_info(struct ssovf_info *info);
+void *ssovf_bar(enum ssovf_type, uint8_t id, uint8_t bar);
+int test_eventdev_octeontx(void);
+void ssovf_fastpath_fns_set(struct rte_eventdev *dev);
+void *octeontx_fastpath_lookup_mem_get(void);
#endif /* __SSOVF_EVDEV_H__ */