{
int ret;
- axgbe_set_bit(AXGBE_LINK_INIT, &pdata->dev_state);
+ rte_bit_relaxed_set32(AXGBE_LINK_INIT, &pdata->dev_state);
pdata->link_check = rte_get_timer_cycles();
ret = pdata->phy_if.phy_impl.an_config(pdata);
ret = __axgbe_phy_config_aneg(pdata);
if (ret)
- axgbe_set_bit(AXGBE_LINK_ERR, &pdata->dev_state);
+ rte_bit_relaxed_set32(AXGBE_LINK_ERR, &pdata->dev_state);
else
- axgbe_clear_bit(AXGBE_LINK_ERR, &pdata->dev_state);
+ rte_bit_relaxed_clear32(AXGBE_LINK_ERR, &pdata->dev_state);
pthread_mutex_unlock(&pdata->an_mutex);
unsigned int reg = 0;
unsigned long autoneg_start_time;
- if (axgbe_test_bit(AXGBE_LINK_ERR, &pdata->dev_state)) {
+ if (rte_bit_relaxed_get32(AXGBE_LINK_ERR, &pdata->dev_state)) {
pdata->phy.link = 0;
goto adjust_link;
}
}
}
axgbe_phy_status_result(pdata);
- if (axgbe_test_bit(AXGBE_LINK_INIT, &pdata->dev_state))
- axgbe_clear_bit(AXGBE_LINK_INIT, &pdata->dev_state);
+ if (rte_bit_relaxed_get32(AXGBE_LINK_INIT, &pdata->dev_state))
+ rte_bit_relaxed_clear32(AXGBE_LINK_INIT,
+ &pdata->dev_state);
} else {
- if (axgbe_test_bit(AXGBE_LINK_INIT, &pdata->dev_state)) {
+ if (rte_bit_relaxed_get32(AXGBE_LINK_INIT, &pdata->dev_state)) {
axgbe_check_link_timeout(pdata);
if (link_aneg)