/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2018 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
* All rights reserved.
*/
#include <rte_pci.h>
#include <rte_bus_pci.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_memory.h>
#include <rte_lcore.h>
#include <rte_spinlock.h>
uint16_t auto_pam4_link_speeds;
uint16_t support_pam4_auto_speeds;
uint8_t req_signal_mode;
+ uint8_t module_status;
};
#define BNXT_COS_QUEUE_COUNT 8
struct bnxt_vnic_info *vnic;
};
+#define BNXT_PTP_RX_PND_CNT 10
#define BNXT_PTP_FLAGS_PATH_TX 0x0
#define BNXT_PTP_FLAGS_PATH_RX 0x1
#define BNXT_PTP_FLAGS_CURRENT_TIME 0x2
+#define BNXT_PTP_CURRENT_TIME_MASK 0xFFFF00000000ULL
struct bnxt_ptp_cfg {
#define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400
/* On Thor, the Rx timestamp is present in the Rx completion record */
uint64_t rx_timestamp;
+ uint64_t current_time;
};
struct bnxt_coal {
#define BNXT_MAX_RSS_CTXTS_P5 \
(BNXT_RSS_TBL_SIZE_P5 / BNXT_RSS_ENTRIES_PER_CTX_P5)
-#define BNXT_MAX_TC 8
-#define BNXT_MAX_QUEUE 8
-#define BNXT_MAX_TC_Q (BNXT_MAX_TC + 1)
+#define BNXT_MAX_QUEUE 8
+#define BNXT_MAX_TQM_SP_RINGS 1
+#define BNXT_MAX_TQM_FP_LEGACY_RINGS 8
+#define BNXT_MAX_TQM_FP_RINGS 9
+#define BNXT_MAX_TQM_LEGACY_RINGS \
+ (BNXT_MAX_TQM_SP_RINGS + BNXT_MAX_TQM_FP_LEGACY_RINGS)
+#define BNXT_MAX_TQM_RINGS \
+ (BNXT_MAX_TQM_SP_RINGS + BNXT_MAX_TQM_FP_RINGS)
+#define BNXT_BACKING_STORE_CFG_LEGACY_LEN 256
+#define BNXT_BACKING_STORE_CFG_LEN \
+ sizeof(struct hwrm_func_backing_store_cfg_input)
#define BNXT_PAGE_SHFT 12
#define BNXT_PAGE_SIZE (1 << BNXT_PAGE_SHFT)
#define MAX_CTX_PAGES (BNXT_PAGE_SIZE / 8)
struct bnxt_ctx_pg_info cq_mem;
struct bnxt_ctx_pg_info vnic_mem;
struct bnxt_ctx_pg_info stat_mem;
- struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TC_Q];
+ struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TQM_RINGS];
};
struct bnxt_ctx_mem_buf_info {
DEV_RX_OFFLOAD_SCATTER | \
DEV_RX_OFFLOAD_RSS_HASH)
-#define MAX_TABLE_SUPPORT 4
-#define MAX_DIR_SUPPORT 2
-struct bnxt_dmabuf_info {
- uint32_t entry_num;
- int fd[MAX_DIR_SUPPORT][MAX_TABLE_SUPPORT];
-};
-
#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
struct bnxt_flow_stat_info {
struct bnxt_ctx_mem_buf_info tx_fc_out_tbl;
};
+struct bnxt_ring_stats {
+ /* Number of transmitted unicast packets */
+ uint64_t tx_ucast_pkts;
+ /* Number of transmitted multicast packets */
+ uint64_t tx_mcast_pkts;
+ /* Number of transmitted broadcast packets */
+ uint64_t tx_bcast_pkts;
+ /* Number of packets discarded in transmit path */
+ uint64_t tx_discard_pkts;
+ /* Number of packets in transmit path with error */
+ uint64_t tx_error_pkts;
+ /* Number of transmitted bytes for unicast traffic */
+ uint64_t tx_ucast_bytes;
+ /* Number of transmitted bytes for multicast traffic */
+ uint64_t tx_mcast_bytes;
+ /* Number of transmitted bytes for broadcast traffic */
+ uint64_t tx_bcast_bytes;
+ /* Number of received unicast packets */
+ uint64_t rx_ucast_pkts;
+ /* Number of received multicast packets */
+ uint64_t rx_mcast_pkts;
+ /* Number of received broadcast packets */
+ uint64_t rx_bcast_pkts;
+ /* Number of packets discarded in receive path */
+ uint64_t rx_discard_pkts;
+ /* Number of packets in receive path with errors */
+ uint64_t rx_error_pkts;
+ /* Number of received bytes for unicast traffic */
+ uint64_t rx_ucast_bytes;
+ /* Number of received bytes for multicast traffic */
+ uint64_t rx_mcast_bytes;
+ /* Number of received bytes for broadcast traffic */
+ uint64_t rx_bcast_bytes;
+ /* Number of aggregated unicast packets */
+ uint64_t rx_agg_pkts;
+ /* Number of aggregated unicast bytes */
+ uint64_t rx_agg_bytes;
+ /* Number of aggregation events */
+ uint64_t rx_agg_events;
+ /* Number of aborted aggregations */
+ uint64_t rx_agg_aborts;
+};
+
struct bnxt {
void *bar0;
#define BNXT_FLAG_RX_VECTOR_PKT_MODE BIT(24)
#define BNXT_FLAG_FLOW_XSTATS_EN BIT(25)
#define BNXT_FLAG_DFLT_MAC_SET BIT(26)
-#define BNXT_FLAG_TRUFLOW_EN BIT(27)
-#define BNXT_FLAG_GFID_ENABLE BIT(28)
+#define BNXT_FLAG_GFID_ENABLE BIT(27)
+#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(28)
+#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(29)
+#define BNXT_RFS_NEEDS_VNIC(bp) ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
#define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF)
#define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_P5(bp))
#define BNXT_FLOW_XSTATS_EN(bp) ((bp)->flags & BNXT_FLAG_FLOW_XSTATS_EN)
#define BNXT_HAS_DFLT_MAC_SET(bp) ((bp)->flags & BNXT_FLAG_DFLT_MAC_SET)
-#define BNXT_TRUFLOW_EN(bp) ((bp)->flags & BNXT_FLAG_TRUFLOW_EN)
#define BNXT_GFID_ENABLED(bp) ((bp)->flags & BNXT_FLAG_GFID_ENABLE)
+ uint32_t flags2;
+#define BNXT_FLAGS2_PTP_TIMESYNC_ENABLED BIT(0)
+#define BNXT_FLAGS2_PTP_ALARM_SCHEDULED BIT(1)
+#define BNXT_FLAGS2_ACCUM_STATS_EN BIT(2)
+#define BNXT_P5_PTP_TIMESYNC_ENABLED(bp) \
+ ((bp)->flags2 & BNXT_FLAGS2_PTP_TIMESYNC_ENABLED)
+#define BNXT_ACCUM_STATS_EN(bp) \
+ ((bp)->flags2 & BNXT_FLAGS2_ACCUM_STATS_EN)
+
uint16_t chip_num;
#define CHIP_NUM_58818 0xd818
#define BNXT_CHIP_SR2(bp) ((bp)->chip_num == CHIP_NUM_58818)
#define BNXT_FW_CAP_ADV_FLOW_MGMT BIT(5)
#define BNXT_FW_CAP_ADV_FLOW_COUNTERS BIT(6)
#define BNXT_FW_CAP_LINK_ADMIN BIT(7)
+#define BNXT_FW_CAP_TRUFLOW_EN BIT(8)
+#define BNXT_TRUFLOW_EN(bp) ((bp)->fw_cap & BNXT_FW_CAP_TRUFLOW_EN)
pthread_mutex_t flow_lock;
uint32_t vnic_cap_flags;
#define BNXT_VNIC_CAP_COS_CLASSIFY BIT(0)
#define BNXT_VNIC_CAP_OUTER_RSS BIT(1)
+#define BNXT_VNIC_CAP_RX_CMPL_V2 BIT(2)
unsigned int rx_nr_rings;
unsigned int rx_cp_nr_rings;
unsigned int rx_num_qs_per_vnic;
uint32_t max_ring_grps;
struct bnxt_ring_grp_info *grp_info;
- unsigned int nr_vnics;
+ uint16_t nr_vnics;
#define BNXT_GET_DEFAULT_VNIC(bp) (&(bp)->vnic_info[0])
struct bnxt_vnic_info *vnic_info;
* health_check_lock
*/
pthread_mutex_t health_check_lock;
+ /* synchronize between dev_stop/dev_close_op and
+ * error recovery thread triggered as part of
+ * HWRM_ASYNC_EVENT_CMPL_EVENT_ID_RESET_NOTIFY
+ */
+ pthread_mutex_t err_recovery_lock;
uint16_t max_req_len;
uint16_t max_resp_len;
uint16_t hwrm_max_ext_req_len;
uint16_t port_svif;
struct tf tfp;
- struct bnxt_dmabuf_info dmabuf;
+ struct tf tfp_shared;
struct bnxt_ulp_context *ulp_ctx;
struct bnxt_flow_stat_info *flow_stat;
uint16_t max_num_kflows;
+ uint8_t app_id;
uint16_t tx_cfa_action;
+ struct bnxt_ring_stats *prev_rx_ring_stats;
+ struct bnxt_ring_stats *prev_tx_ring_stats;
};
static
bp->max_stat_ctx / 2U);
}
+ /*
+ * RSS table size in Thor is 512.
+ * Cap max Rx rings to the same value for RSS.
+ */
+ if (BNXT_CHIP_P5(bp))
+ max_rx_rings = RTE_MIN(max_rx_rings, BNXT_RSS_TBL_SIZE_P5);
+
max_tx_rings = RTE_MIN(max_tx_rings, max_rx_rings);
if (max_cp_rings > BNXT_NUM_ASYNC_CPR(bp))
max_cp_rings -= BNXT_NUM_ASYNC_CPR(bp);
struct bnxt_representor *bp;
};
+#define I2C_DEV_ADDR_A0 0xa0
+#define I2C_DEV_ADDR_A2 0xa2
+#define SFF_DIAG_SUPPORT_OFFSET 0x5c
+#define SFF_MODULE_ID_SFP 0x3
+#define SFF_MODULE_ID_QSFP 0xc
+#define SFF_MODULE_ID_QSFP_PLUS 0xd
+#define SFF_MODULE_ID_QSFP28 0x11
+#define SFF8636_FLATMEM_OFFSET 0x2
+#define SFF8636_FLATMEM_MASK 0x4
+#define SFF8636_OPT_PAGES_OFFSET 0xc3
+#define SFF8636_PAGE1_MASK 0x40
+#define SFF8636_PAGE2_MASK 0x80
+#define BNXT_MAX_PHY_I2C_RESP_SIZE 64
+
int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
int bnxt_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete,
bool exp_link_status);
bnxt_ulp_create_vfr_default_rules(struct rte_eth_dev *vfr_ethdev);
int32_t
bnxt_ulp_delete_vfr_default_rules(struct bnxt_representor *vfr);
+void bnxt_get_iface_mac(uint16_t port, enum bnxt_ulp_intf_type type,
+ uint8_t *mac, uint8_t *parent_mac);
uint16_t bnxt_get_vnic_id(uint16_t port, enum bnxt_ulp_intf_type type);
+uint16_t bnxt_get_parent_vnic_id(uint16_t port, enum bnxt_ulp_intf_type type);
+struct bnxt *bnxt_get_bp(uint16_t port);
uint16_t bnxt_get_svif(uint16_t port_id, bool func_svif,
enum bnxt_ulp_intf_type type);
uint16_t bnxt_get_fw_func_id(uint16_t port, enum bnxt_ulp_intf_type type);
int bnxt_flow_stats_req(struct bnxt *bp);
int bnxt_flow_stats_cnt(struct bnxt *bp);
uint32_t bnxt_get_speed_capabilities(struct bnxt *bp);
+int bnxt_flow_ops_get_op(struct rte_eth_dev *dev,
+ const struct rte_flow_ops **ops);
-int
-bnxt_filter_ctrl_op(struct rte_eth_dev *dev,
- enum rte_filter_type filter_type,
- enum rte_filter_op filter_op, void *arg);
#endif