/*
*... and the PCI ID Table itself ...
*/
-#include "t4_pci_id_tbl.h"
-
-#define CXGBE_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT |\
- DEV_TX_OFFLOAD_IPV4_CKSUM |\
- DEV_TX_OFFLOAD_UDP_CKSUM |\
- DEV_TX_OFFLOAD_TCP_CKSUM |\
- DEV_TX_OFFLOAD_TCP_TSO)
-
-#define CXGBE_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_STRIP |\
- DEV_RX_OFFLOAD_CRC_STRIP |\
- DEV_RX_OFFLOAD_IPV4_CKSUM |\
- DEV_RX_OFFLOAD_JUMBO_FRAME |\
- DEV_RX_OFFLOAD_UDP_CKSUM |\
- DEV_RX_OFFLOAD_TCP_CKSUM)
+#include "base/t4_pci_id_tbl.h"
uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
}
int cxgbe_dev_link_update(struct rte_eth_dev *eth_dev,
- __rte_unused int wait_to_complete)
+ int wait_to_complete)
{
struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
struct adapter *adapter = pi->adapter;
struct sge *s = &adapter->sge;
struct rte_eth_link new_link = { 0 };
- unsigned int work_done, budget = 4;
+ unsigned int i, work_done, budget = 32;
+ u8 old_link = pi->link_cfg.link_ok;
- cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
+ for (i = 0; i < CXGBE_LINK_STATUS_POLL_CNT; i++) {
+ cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
+
+ /* Exit if link status changed or always forced up */
+ if (pi->link_cfg.link_ok != old_link ||
+ cxgbe_force_linkup(adapter))
+ break;
+
+ if (!wait_to_complete)
+ break;
- new_link.link_status = force_linkup(adapter) ?
+ rte_delay_ms(CXGBE_LINK_STATUS_POLL_MS);
+ }
+
+ new_link.link_status = cxgbe_force_linkup(adapter) ?
ETH_LINK_UP : pi->link_cfg.link_ok;
new_link.link_autoneg = pi->link_cfg.autoneg;
new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
return rte_eth_linkstatus_set(eth_dev, &new_link);
}
+/**
+ * Set device link up.
+ */
+int cxgbe_dev_set_link_up(struct rte_eth_dev *dev)
+{
+ struct port_info *pi = (struct port_info *)(dev->data->dev_private);
+ struct adapter *adapter = pi->adapter;
+ unsigned int work_done, budget = 32;
+ struct sge *s = &adapter->sge;
+ int ret;
+
+ /* Flush all link events */
+ cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
+
+ /* If link already up, nothing to do */
+ if (pi->link_cfg.link_ok)
+ return 0;
+
+ ret = cxgbe_set_link_status(pi, true);
+ if (ret)
+ return ret;
+
+ cxgbe_dev_link_update(dev, 1);
+ return 0;
+}
+
+/**
+ * Set device link down.
+ */
+int cxgbe_dev_set_link_down(struct rte_eth_dev *dev)
+{
+ struct port_info *pi = (struct port_info *)(dev->data->dev_private);
+ struct adapter *adapter = pi->adapter;
+ unsigned int work_done, budget = 32;
+ struct sge *s = &adapter->sge;
+ int ret;
+
+ /* Flush all link events */
+ cxgbe_poll(&s->fw_evtq, NULL, budget, &work_done);
+
+ /* If link already down, nothing to do */
+ if (!pi->link_cfg.link_ok)
+ return 0;
+
+ ret = cxgbe_set_link_status(pi, false);
+ if (ret)
+ return ret;
+
+ cxgbe_dev_link_update(dev, 0);
+ return 0;
+}
+
int cxgbe_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
{
struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
struct adapter *adapter = pi->adapter;
struct rte_eth_dev_info dev_info;
int err;
- uint16_t new_mtu = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
+ uint16_t new_mtu = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
cxgbe_dev_info_get(eth_dev, &dev_info);
- /* Must accommodate at least ETHER_MIN_MTU */
- if ((new_mtu < ETHER_MIN_MTU) || (new_mtu > dev_info.max_rx_pktlen))
+ /* Must accommodate at least RTE_ETHER_MIN_MTU */
+ if (new_mtu < RTE_ETHER_MIN_MTU || new_mtu > dev_info.max_rx_pktlen)
return -EINVAL;
/* set to jumbo mode if needed */
- if (new_mtu > ETHER_MAX_LEN)
+ if (new_mtu > RTE_ETHER_MAX_LEN)
eth_dev->data->dev_conf.rxmode.offloads |=
DEV_RX_OFFLOAD_JUMBO_FRAME;
else
int cxgbe_dev_start(struct rte_eth_dev *eth_dev)
{
struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
+ struct rte_eth_rxmode *rx_conf = ð_dev->data->dev_conf.rxmode;
struct adapter *adapter = pi->adapter;
int err = 0, i;
goto out;
}
+ if (rx_conf->offloads & DEV_RX_OFFLOAD_SCATTER)
+ eth_dev->data->scattered_rx = 1;
+ else
+ eth_dev->data->scattered_rx = 0;
+
cxgbe_enable_rx_queues(pi);
- err = setup_rss(pi);
+ err = cxgbe_setup_rss(pi);
if (err)
goto out;
goto out;
}
- err = link_start(pi);
+ err = cxgbe_link_start(pi);
if (err)
goto out;
* have been disabled
*/
t4_sge_eth_clear_queues(pi);
+ eth_dev->data->scattered_rx = 0;
}
int cxgbe_dev_configure(struct rte_eth_dev *eth_dev)
{
struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
struct adapter *adapter = pi->adapter;
- uint64_t configured_offloads;
int err;
CXGBE_FUNC_TRACE();
- configured_offloads = eth_dev->data->dev_conf.rxmode.offloads;
- if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
- dev_info(adapter, "can't disable hw crc strip\n");
- eth_dev->data->dev_conf.rxmode.offloads |=
- DEV_RX_OFFLOAD_CRC_STRIP;
- }
if (!(adapter->flags & FW_QUEUE_BOUND)) {
- err = setup_sge_fwevtq(adapter);
+ err = cxgbe_setup_sge_fwevtq(adapter);
if (err)
return err;
adapter->flags |= FW_QUEUE_BOUND;
- err = setup_sge_ctrl_txq(adapter);
- if (err)
- return err;
+ if (is_pf4(adapter)) {
+ err = cxgbe_setup_sge_ctrl_txq(adapter);
+ if (err)
+ return err;
+ }
}
- err = cfg_queue_count(eth_dev);
+ err = cxgbe_cfg_queue_count(eth_dev);
if (err)
return err;
cxgbe_dev_info_get(eth_dev, &dev_info);
- /* Must accommodate at least ETHER_MIN_MTU */
+ /* Must accommodate at least RTE_ETHER_MIN_MTU */
if ((pkt_len < dev_info.min_rx_bufsize) ||
(pkt_len > dev_info.max_rx_pktlen)) {
dev_err(adap, "%s: max pkt len must be > %d and <= %d\n",
rxq->fl.size = temp_nb_desc;
/* Set to jumbo mode if necessary */
- if (pkt_len > ETHER_MAX_LEN)
+ if (pkt_len > RTE_ETHER_MAX_LEN)
eth_dev->data->dev_conf.rxmode.offloads |=
DEV_RX_OFFLOAD_JUMBO_FRAME;
else
~DEV_RX_OFFLOAD_JUMBO_FRAME;
err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
- &rxq->fl, t4_ethrx_handler,
+ &rxq->fl, NULL,
is_pf4(adapter) ?
t4_get_tp_ch_map(adapter, pi->tx_chan) : 0, mp,
queue_idx, socket_id);
return err;
if (flags & F_FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) {
- rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
+ rss_hf |= CXGBE_RSS_HF_TCP_IPV6_MASK;
if (flags & F_FW_RSS_VI_CONFIG_CMD_UDPEN)
- rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+ rss_hf |= CXGBE_RSS_HF_UDP_IPV6_MASK;
}
if (flags & F_FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN)
- rss_hf |= ETH_RSS_IPV6;
+ rss_hf |= CXGBE_RSS_HF_IPV6_MASK;
if (flags & F_FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) {
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
}
if (flags & F_FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN)
- rss_hf |= ETH_RSS_IPV4;
+ rss_hf |= CXGBE_RSS_HF_IPV4_MASK;
rss_conf->rss_hf = rss_hf;
return 0;
}
-int cxgbe_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *addr)
+int cxgbe_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *addr)
{
struct port_info *pi = (struct port_info *)(dev->data->dev_private);
- struct adapter *adapter = pi->adapter;
int ret;
- ret = t4_change_mac(adapter, adapter->mbox, pi->viid,
- pi->xact_addr_filt, (u8 *)addr, true, true);
+ ret = cxgbe_mpstcam_modify(pi, (int)pi->xact_addr_filt, (u8 *)addr);
if (ret < 0) {
dev_err(adapter, "failed to set mac addr; err = %d\n",
ret);
.dev_infos_get = cxgbe_dev_info_get,
.dev_supported_ptypes_get = cxgbe_dev_supported_ptypes_get,
.link_update = cxgbe_dev_link_update,
+ .dev_set_link_up = cxgbe_dev_set_link_up,
+ .dev_set_link_down = cxgbe_dev_set_link_down,
.mtu_set = cxgbe_dev_mtu_set,
.tx_queue_setup = cxgbe_dev_tx_queue_setup,
.tx_queue_start = cxgbe_dev_tx_queue_start,