#include "t4_msg.h"
#include "cxgbe.h"
-#define CXGBE_DEVARG_KEEP_OVLAN "keep_ovlan"
-
/*
* Response queue handler for the FW event queue.
*/
return 0;
}
-static int cxgbe_get_devargs(struct rte_devargs *devargs, const char *key)
+int cxgbe_get_devargs(struct rte_devargs *devargs, const char *key)
{
struct rte_kvargs *kvlist;
pi->port_id, pi->mod_type);
}
+inline bool force_linkup(struct adapter *adap)
+{
+ struct rte_pci_device *pdev = adap->pdev;
+
+ if (is_pf4(adap))
+ return false; /* force_linkup not required for pf driver*/
+ if (!cxgbe_get_devargs(pdev->device.devargs,
+ CXGBE_DEVARG_FORCE_LINK_UP))
+ return false;
+ return true;
+}
+
/**
* link_start - enable a port
* @dev: the port to enable
ret = t4_enable_vi_params(adapter, adapter->mbox, pi->viid,
true, true, false);
}
+
+ if (ret == 0 && force_linkup(adapter))
+ pi->eth_dev->data->dev_link.link_status = ETH_LINK_UP;
return ret;
}
err = -1;
goto out_free;
}
+
+ if (i > 0) {
+ /* First port will be notified by upper layer */
+ rte_eth_dev_probing_finish(eth_dev);
+ }
}
if (adapter->flags & FW_OK) {