/* SPDX-License-Identifier: BSD-3-Clause
- *
- * Copyright(c) 2019-2020 Xilinx, Inc.
+*
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
#include <rte_pci.h>
#include <rte_bus_pci.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_kvargs.h>
#include <rte_spinlock.h>
#include <rte_atomic.h>
#include "efx.h"
#include "sfc_efx_mcdi.h"
+#include "sfc_efx.h"
#include "sfc_debug.h"
#include "sfc_log.h"
#include "sfc_filter.h"
+#include "sfc_sriov.h"
+#include "sfc_mae.h"
+#include "sfc_dp.h"
#ifdef __cplusplus
extern "C" {
struct sfc_adapter_shared {
unsigned int rxq_count;
struct sfc_rxq_info *rxq_info;
+ unsigned int ethdev_rxq_count;
unsigned int txq_count;
struct sfc_txq_info *txq_info;
+ unsigned int ethdev_txq_count;
struct sfc_rss rss;
struct rte_kvargs *kvargs;
int socket_id;
efsys_bar_t mem_bar;
+ /* Function control window offset */
+ efsys_dma_addr_t fcw_offset;
efx_family_t family;
efx_nic_t *nic;
rte_spinlock_t nic_lock;
rte_atomic32_t restart_required;
struct sfc_efx_mcdi mcdi;
+ struct sfc_sriov sriov;
struct sfc_intr intr;
struct sfc_port port;
struct sfc_filter filter;
+ struct sfc_mae mae;
struct sfc_flow_list flow_list;
int sfc_set_rx_mode(struct sfc_adapter *sa);
int sfc_set_rx_mode_unchecked(struct sfc_adapter *sa);
+struct sfc_hw_switch_id;
+
+int sfc_hw_switch_id_init(struct sfc_adapter *sa,
+ struct sfc_hw_switch_id **idp);
+void sfc_hw_switch_id_fini(struct sfc_adapter *sa,
+ struct sfc_hw_switch_id *idp);
+bool sfc_hw_switch_ids_equal(const struct sfc_hw_switch_id *left,
+ const struct sfc_hw_switch_id *right);
#ifdef __cplusplus
}