-flags_generic = [
- ['RTE_MACHINE', '"armv8a"'],
- ['RTE_MAX_LCORE', 256],
- ['RTE_USE_C11_MEM_MODEL', true],
- ['RTE_CACHE_LINE_SIZE', 128]]
-flags_arm = [
- ['RTE_MACHINE', '"armv8a"'],
- ['RTE_MAX_LCORE', 16],
- ['RTE_USE_C11_MEM_MODEL', true],
- ['RTE_CACHE_LINE_SIZE', 64]]
-flags_cavium = [
- ['RTE_CACHE_LINE_SIZE', 128],
- ['RTE_MAX_NUMA_NODES', 2],
- ['RTE_MAX_LCORE', 96],
- ['RTE_MAX_VFIO_GROUPS', 128]]
-flags_dpaa = [
- ['RTE_MACHINE', '"dpaa"'],
- ['RTE_USE_C11_MEM_MODEL', true],
- ['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 16],
- ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
-flags_emag = [
- ['RTE_MACHINE', '"emag"'],
- ['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 32]]
-flags_armada = [
- ['RTE_MACHINE', '"armv8a"'],
- ['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 16]]
-
-flags_default_extra = []
-flags_n1sdp_extra = [
- ['RTE_MACHINE', '"n1sdp"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 4],
- ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
- ['RTE_LIBRTE_VHOST_NUMA', false]]
-flags_thunderx_extra = [
- ['RTE_MACHINE', '"thunderx"'],
- ['RTE_USE_C11_MEM_MODEL', false]]
-flags_thunderx2_extra = [
- ['RTE_MACHINE', '"thunderx2"'],
- ['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_NUMA_NODES', 2],
- ['RTE_MAX_LCORE', 256],
- ['RTE_ARM_FEATURE_ATOMICS', true],
- ['RTE_USE_C11_MEM_MODEL', true]]
-flags_octeontx2_extra = [
- ['RTE_MACHINE', '"octeontx2"'],
- ['RTE_MAX_NUMA_NODES', 1],
- ['RTE_MAX_LCORE', 36],
- ['RTE_ARM_FEATURE_ATOMICS', true],
- ['RTE_EAL_IGB_UIO', false],
- ['RTE_USE_C11_MEM_MODEL', true]]
-
-machine_args_generic = [
- ['default', ['-march=armv8-a+crc', '-moutline-atomics']],
- ['native', ['-march=native']],
- ['0xd03', ['-mcpu=cortex-a53']],
- ['0xd04', ['-mcpu=cortex-a35']],
- ['0xd07', ['-mcpu=cortex-a57']],
- ['0xd08', ['-mcpu=cortex-a72']],
- ['0xd09', ['-mcpu=cortex-a73']],
- ['0xd0a', ['-mcpu=cortex-a75']],
- ['0xd0b', ['-mcpu=cortex-a76']],
- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]]
-
-machine_args_cavium = [
- ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
- ['native', ['-march=native']],
- ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra],
- ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra],
- ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra],
- ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra],
- ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]]
-
-machine_args_emag = [
- ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']],
- ['native', ['-march=native']]]
-
-## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
-impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
-impl_0x41 = ['Arm', flags_arm, machine_args_generic]
-impl_0x42 = ['Broadcom', flags_generic, machine_args_generic]
-impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
-impl_0x44 = ['DEC', flags_generic, machine_args_generic]
-impl_0x49 = ['Infineon', flags_generic, machine_args_generic]
-impl_0x4d = ['Motorola', flags_generic, machine_args_generic]
-impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
-impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag]
-impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
-impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
-impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic]
-impl_0x69 = ['Intel', flags_generic, machine_args_generic]
-impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
+soc_n1sdp = {
+ 'description': 'Arm Neoverse N1SDP',
+ 'implementer': '0x41',
+ 'part_number': '0xd0c',
+ 'flags': [
+ ['RTE_MAX_LCORE', 4]
+ ],
+ 'numa': false
+}
+
+soc_n2 = {
+ 'description': 'Arm Neoverse N2',
+ 'implementer': '0x41',
+ 'part_number': '0xd49',
+ 'numa': false
+}
+
+soc_cn9k = {
+ 'description': 'Marvell OCTEON 9',
+ 'implementer': '0x43',
+ 'part_number': '0xb2',
+ 'numa': false
+}
+
+soc_stingray = {
+ 'description': 'Broadcom Stingray',
+ 'implementer': '0x41',
+ 'flags': [
+ ['RTE_MAX_LCORE', 16],
+ ['RTE_MAX_NUMA_NODES', 1]
+ ],
+ 'part_number': '0xd08',
+ 'numa': false
+}
+
+soc_thunderx2 = {
+ 'description': 'Marvell ThunderX2 T99',
+ 'implementer': '0x43',
+ 'part_number': '0xaf'
+}
+
+soc_thunderxt88 = {
+ 'description': 'Marvell ThunderX T88',
+ 'implementer': '0x43',
+ 'part_number': '0xa1'
+}
+
+'''
+Start of SoCs list
+generic: Generic un-optimized build for armv8 aarch64 execution mode.
+generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
+armada: Marvell ARMADA
+bluefield: NVIDIA BlueField
+centriq2400: Qualcomm Centriq 2400
+cn9k: Marvell OCTEON 9
+cn10k: Marvell OCTEON 10
+dpaa: NXP DPAA
+emag: Ampere eMAG
+graviton2: AWS Graviton2
+kunpeng920: HiSilicon Kunpeng 920
+kunpeng930: HiSilicon Kunpeng 930
+n1sdp: Arm Neoverse N1SDP
+n2: Arm Neoverse N2
+stingray: Broadcom Stingray
+thunderx2: Marvell ThunderX2 T99
+thunderxt88: Marvell ThunderX T88
+End of SoCs list
+'''
+# The string above is included in the documentation, keep it in sync with the
+# SoCs list below.
+socs = {
+ 'generic': soc_generic,
+ 'generic_aarch32': soc_generic_aarch32,
+ 'armada': soc_armada,
+ 'bluefield': soc_bluefield,
+ 'centriq2400': soc_centriq2400,
+ 'cn9k': soc_cn9k,
+ 'cn10k' : soc_cn10k,
+ 'dpaa': soc_dpaa,
+ 'emag': soc_emag,
+ 'graviton2': soc_graviton2,
+ 'kunpeng920': soc_kunpeng920,
+ 'kunpeng930': soc_kunpeng930,
+ 'n1sdp': soc_n1sdp,
+ 'n2': soc_n2,
+ 'stingray': soc_stingray,
+ 'thunderx2': soc_thunderx2,
+ 'thunderxt88': soc_thunderxt88
+}