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net/bonding: avoid making copy of MAC address
[dpdk.git]
/
config
/
common_base
diff --git
a/config/common_base
b/config/common_base
index
8f8190a
..
38beaab
100644
(file)
--- a/
config/common_base
+++ b/
config/common_base
@@
-55,12
+55,18
@@
CONFIG_RTE_MAJOR_ABI=
#
CONFIG_RTE_CACHE_LINE_SIZE=64
#
CONFIG_RTE_CACHE_LINE_SIZE=64
+#
+# Memory model
+#
+CONFIG_RTE_USE_C11_MEM_MODEL=n
+
#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=128
CONFIG_RTE_MAX_NUMA_NODES=8
#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_LIBRTE_EAL=y
CONFIG_RTE_MAX_LCORE=128
CONFIG_RTE_MAX_NUMA_NODES=8
+CONFIG_RTE_MAX_HEAPS=32
CONFIG_RTE_MAX_MEMSEG_LISTS=64
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
CONFIG_RTE_MAX_MEMSEG_LISTS=64
# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages
# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller
@@
-128,7
+134,7
@@
CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
CONFIG_RTE_LIBRTE_IEEE1588=n
CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
-CONFIG_RTE_ETHDEV_PROFILE_
ITT_WASTED_RX_ITERATIONS
=n
+CONFIG_RTE_ETHDEV_PROFILE_
WITH_VTUNE
=n
#
# Turn off Tx preparation stage
#
# Turn off Tx preparation stage
@@
-138,6
+144,11
@@
CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n
#
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
#
CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
+#
+# Common libraries, before Bus/PMDs
+#
+CONFIG_RTE_LIBRTE_COMMON_DPAAX=n
+
#
# Compile the Intel FPGA bus
#
#
# Compile the Intel FPGA bus
#
@@
-163,6
+174,11
@@
CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
+#
+# Compile Aquantia Atlantic PMD driver
+#
+CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y
+
#
# Compile AMD PMD
#
#
# Compile AMD PMD
#
@@
-217,6
+233,11
@@
CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
+#
+# Compile NXP ENETC PMD Driver
+#
+CONFIG_RTE_LIBRTE_ENETC_PMD=n
+
#
# Compile burst-oriented Amazon ENA PMD driver
#
#
# Compile burst-oriented Amazon ENA PMD driver
#
@@
-399,11
+420,25
@@
CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
#
CONFIG_RTE_LIBRTE_MVPP2_PMD=n
#
CONFIG_RTE_LIBRTE_MVPP2_PMD=n
+#
+# Compile Marvell MVNETA PMD driver
+#
+CONFIG_RTE_LIBRTE_MVNETA_PMD=n
+
#
# Compile support for VMBus library
#
CONFIG_RTE_LIBRTE_VMBUS=n
#
# Compile support for VMBus library
#
CONFIG_RTE_LIBRTE_VMBUS=n
+#
+# Compile native PMD for Hyper-V/Azure
+#
+CONFIG_RTE_LIBRTE_NETVSC_PMD=n
+CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n
+CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n
+
+#
# Compile virtual device driver for NetVSC on Hyper-V/Azure
#
CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=n
# Compile virtual device driver for NetVSC on Hyper-V/Azure
#
CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=n
@@
-470,6
+505,12
@@
CONFIG_RTE_CRYPTO_MAX_DEVS=64
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
+#
+# Compile NXP CAAM JR crypto Driver
+#
+CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n
+CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n
+
#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
@@
-482,13
+523,20
@@
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
#
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
#
-# Compile PMD for
QuickAssist based devices
+# Compile PMD for
Cavium OCTEON TX crypto device
#
#
-CONFIG_RTE_LIBRTE_PMD_QAT=n
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
+
+#
+# Compile PMD for QuickAssist based devices - see docs for details
+#
+CONFIG_RTE_LIBRTE_PMD_QAT=y
+CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
#
# Max. number of QuickAssist devices, which can be detected and attached
#
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
#
# Max. number of QuickAssist devices, which can be detected and attached
#
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
+CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
#
# Compile PMD for virtio crypto devices
#
# Compile PMD for virtio crypto devices
@@
-548,7
+596,6
@@
CONFIG_RTE_LIBRTE_PMD_CCP=n
# Compile PMD for Marvell Crypto device
#
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
# Compile PMD for Marvell Crypto device
#
CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n
-CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n
#
# Compile generic security library
#
# Compile generic security library
@@
-566,11
+613,21
@@
CONFIG_RTE_COMPRESS_MAX_DEVS=64
#
CONFIG_RTE_COMPRESSDEV_TEST=n
#
CONFIG_RTE_COMPRESSDEV_TEST=n
+#
+# Compile PMD for Octeontx ZIPVF compression device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y
+
#
# Compile PMD for ISA-L compression device
#
CONFIG_RTE_LIBRTE_PMD_ISAL=n
#
# Compile PMD for ISA-L compression device
#
CONFIG_RTE_LIBRTE_PMD_ISAL=n
+#
+# Compile PMD for ZLIB compression device
+#
+CONFIG_RTE_LIBRTE_PMD_ZLIB=n
+
#
# Compile generic event device library
#
#
# Compile generic event device library
#
@@
-581,6
+638,7
@@
CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32
CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024
CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32
+CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32
#
# Compile PMD for skeleton event device
#
# Compile PMD for skeleton event device
@@
-593,6
+651,11
@@
CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
#
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
#
CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
+#
+# Compile PMD for distributed software event device
+#
+CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=y
+
#
# Compile PMD for octeontx sso event device
#
#
# Compile PMD for octeontx sso event device
#
@@
-640,7
+703,6
@@
CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
# Compile librte_ring
#
CONFIG_RTE_LIBRTE_RING=y
# Compile librte_ring
#
CONFIG_RTE_LIBRTE_RING=y
-CONFIG_RTE_RING_USE_C11_MEM_MODEL=n
#
# Compile librte_mempool
#
# Compile librte_mempool