bus/pci: support Windows with bifurcated drivers

[dpdk.git] / doc / guides / prog_guide / writing_efficient_code.rst

diff --git a/doc/guides/prog_guide/writing_efficient_code.rst b/doc/guides/prog_guide/writing_efficient_code.rst
index 9a7b31b..849f63e 100644 (file)
--- a/doc/guides/prog_guide/writing_efficient_code.rst
+++ b/doc/guides/prog_guide/writing_efficient_code.rst
@@ -1,32 +1,5 @@
-..  BSD LICENSE
-    Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
-    All rights reserved.
-
-    Redistribution and use in source and binary forms, with or without
-    modification, are permitted provided that the following conditions
-    are met:
-
-    * Redistributions of source code must retain the above copyright
-    notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-    notice, this list of conditions and the following disclaimer in
-    the documentation and/or other materials provided with the
-    distribution.
-    * Neither the name of Intel Corporation nor the names of its
-    contributors may be used to endorse or promote products derived
-    from this software without specific prior written permission.
-
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+..  SPDX-License-Identifier: BSD-3-Clause
+    Copyright(c) 2010-2014 Intel Corporation.

 
 Writing Efficient Code
 ======================
 
 Writing Efficient Code
 ======================


@@ -105,6 +78,21 @@ meaning that if all memory access operations are done on the first channel only,
 
 By default, the  :ref:`Mempool Library <Mempool_Library>` spreads the addresses of objects among memory channels.
 
 
 By default, the  :ref:`Mempool Library <Mempool_Library>` spreads the addresses of objects among memory channels.
 

+Locking memory pages
+~~~~~~~~~~~~~~~~~~~~
+
+The underlying operating system is allowed to load/unload memory pages at its own discretion.
+These page loads could impact the performance, as the process is on hold when the kernel fetches them.
+
+To avoid these you could pre-load, and lock them into memory with the ``mlockall()`` call.
+
+.. code-block:: c
+
+    if (mlockall(MCL_CURRENT | MCL_FUTURE)) {
+        RTE_LOG(NOTICE, USER1, "mlockall() failed with error \"%s\"\n",
+                strerror(errno));
+    }
+

 Communication Between lcores
 ----------------------------
 
 Communication Between lcores
 ----------------------------
 


@@ -113,7 +101,7 @@ it is advised to use the DPDK ring API, which provides a lockless ring implement
 
 The ring supports bulk and burst access,
 meaning that it is possible to read several elements from the ring with only one costly atomic operation
 
 The ring supports bulk and burst access,
 meaning that it is possible to read several elements from the ring with only one costly atomic operation

-(see Chapter 5 "Ring Library").
+(see :doc:`ring_lib`).

 Performance is greatly improved when using bulk access operations.
 
 The code algorithm that dequeues messages may be something similar to the following:
 Performance is greatly improved when using bulk access operations.
 
 The code algorithm that dequeues messages may be something similar to the following:


@@ -124,7 +112,7 @@ The code algorithm that dequeues messages may be something similar to the follow
 
     while (1) {
         /* Process as many elements as can be dequeued. */
 
     while (1) {
         /* Process as many elements as can be dequeued. */

-        count = rte_ring_dequeue_burst(ring, obj_table, MAX_BULK);
+        count = rte_ring_dequeue_burst(ring, obj_table, MAX_BULK, NULL);

         if (unlikely(count == 0))
             continue;
 
         if (unlikely(count == 0))
             continue;
 


@@ -215,7 +203,7 @@ Setting the Target CPU Type
 
 The DPDK supports CPU microarchitecture-specific optimizations by means of CONFIG_RTE_MACHINE option
 in the DPDK configuration file.
 
 The DPDK supports CPU microarchitecture-specific optimizations by means of CONFIG_RTE_MACHINE option
 in the DPDK configuration file.

-The degree of optimization depends on the compiler's ability to optimize for a specitic microarchitecture,
+The degree of optimization depends on the compiler's ability to optimize for a specific microarchitecture,

 therefore it is preferable to use the latest compiler versions whenever possible.
 
 If the compiler version does not support the specific feature set (for example, the Intel® AVX instruction set),
 therefore it is preferable to use the latest compiler versions whenever possible.
 
 If the compiler version does not support the specific feature set (for example, the Intel® AVX instruction set),