Also, the PMD allows to use doorbell registers to notify the peer and share
some information by using scratchpad registers.
Also, the PMD allows to use doorbell registers to notify the peer and share
some information by using scratchpad registers.
-Intel Non-transparent Bridge needs special BIOS setting. Since the PMD only
-supports Intel Skylake platform, introduce BIOS setting here. The referencce
-is https://www.intel.com/content/dam/support/us/en/documents/server-products/Intel_Xeon_Processor_Scalable_Family_BIOS_User_Guide.pdf
+Intel Non-transparent Bridge needs special BIOS setting. The reference for
+Skylake is https://www.intel.com/content/dam/support/us/en/documents/server-products/Intel_Xeon_Processor_Scalable_Family_BIOS_User_Guide.pdf
-- Enable NTB bars and set bar size of bar 23 and bar 45 as 12-29 (2K-512M)
- on both hosts. Note that bar size on both hosts should be the same.
+- Enable NTB bars and set bar size of bar 23 and bar 45 as 12-29 (4K-512M)
+ on both hosts (for Ice Lake, bar size can be set as 12-51, namely 4K-128PB).
+ Note that bar size on both hosts should be the same.
- Disable split bars for both hosts.
- Set crosslink control override as DSD/USP on one host, USD/DSP on
another host.
- Disable PCIe PII SSC (Spread Spectrum Clocking) for both hosts. This
is a hardware requirement.
- Disable split bars for both hosts.
- Set crosslink control override as DSD/USP on one host, USD/DSP on
another host.
- Disable PCIe PII SSC (Spread Spectrum Clocking) for both hosts. This
is a hardware requirement.
better performance. The difference will be more than 10 times.
To enable WC, there are 2 ways.
better performance. The difference will be more than 10 times.
To enable WC, there are 2 ways.
- Enable WC for NTB device's Bar 2 and Bar 4 (Mapped memory) manually.
The reference is https://www.kernel.org/doc/html/latest/x86/mtrr.html
- Enable WC for NTB device's Bar 2 and Bar 4 (Mapped memory) manually.
The reference is https://www.kernel.org/doc/html/latest/x86/mtrr.html