+* **FreeBSD now supports `--base-virtaddr` EAL option.**
+
+ FreeBSD version now also supports setting base virtual address for mapping
+ pages and resources into its address space.
+
+* **Added Lock-free Stack for aarch64.**
+
+ The lock-free stack implementation is enabled for aarch64 platforms.
+
+* **Changed mempool allocation behaviour.**
+
+ Objects are no longer across pages by default.
+ It may consume more memory when using small memory pages.
+
+* **Added support of dynamic fields and flags in mbuf.**
+
+ This new feature adds the ability to dynamically register some room
+ for a field or a flag in the mbuf structure. This is typically used
+ for specific offload features, where adding a static field or flag
+ in the mbuf is not justified.
+
+* **Added hairpin queue.**
+
+ On supported NICs, we can now setup haipin queue which will offload packets
+ from the wire, backto the wire.
+
+* **Added flow tag in rte_flow.**
+
+ SET_TAG action and TAG item have been added to support transient flow tag.
+
+* **Extended metadata support in rte_flow.**
+
+ Flow metadata is extended to both Rx and Tx.
+
+ * Tx metadata can also be set by SET_META action of rte_flow.
+ * Rx metadata is delivered to host via a dynamic field of ``rte_mbuf`` with
+ PKT_RX_DYNF_METADATA.
+
+* **Added ethdev API to set supported packet types**
+
+ * Added new API ``rte_eth_dev_set_ptypes`` that allows an application to
+ inform PMD about about reduced range of packet types to handle.
+ * This scheme will allow PMDs to avoid lookup to internal ptype table on Rx
+ and thereby improve Rx performance if application wishes do so.
+
+* **Updated the enic driver.**
+
+ * Added support for Geneve with options offload.
+ * Added flow API implementation based on VIC Flow Manager API.
+
+* **Added Hisilicon hns3 PMD.**
+
+ Added the new ``hns3`` net driver for the inbuilt Hisilicon Network
+ Subsystem 3(HNS3) network engine found in the Hisilicon Kunpeng 920 SoC.
+ See the :doc:`../nics/hns3` guide for more details on this new driver.
+
+* **Added NXP PFE PMD.**
+
+ Added the new PFE driver for the NXP LS1012A platform. See the
+ :doc:`../nics/pfe` NIC driver guide for more details on this new driver.
+
+* **Updated iavf PMD.**
+
+ Enable AVX2 data path for iavf PMD.
+
+* **Updated the Intel e1000 driver.**
+
+ Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+
+* **Updated the Intel ixgbe driver.**
+
+ Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+
+* **Updated the Intel i40e driver.**
+
+ Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+
+* **Updated the Intel fm10k driver.**
+
+ Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+
+* **Added RX/TX packet burst mode get API.**
+
+ Added two new functions ``rte_eth_rx_burst_mode_get`` and
+ ``rte_eth_tx_burst_mode_get`` that allow an application
+ to retrieve the mode information about RX/TX packet burst
+ such as Scalar or Vector, and Vector technology like AVX2.
+
+* **Updated the Intel ice driver.**
+
+ Updated the Intel ice driver with new features and improvements, including:
+
+ * Added support for device-specific DDP package loading.
+ * Added support for handling Receive Flex Descriptor.
+ * Added support for protocol extraction on per Rx queue.
+ * Added support for Flow Director filter based on generic filter framework.
+ * Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+ * Generic filter enhancement
+ - Supported pipeline mode.
+ - Supported new packet type like PPPoE for switch filter.
+ * Supported input set change and symmetric hash by rte_flow RSS action.
+ * Added support for GTP Tx checksum offload.
+ * Added new device IDs to support E810_XXV devices.
+
+* **Added cryptodev asymmetric session-less operation.**
+
+ Added session-less option to cryptodev asymmetric structure. It works the same
+ way as symmetric crypto, corresponding xform is used directly by the crypto op.
+
+* **Updated the Huawei hinic driver.**
+
+ Updated the Huawei hinic driver with new features and improvements, including:
+
+ * Enabled SR-IOV - Partially supported at this point, VFIO only.
+ * Supported VLAN filter and VLAN offload.
+ * Supported Unicast MAC filter and Multicast MAC filter.
+ * Supported Flow API for LACP, VRRP, BGP and so on.
+ * Supported FW version get.
+
+* **Updated Mellanox mlx5 driver.**
+
+ Updated Mellanox mlx5 driver with new features and improvements, including:
+
+ * Added support for VLAN pop flow offload command.
+ * Added support for VLAN push flow offload command.
+ * Added support for VLAN set PCP offload command.
+ * Added support for VLAN set VID offload command.
+ * Added support for matching on packets withe Geneve tunnel header.
+ * Added hairpin support.
+ * Added ConnectX6-DX support.
+
+* **Updated the AF_XDP PMD.**
+
+ Updated the AF_XDP PMD. The new features include:
+
+ * Enabled zero copy between application mempools and UMEM by enabling the
+ XDP_UMEM_UNALIGNED_CHUNKS UMEM flag.
+
+* **Added Marvell NITROX symmetric crypto PMD.**
+
+ Added a symmetric crypto PMD for Marvell NITROX V security processor.
+ See the :doc:`../cryptodevs/nitrox` guide for more details on this new
+
+* **Added asymmetric support to Marvell OCTEON TX crypto PMD.**
+
+ Added support for asymmetric operations in Marvell OCTEON TX cypto PMD.
+ Supports RSA and modexp operations.
+
+* **Added Marvell OCTEON TX2 crypto PMD**
+
+ Added a new PMD driver for h/w crypto offload block on ``OCTEON TX2`` SoC.
+
+ See :doc:`../cryptodevs/octeontx2` for more details
+
+* **Updated NXP crypto PMDs for PDCP support.**
+
+ PDCP support is added to DPAA_SEC and DPAA2_SEC PMDs using rte_security APIs.
+ Support is added for all sequence number sizes for control and user plane.
+ Test application is updated for unit testing.
+
+* **Enabled Single Pass GCM acceleration on QAT GEN3.**
+
+ Added support for Single Pass GCM, available on QAT GEN3 only (Intel
+ QuickAssist Technology C4xxx). It is automatically chosen instead of the
+ classic 2-pass mode when running on QAT GEN3, significantly improving
+ the performance of AES GCM operations.
+
+* **Updated the Intel QuickAssist Technology (QAT) asymmetric crypto PMD.**
+
+ * Added support for asymmetric session-less operations.
+ * Added support for RSA algorithm with pair (n, d) private key representation.
+ * Added support for RSA algorithm with quintuple private key representation.
+
+* **Updated the Intel QuickAssist Technology (QAT) compression PMD.**
+
+ Added stateful decompression support in the Intel QuickAssist Technology PMD.
+ Please note that stateful compression is not supported.
+
+* **Added external buffers support for dpdk-test-compress-perf tool.**
+
+ Added a command line option to dpdk-test-compress-perf tool to allocate
+ and use memory zones as external buffers instead of keeping the data directly
+ in mbuf areas.
+
+* **Updated the IPSec library.**
+
+ * Added SA Database API to ``librte_ipsec``. A new test-sad application is also
+ introduced to evaluate and perform custom functional and performance tests
+ for IPsec SAD implementation.
+
+ * Support fragmented packets in inline crypto processing mode with fallback
+ ``lookaside-none`` session. Corresponding changes are also added in IPsec
+ Security Gateway application.
+
+* **Introduced FIFO for NTB PMD.**
+
+ Introduced FIFO for NTB (Non-transparent Bridge) PMD to support
+ packet based processing.
+
+* **Added eBPF JIT support for arm64.**
+
+ Added eBPF JIT support for arm64 architecture to improve the eBPF program
+ performance.
+
+* **Added RIB and FIB (Routing/Forwarding Information Base) libraries.**
+
+ RIB and FIB can replace the LPM (Longest Prefix Match) library
+ with better control plane (RIB) performance.
+ The data plane (FIB) can be extended with new algorithms.
+
+* **Updated testpmd.**
+
+ * Added a console command to testpmd app, ``show port (port_id) ptypes`` which
+ gives ability to print port supported ptypes in different protocol layers.
+
+* **Added new example l2fwd-event application.**
+
+ Added an example application `l2fwd-event` that adds event device support to
+ traditional l2fwd example. It demonstrates usage of poll and event mode IO
+ mechanism under a single application.
+
+* **Added build support for Link Time Optimization.**
+
+ LTO is an optimization technique used by the compiler to perform whole
+ program analysis and optimization at link time. In order to do that
+ compilers store their internal representation of the source code that
+ the linker uses at the final stage of compilation process.
+
+ See :doc:`../prog_guide/lto` for more information:
+
+