+* **Added raw data-path APIs for cryptodev library.**
+
+ Cryptodev is added with raw data-path APIs to accelerate external
+ libraries or applications which need to avail fast cryptodev
+ enqueue/dequeue operations but does not necessarily depends on
+ mbufs and cryptodev operation mempools.
+
+* **Updated the aesni_mb crypto PMD.**
+
+ * Added support for AES-ECB 128, 192 and 256.
+ * Added support for ZUC-EEA3/EIA3 algorithms.
+ * Added support for SNOW3G-UEA2/UIA2 algorithms.
+ * Added support for KASUMI-F8/F9 algorithms.
+ * Added support for Chacha20-Poly1305.
+ * Added support for AES-256 CCM algorithm.
+
+* **Updated the aesni_gcm crypto PMD.**
+
+ * Added SGL support for AES-GMAC.
+
+* **Added Broadcom BCMFS symmetric crypto PMD.**
+
+ Added a symmetric crypto PMD for Broadcom FlexSparc crypto units.
+ See :doc:`../cryptodevs/bcmfs` guide for more details on this new PMD.
+
+* **Updated DPAA2_SEC crypto PMD.**
+
+ * Added DES-CBC support for cipher_only, chain and ipsec protocol.
+ * Added support for non-HMAC auth algorithms
+ (MD5, SHA1, SHA224, SHA256, SHA384, SHA512).
+
+* **Updated Marvell NITROX symmetric crypto PMD.**
+
+ * Added AES-GCM support.
+ * Added cipher only offload support.
+
+* **Updated the OCTEON TX2 crypto PMD.**
+
+ * Updated the OCTEON TX2 crypto PMD lookaside protocol offload for IPsec with
+ IPv6 support.
+
+* **Updated QAT crypto PMD.**
+
+ * Added Raw Data-path APIs support.
+
+* **Added Intel ACC100 bbdev PMD.**
+
+ Added a new ``acc100`` bbdev driver for the Intel\ |reg| ACC100 accelerator
+ also known as Mount Bryce. See the
+ :doc:`../bbdevs/acc100` BBDEV guide for more details on this new driver.
+
+* **Updated rte_security library to support SDAP.**
+
+ ``rte_security_pdcp_xform`` in ``rte_security`` lib is updated to enable
+ 5G NR processing of SDAP header in PMDs.
+
+* **Added Marvell OCTEON TX2 regex PMD.**
+
+ Added a new PMD driver for hardware regex offload block for OCTEON TX2 SoC.
+
+ See the :doc:`../regexdevs/octeontx2` for more details.
+
+* **Updated Software Eventdev driver.**
+
+ Added performance tuning arguments to allow tuning the scheduler for
+ better throughtput in high core count use cases.
+
+* **Updated ioat rawdev driver**
+
+ The ioat rawdev driver has been updated and enhanced. Changes include:
+
+ * Added support for Intel\ |reg| Data Streaming Accelerator hardware.
+ For more information, see https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator
+ * Added support for the fill operation via the API ``rte_ioat_enqueue_fill()``,
+ where the hardware fills an area of memory with a repeating pattern.
+ * Added a per-device configuration flag to disable management
+ of user-provided completion handles.
+ * Renamed the ``rte_ioat_do_copies()`` API to ``rte_ioat_perform_ops()``,
+ and renamed the ``rte_ioat_completed_copies()`` API to ``rte_ioat_completed_ops()``
+ to better reflect the APIs' purposes, and remove the implication that
+ they are limited to copy operations only.
+ [Note: The old API is still provided but marked as deprecated in the code]
+ * Added a new API ``rte_ioat_fence()`` to add a fence between operations.
+ This API replaces the ``fence`` flag parameter in the ``rte_ioat_enqueue_copies()`` function,
+ and is clearer as there is no ambiguity as to whether the flag should be
+ set on the last operation before the fence or the first operation after it.
+
+* **Updated the pipeline library for alignment with the P4 language.**
+
+ Added new Software Switch (SWX) pipeline type that provides more
+ flexibility through API and feature alignment with the P4 language.
+
+ * The packet headers, meta-data, actions, tables and pipelines are
+ dynamically defined instead of selected from pre-defined set.
+ * The actions and the pipeline are defined with instructions.
+ * Extern objects and functions can be plugged into the pipeline.
+ * Transaction-oriented table updates.
+
+* **Add new AVX512 specific classify algorithms for ACL library.**
+
+ * Added new ``RTE_ACL_CLASSIFY_AVX512X16`` vector implementation,
+ which can process up to 16 flows in parallel. Requires AVX512 support.
+
+ * Added new ``RTE_ACL_CLASSIFY_AVX512X32`` vector implementation,
+ which can process up to 32 flows in parallel. Requires AVX512 support.
+
+* **Added support to update subport bandwidth dynamically.**
+
+ * Added new API ``rte_sched_port_subport_profile_add`` to add new
+ subport bandwidth profile to subport porfile table at runtime.
+
+ * Added support to update subport rate dynamically.
+
+* **Updated FIPS validation sample application.**
+
+ * Added scatter gather support.
+ * Added NIST GCMVS complaint GMAC test method support.
+