doc: add clang to aarch64 cross build guide

[dpdk.git] / doc / guides / vdpadevs / mlx5.rst

diff --git a/doc/guides/vdpadevs/mlx5.rst b/doc/guides/vdpadevs/mlx5.rst
index 903fdb0..1f2ae6f 100644 (file)
--- a/doc/guides/vdpadevs/mlx5.rst
+++ b/doc/guides/vdpadevs/mlx5.rst
@@ -116,7 +116,7 @@ Driver options
   - 2, Completion queue scheduling will be managed by interrupts. Each CQ burst
     arms the CQ in order to get an interrupt event in the next traffic burst.
 
   - 2, Completion queue scheduling will be managed by interrupts. Each CQ burst
     arms the CQ in order to get an interrupt event in the next traffic burst.
 

-  - Default mode is 0.
+  - Default mode is 1.

 
 - ``event_us`` parameter [int]
 
 
 - ``event_us`` parameter [int]
 


@@ -134,6 +134,35 @@ Driver options
   interrupts are configured to the device in order to notify traffic for the
   driver. Default value is 2s.
 
   interrupts are configured to the device in order to notify traffic for the
   driver. Default value is 2s.
 

+- ``event_core`` parameter [int]
+
+  CPU core number to set polling thread affinity to, default to control plane
+  cpu.
+
+- ``hw_latency_mode`` parameter [int]
+
+  The completion queue moderation mode:
+
+  - 0, HW default.
+
+  - 1, Latency is counted from the first packet completion report.
+
+  - 2, Latency is counted from the last packet completion.
+
+- ``hw_max_latency_us`` parameter [int]
+
+  - 1 - 4095, The maximum time in microseconds that packet completion report
+    can be delayed.
+
+  - 0, HW default.
+
+- ``hw_max_pending_comp`` parameter [int]
+
+  - 1 - 65535, The maximum number of pending packets completions in an HW queue.
+
+  - 0, HW default.
+
+

 Error handling
 ^^^^^^^^^^^^^^
 
 Error handling
 ^^^^^^^^^^^^^^