+ return 0;
+}
+
+static int
+fslmc_dmamap_seg(const struct rte_memseg_list *msl __rte_unused,
+ const struct rte_memseg *ms, void *arg)
+{
+ int *n_segs = arg;
+ int ret;
+
+ /* if IOVA address is invalid, skip */
+ if (ms->iova == RTE_BAD_IOVA)
+ return 0;
+
+ ret = fslmc_map_dma(ms->addr_64, ms->iova, ms->len);
+ if (ret)
+ DPAA2_BUS_ERR("Unable to VFIO map (addr=%p, len=%zu)",
+ ms->addr, ms->len);
+ else
+ (*n_segs)++;
+
+ return ret;
+}
+
+int
+rte_fslmc_vfio_mem_dmamap(uint64_t vaddr, uint64_t iova, uint64_t size)
+{
+ int ret;
+ struct fslmc_vfio_group *group;
+ struct vfio_iommu_type1_dma_map dma_map = {
+ .argsz = sizeof(struct vfio_iommu_type1_dma_map),
+ .flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
+ };
+
+ if (fslmc_iommu_type == RTE_VFIO_NOIOMMU) {
+ DPAA2_BUS_DEBUG("Running in NOIOMMU mode");
+ return 0;
+ }
+
+ /* SET DMA MAP for IOMMU */
+ group = &vfio_group;
+ if (!group->container) {
+ DPAA2_BUS_ERR("Container is not connected");
+ return -1;
+ }
+
+ dma_map.size = size;
+ dma_map.vaddr = vaddr;
+ dma_map.iova = iova;
+
+ DPAA2_BUS_DEBUG("VFIOdmamap 0x%"PRIx64":0x%"PRIx64",size 0x%"PRIx64"\n",
+ (uint64_t)dma_map.vaddr, (uint64_t)dma_map.iova,
+ (uint64_t)dma_map.size);
+ ret = ioctl(group->container->fd, VFIO_IOMMU_MAP_DMA,
+ &dma_map);
+ if (ret) {
+ printf("Unable to map DMA address (errno = %d)\n",
+ errno);
+ return ret;
+ }
+
+ return 0;
+}
+
+int rte_fslmc_vfio_dmamap(void)
+{
+ int i = 0, ret;
+
+ /* Lock before parsing and registering callback to memory subsystem */
+ rte_mcfg_mem_read_lock();
+
+ if (rte_memseg_walk(fslmc_dmamap_seg, &i) < 0) {
+ rte_mcfg_mem_read_unlock();
+ return -1;
+ }
+
+ ret = rte_mem_event_callback_register("fslmc_memevent_clb",
+ fslmc_memevent_cb, NULL);
+ if (ret && rte_errno == ENOTSUP)
+ DPAA2_BUS_DEBUG("Memory event callbacks not supported");
+ else if (ret)
+ DPAA2_BUS_DEBUG("Unable to install memory handler");
+ else
+ DPAA2_BUS_DEBUG("Installed memory callback handler");
+
+ DPAA2_BUS_DEBUG("Total %d segments found.", i);
+