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test: add devargs test cases
[dpdk.git]
/
drivers
/
common
/
octeontx2
/
otx2_io_arm64.h
diff --git
a/drivers/common/octeontx2/otx2_io_arm64.h
b/drivers/common/octeontx2/otx2_io_arm64.h
index
7e45329
..
34268e3
100644
(file)
--- a/
drivers/common/octeontx2/otx2_io_arm64.h
+++ b/
drivers/common/octeontx2/otx2_io_arm64.h
@@
-21,6
+21,12
@@
#define otx2_prefetch_store_keep(ptr) ({\
asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (ptr)); })
#define otx2_prefetch_store_keep(ptr) ({\
asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (ptr)); })
+#if defined(__ARM_FEATURE_SVE)
+#define __LSE_PREAMBLE " .cpu generic+lse+sve\n"
+#else
+#define __LSE_PREAMBLE " .cpu generic+lse\n"
+#endif
+
static __rte_always_inline uint64_t
otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr)
{
static __rte_always_inline uint64_t
otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr)
{
@@
-28,7
+34,7
@@
otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr)
/* Atomic add with no ordering */
asm volatile (
/* Atomic add with no ordering */
asm volatile (
- ".cpu generic+lse\n"
+ __LSE_PREAMBLE
"ldadd %x[i], %x[r], [%[b]]"
: [r] "=r" (result), "+m" (*ptr)
: [i] "r" (incr), [b] "r" (ptr)
"ldadd %x[i], %x[r], [%[b]]"
: [r] "=r" (result), "+m" (*ptr)
: [i] "r" (incr), [b] "r" (ptr)
@@
-43,7
+49,7
@@
otx2_atomic64_add_sync(int64_t incr, int64_t *ptr)
/* Atomic add with ordering */
asm volatile (
/* Atomic add with ordering */
asm volatile (
- ".cpu generic+lse\n"
+ __LSE_PREAMBLE
"ldadda %x[i], %x[r], [%[b]]"
: [r] "=r" (result), "+m" (*ptr)
: [i] "r" (incr), [b] "r" (ptr)
"ldadda %x[i], %x[r], [%[b]]"
: [r] "=r" (result), "+m" (*ptr)
: [i] "r" (incr), [b] "r" (ptr)
@@
-57,12
+63,24
@@
otx2_lmt_submit(rte_iova_t io_address)
uint64_t result;
asm volatile (
uint64_t result;
asm volatile (
- ".cpu generic+lse\n"
+ __LSE_PREAMBLE
"ldeor xzr,%x[rf],[%[rs]]" :
[rf] "=r"(result): [rs] "r"(io_address));
return result;
}
"ldeor xzr,%x[rf],[%[rs]]" :
[rf] "=r"(result): [rs] "r"(io_address));
return result;
}
+static __rte_always_inline uint64_t
+otx2_lmt_submit_release(rte_iova_t io_address)
+{
+ uint64_t result;
+
+ asm volatile (
+ __LSE_PREAMBLE
+ "ldeorl xzr,%x[rf],[%[rs]]" :
+ [rf] "=r"(result) : [rs] "r"(io_address));
+ return result;
+}
+
static __rte_always_inline void
otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext)
{
static __rte_always_inline void
otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext)
{
@@
-92,4
+110,5
@@
otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw)
dst128[i] = src128[i];
}
dst128[i] = src128[i];
}
+#undef __LSE_PREAMBLE
#endif /* _OTX2_IO_ARM64_H_ */
#endif /* _OTX2_IO_ARM64_H_ */