+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+static __checkReturn efx_rc_t
+efx_mae_action_set_add_vlan_push(
+ __in efx_mae_actions_t *spec,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ unsigned int n_tags = spec->ema_n_vlan_tags_to_push;
+ efx_rc_t rc;
+
+ if (arg_size != sizeof (*spec->ema_vlan_push_descs)) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (arg == NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ if (n_tags == EFX_MAE_VLAN_PUSH_MAX_NTAGS) {
+ rc = ENOTSUP;
+ goto fail3;
+ }
+
+ memcpy(&spec->ema_vlan_push_descs[n_tags], arg, arg_size);
+ ++(spec->ema_n_vlan_tags_to_push);
+
+ return (0);
+
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+static __checkReturn efx_rc_t
+efx_mae_action_set_add_encap(
+ __in efx_mae_actions_t *spec,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ efx_rc_t rc;
+
+ /*
+ * Adding this specific action to an action set spec and setting encap.
+ * header ID in the spec are two individual steps. This design allows
+ * the client driver to avoid encap. header allocation when it simply
+ * needs to check the order of actions submitted by user ("validate"),
+ * without actually allocating an action set and inserting a rule.
+ *
+ * For now, mark encap. header ID as invalid; the caller will invoke
+ * efx_mae_action_set_fill_in_eh_id() to override the field prior
+ * to action set allocation; otherwise, the allocation will fail.
+ */
+ spec->ema_rsrc.emar_eh_id.id = EFX_MAE_RSRC_ID_INVALID;
+
+ /*
+ * As explained above, there are no arguments to handle here.
+ * efx_mae_action_set_fill_in_eh_id() will take care of them.
+ */
+ if (arg_size != 0) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (arg != NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+static __checkReturn efx_rc_t
+efx_mae_action_set_add_flag(
+ __in efx_mae_actions_t *spec,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ efx_rc_t rc;
+
+ _NOTE(ARGUNUSED(spec))
+
+ if (arg_size != 0) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (arg != NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ /* This action does not have any arguments, so do nothing here. */
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+static __checkReturn efx_rc_t
+efx_mae_action_set_add_mark(
+ __in efx_mae_actions_t *spec,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ efx_rc_t rc;
+
+ if (arg_size != sizeof (spec->ema_mark_value)) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (arg == NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ memcpy(&spec->ema_mark_value, arg, arg_size);
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+static __checkReturn efx_rc_t
+efx_mae_action_set_add_deliver(
+ __in efx_mae_actions_t *spec,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ efx_rc_t rc;
+
+ if (arg_size != sizeof (spec->ema_deliver_mport)) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (arg == NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ memcpy(&spec->ema_deliver_mport, arg, arg_size);
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+typedef struct efx_mae_action_desc_s {
+ /* Action specific handler */
+ efx_rc_t (*emad_add)(efx_mae_actions_t *,
+ size_t, const uint8_t *);
+} efx_mae_action_desc_t;
+
+static const efx_mae_action_desc_t efx_mae_actions[EFX_MAE_NACTIONS] = {
+ [EFX_MAE_ACTION_DECAP] = {
+ .emad_add = efx_mae_action_set_add_decap
+ },
+ [EFX_MAE_ACTION_VLAN_POP] = {
+ .emad_add = efx_mae_action_set_add_vlan_pop
+ },
+ [EFX_MAE_ACTION_VLAN_PUSH] = {
+ .emad_add = efx_mae_action_set_add_vlan_push
+ },
+ [EFX_MAE_ACTION_ENCAP] = {
+ .emad_add = efx_mae_action_set_add_encap
+ },
+ [EFX_MAE_ACTION_FLAG] = {
+ .emad_add = efx_mae_action_set_add_flag
+ },
+ [EFX_MAE_ACTION_MARK] = {
+ .emad_add = efx_mae_action_set_add_mark
+ },
+ [EFX_MAE_ACTION_DELIVER] = {
+ .emad_add = efx_mae_action_set_add_deliver
+ }
+};
+
+static const uint32_t efx_mae_action_ordered_map =
+ (1U << EFX_MAE_ACTION_DECAP) |
+ (1U << EFX_MAE_ACTION_VLAN_POP) |
+ (1U << EFX_MAE_ACTION_VLAN_PUSH) |
+ (1U << EFX_MAE_ACTION_ENCAP) |
+ (1U << EFX_MAE_ACTION_FLAG) |
+ (1U << EFX_MAE_ACTION_MARK) |
+ (1U << EFX_MAE_ACTION_DELIVER);
+
+/*
+ * These actions must not be added after DELIVER, but
+ * they can have any place among the rest of
+ * strictly ordered actions.
+ */
+static const uint32_t efx_mae_action_nonstrict_map =
+ (1U << EFX_MAE_ACTION_FLAG) |
+ (1U << EFX_MAE_ACTION_MARK);
+
+static const uint32_t efx_mae_action_repeat_map =
+ (1U << EFX_MAE_ACTION_VLAN_POP) |
+ (1U << EFX_MAE_ACTION_VLAN_PUSH);
+
+/*
+ * Add an action to an action set.
+ *
+ * This has to be invoked in the desired action order.
+ * An out-of-order action request will be turned down.
+ */
+static __checkReturn efx_rc_t
+efx_mae_action_set_spec_populate(
+ __in efx_mae_actions_t *spec,
+ __in efx_mae_action_t type,
+ __in size_t arg_size,
+ __in_bcount(arg_size) const uint8_t *arg)
+{
+ uint32_t action_mask;
+ efx_rc_t rc;
+
+ EFX_STATIC_ASSERT(EFX_MAE_NACTIONS <=
+ (sizeof (efx_mae_action_ordered_map) * 8));
+ EFX_STATIC_ASSERT(EFX_MAE_NACTIONS <=
+ (sizeof (efx_mae_action_repeat_map) * 8));
+
+ EFX_STATIC_ASSERT(EFX_MAE_ACTION_DELIVER + 1 == EFX_MAE_NACTIONS);
+ EFX_STATIC_ASSERT(EFX_MAE_ACTION_FLAG + 1 == EFX_MAE_ACTION_MARK);
+ EFX_STATIC_ASSERT(EFX_MAE_ACTION_MARK + 1 == EFX_MAE_ACTION_DELIVER);
+
+ if (type >= EFX_ARRAY_SIZE(efx_mae_actions)) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ action_mask = (1U << type);
+
+ if ((spec->ema_actions & action_mask) != 0) {
+ /* The action set already contains this action. */
+ if ((efx_mae_action_repeat_map & action_mask) == 0) {
+ /* Cannot add another non-repeatable action. */
+ rc = ENOTSUP;
+ goto fail2;
+ }
+ }
+
+ if ((efx_mae_action_ordered_map & action_mask) != 0) {
+ uint32_t strict_ordered_map =
+ efx_mae_action_ordered_map & ~efx_mae_action_nonstrict_map;
+ uint32_t later_actions_mask =
+ strict_ordered_map & ~(action_mask | (action_mask - 1));
+
+ if ((spec->ema_actions & later_actions_mask) != 0) {
+ /* Cannot add an action after later ordered actions. */
+ rc = ENOTSUP;
+ goto fail3;
+ }
+ }
+
+ if (efx_mae_actions[type].emad_add != NULL) {
+ rc = efx_mae_actions[type].emad_add(spec, arg_size, arg);
+ if (rc != 0)
+ goto fail4;
+ }
+
+ spec->ema_actions |= action_mask;
+
+ return (0);
+
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_decap(
+ __in efx_mae_actions_t *spec)
+{
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_DECAP, 0, NULL));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_vlan_pop(
+ __in efx_mae_actions_t *spec)
+{
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_VLAN_POP, 0, NULL));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_vlan_push(
+ __in efx_mae_actions_t *spec,
+ __in uint16_t tpid_be,
+ __in uint16_t tci_be)
+{
+ efx_mae_action_vlan_push_t action;
+ const uint8_t *arg = (const uint8_t *)&action;
+
+ action.emavp_tpid_be = tpid_be;
+ action.emavp_tci_be = tci_be;
+
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_VLAN_PUSH, sizeof (action), arg));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_encap(
+ __in efx_mae_actions_t *spec)
+{
+ /*
+ * There is no argument to pass encap. header ID, thus, one does not
+ * need to allocate an encap. header while parsing application input.
+ * This is useful since building an action set may be done simply to
+ * validate a rule, whilst resource allocation usually consumes time.
+ */
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_ENCAP, 0, NULL));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_flag(
+ __in efx_mae_actions_t *spec)
+{
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_FLAG, 0, NULL));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_mark(
+ __in efx_mae_actions_t *spec,
+ __in uint32_t mark_value)
+{
+ const uint8_t *arg = (const uint8_t *)&mark_value;
+
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_MARK, sizeof (mark_value), arg));
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_deliver(
+ __in efx_mae_actions_t *spec,
+ __in const efx_mport_sel_t *mportp)
+{
+ const uint8_t *arg;
+ efx_rc_t rc;
+
+ if (mportp == NULL) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ arg = (const uint8_t *)&mportp->sel;
+
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_DELIVER, sizeof (mportp->sel), arg));
+
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_populate_drop(
+ __in efx_mae_actions_t *spec)
+{
+ efx_mport_sel_t mport;
+ const uint8_t *arg;
+ efx_dword_t dword;
+
+ EFX_POPULATE_DWORD_1(dword,
+ MAE_MPORT_SELECTOR_FLAT, MAE_MPORT_SELECTOR_NULL);
+
+ /*
+ * The constructed DWORD is little-endian,
+ * but the resulting value is meant to be
+ * passed to MCDIs, where it will undergo
+ * host-order to little endian conversion.
+ */
+ mport.sel = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
+
+ arg = (const uint8_t *)&mport.sel;
+
+ return (efx_mae_action_set_spec_populate(spec,
+ EFX_MAE_ACTION_DELIVER, sizeof (mport.sel), arg));
+}
+
+ __checkReturn boolean_t
+efx_mae_action_set_specs_equal(
+ __in const efx_mae_actions_t *left,
+ __in const efx_mae_actions_t *right)
+{
+ size_t cmp_size = EFX_FIELD_OFFSET(efx_mae_actions_t, ema_rsrc);
+
+ /*
+ * An action set specification consists of two parts. The first part
+ * indicates what actions are included in the action set, as well as
+ * extra quantitative values (in example, the number of VLAN tags to
+ * push). The second part comprises resource IDs used by the actions.
+ *
+ * A resource, in example, a counter, is allocated from the hardware
+ * by the client, and it's the client who is responsible for keeping
+ * track of allocated resources and comparing resource IDs if needed.
+ *
+ * In this API, don't compare resource IDs in the two specifications.
+ */
+
+ return ((memcmp(left, right, cmp_size) == 0) ? B_TRUE : B_FALSE);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_match_specs_class_cmp(
+ __in efx_nic_t *enp,
+ __in const efx_mae_match_spec_t *left,
+ __in const efx_mae_match_spec_t *right,
+ __out boolean_t *have_same_classp)
+{
+ efx_mae_t *maep = enp->en_maep;
+ unsigned int field_ncaps = maep->em_max_nfields;
+ const efx_mae_field_cap_t *field_caps;
+ const efx_mae_mv_desc_t *desc_setp;
+ unsigned int desc_set_nentries;
+ boolean_t have_same_class = B_TRUE;
+ efx_mae_field_id_t field_id;
+ const uint8_t *mvpl;
+ const uint8_t *mvpr;
+ efx_rc_t rc;
+
+ switch (left->emms_type) {
+ case EFX_MAE_RULE_OUTER:
+ field_caps = maep->em_outer_rule_field_caps;
+ desc_setp = __efx_mae_outer_rule_mv_desc_set;
+ desc_set_nentries =
+ EFX_ARRAY_SIZE(__efx_mae_outer_rule_mv_desc_set);
+ mvpl = left->emms_mask_value_pairs.outer;
+ mvpr = right->emms_mask_value_pairs.outer;
+ break;
+ case EFX_MAE_RULE_ACTION:
+ field_caps = maep->em_action_rule_field_caps;
+ desc_setp = __efx_mae_action_rule_mv_desc_set;
+ desc_set_nentries =
+ EFX_ARRAY_SIZE(__efx_mae_action_rule_mv_desc_set);
+ mvpl = left->emms_mask_value_pairs.action;
+ mvpr = right->emms_mask_value_pairs.action;
+ break;
+ default:
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ if (field_caps == NULL) {
+ rc = EAGAIN;
+ goto fail2;
+ }
+
+ if (left->emms_type != right->emms_type ||
+ left->emms_prio != right->emms_prio) {
+ /*
+ * Rules of different types can never map to the same class.
+ *
+ * The FW can support some set of match criteria for one
+ * priority and not support the very same set for
+ * another priority. Thus, two rules which have
+ * different priorities can never map to
+ * the same class.
+ */
+ *have_same_classp = B_FALSE;
+ return (0);
+ }
+
+ for (field_id = 0; (unsigned int)field_id < desc_set_nentries;
+ ++field_id) {
+ const efx_mae_mv_desc_t *descp = &desc_setp[field_id];
+ efx_mae_field_cap_id_t field_cap_id = descp->emmd_field_cap_id;
+ const uint8_t *lmaskp = mvpl + descp->emmd_mask_offset;
+ const uint8_t *rmaskp = mvpr + descp->emmd_mask_offset;
+ size_t mask_size = descp->emmd_mask_size;
+ const uint8_t *lvalp = mvpl + descp->emmd_value_offset;
+ const uint8_t *rvalp = mvpr + descp->emmd_value_offset;
+ size_t value_size = descp->emmd_value_size;
+
+ if (mask_size == 0)
+ continue; /* Skip array gap */
+
+ if ((unsigned int)field_cap_id >= field_ncaps) {
+ /*
+ * The FW has not reported capability status for this
+ * field. It's unknown whether any difference between
+ * the two masks / values affects the class. The only
+ * case when the class must be the same is when these
+ * mask-value pairs match. Otherwise, report mismatch.
+ */
+ if ((memcmp(lmaskp, rmaskp, mask_size) == 0) &&
+ (memcmp(lvalp, rvalp, value_size) == 0))
+ continue;
+ else
+ break;
+ }
+
+ if (field_caps[field_cap_id].emfc_mask_affects_class) {
+ if (memcmp(lmaskp, rmaskp, mask_size) != 0) {
+ have_same_class = B_FALSE;
+ break;
+ }
+ }
+
+ if (field_caps[field_cap_id].emfc_match_affects_class) {
+ if (memcmp(lvalp, rvalp, value_size) != 0) {
+ have_same_class = B_FALSE;
+ break;
+ }
+ }
+ }
+
+ *have_same_classp = have_same_class;
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_outer_rule_insert(
+ __in efx_nic_t *enp,
+ __in const efx_mae_match_spec_t *spec,
+ __in efx_tunnel_protocol_t encap_type,
+ __out efx_mae_rule_id_t *or_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_OUTER_RULE_INSERT_IN_LENMAX_MCDI2,
+ MC_CMD_MAE_OUTER_RULE_INSERT_OUT_LEN);
+ uint32_t encap_type_mcdi;
+ efx_mae_rule_id_t or_id;
+ size_t offset;
+ efx_rc_t rc;
+
+ EFX_STATIC_ASSERT(sizeof (or_idp->id) ==
+ MC_CMD_MAE_OUTER_RULE_INSERT_OUT_OR_ID_LEN);
+
+ EFX_STATIC_ASSERT(EFX_MAE_RSRC_ID_INVALID ==
+ MC_CMD_MAE_OUTER_RULE_INSERT_OUT_OUTER_RULE_ID_NULL);
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ if (spec->emms_type != EFX_MAE_RULE_OUTER) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ switch (encap_type) {
+ case EFX_TUNNEL_PROTOCOL_NONE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NONE;
+ break;
+ case EFX_TUNNEL_PROTOCOL_VXLAN:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_VXLAN;
+ break;
+ case EFX_TUNNEL_PROTOCOL_GENEVE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_GENEVE;
+ break;
+ case EFX_TUNNEL_PROTOCOL_NVGRE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NVGRE;
+ break;
+ default:
+ rc = ENOTSUP;
+ goto fail3;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_OUTER_RULE_INSERT;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_OUTER_RULE_INSERT_IN_LENMAX_MCDI2;
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_OUTER_RULE_INSERT_OUT_LEN;
+
+ MCDI_IN_SET_DWORD(req,
+ MAE_OUTER_RULE_INSERT_IN_ENCAP_TYPE, encap_type_mcdi);
+
+ MCDI_IN_SET_DWORD(req, MAE_OUTER_RULE_INSERT_IN_PRIO, spec->emms_prio);
+
+ /*
+ * Mask-value pairs have been stored in the byte order needed for the
+ * MCDI request and are thus safe to be copied directly to the buffer.
+ * The library cares about byte order in efx_mae_match_spec_field_set().
+ */
+ EFX_STATIC_ASSERT(sizeof (spec->emms_mask_value_pairs.outer) >=
+ MAE_ENC_FIELD_PAIRS_LEN);
+ offset = MC_CMD_MAE_OUTER_RULE_INSERT_IN_FIELD_MATCH_CRITERIA_OFST;
+ memcpy(payload + offset, spec->emms_mask_value_pairs.outer,
+ MAE_ENC_FIELD_PAIRS_LEN);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail4;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_OUTER_RULE_INSERT_OUT_LEN) {
+ rc = EMSGSIZE;
+ goto fail5;
+ }
+
+ or_id.id = MCDI_OUT_DWORD(req, MAE_OUTER_RULE_INSERT_OUT_OR_ID);
+ if (or_id.id == EFX_MAE_RSRC_ID_INVALID) {
+ rc = ENOENT;
+ goto fail6;
+ }
+
+ or_idp->id = or_id.id;
+
+ return (0);
+
+fail6:
+ EFSYS_PROBE(fail6);
+fail5:
+ EFSYS_PROBE(fail5);
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_outer_rule_remove(
+ __in efx_nic_t *enp,
+ __in const efx_mae_rule_id_t *or_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_OUTER_RULE_REMOVE_IN_LEN(1),
+ MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_LEN(1));
+ efx_rc_t rc;
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_OUTER_RULE_REMOVE;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_OUTER_RULE_REMOVE_IN_LEN(1);
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_LEN(1);
+
+ MCDI_IN_SET_DWORD(req, MAE_OUTER_RULE_REMOVE_IN_OR_ID, or_idp->id);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail2;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_LENMIN) {
+ rc = EMSGSIZE;
+ goto fail3;
+ }
+
+ if (MCDI_OUT_DWORD(req, MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID) !=
+ or_idp->id) {
+ /* Firmware failed to remove the outer rule. */
+ rc = EAGAIN;
+ goto fail4;
+ }
+
+ return (0);
+
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_match_spec_outer_rule_id_set(
+ __in efx_mae_match_spec_t *spec,
+ __in const efx_mae_rule_id_t *or_idp)
+{
+ uint32_t full_mask = UINT32_MAX;
+ efx_rc_t rc;
+
+ if (spec->emms_type != EFX_MAE_RULE_ACTION) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (or_idp == NULL) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ rc = efx_mae_match_spec_field_set(spec, EFX_MAE_FIELD_OUTER_RULE_ID,
+ sizeof (or_idp->id), (const uint8_t *)&or_idp->id,
+ sizeof (full_mask), (const uint8_t *)&full_mask);
+ if (rc != 0)
+ goto fail3;
+
+ return (0);
+
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_encap_header_alloc(
+ __in efx_nic_t *enp,
+ __in efx_tunnel_protocol_t encap_type,
+ __in_bcount(header_size) uint8_t *header_data,
+ __in size_t header_size,
+ __out efx_mae_eh_id_t *eh_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_LENMAX_MCDI2,
+ MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN);
+ uint32_t encap_type_mcdi;
+ efx_mae_eh_id_t eh_id;
+ efx_rc_t rc;
+
+ EFX_STATIC_ASSERT(sizeof (eh_idp->id) ==
+ MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID_LEN);
+
+ EFX_STATIC_ASSERT(EFX_MAE_RSRC_ID_INVALID ==
+ MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID_NULL);
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ switch (encap_type) {
+ case EFX_TUNNEL_PROTOCOL_NONE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NONE;
+ break;
+ case EFX_TUNNEL_PROTOCOL_VXLAN:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_VXLAN;
+ break;
+ case EFX_TUNNEL_PROTOCOL_GENEVE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_GENEVE;
+ break;
+ case EFX_TUNNEL_PROTOCOL_NVGRE:
+ encap_type_mcdi = MAE_MCDI_ENCAP_TYPE_NVGRE;
+ break;
+ default:
+ rc = ENOTSUP;
+ goto fail2;
+ }
+
+ if (header_size >
+ MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_HDR_DATA_MAXNUM_MCDI2) {
+ rc = EINVAL;
+ goto fail3;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ENCAP_HEADER_ALLOC;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_LEN(header_size);
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN;
+
+ MCDI_IN_SET_DWORD(req,
+ MAE_ENCAP_HEADER_ALLOC_IN_ENCAP_TYPE, encap_type_mcdi);
+
+ memcpy(payload + MC_CMD_MAE_ENCAP_HEADER_ALLOC_IN_HDR_DATA_OFST,
+ header_data, header_size);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail4;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_ENCAP_HEADER_ALLOC_OUT_LEN) {
+ rc = EMSGSIZE;
+ goto fail5;
+ }
+
+ eh_id.id = MCDI_OUT_DWORD(req,
+ MAE_ENCAP_HEADER_ALLOC_OUT_ENCAP_HEADER_ID);
+
+ if (eh_id.id == EFX_MAE_RSRC_ID_INVALID) {
+ rc = ENOENT;
+ goto fail6;
+ }
+
+ eh_idp->id = eh_id.id;
+
+ return (0);
+
+fail6:
+ EFSYS_PROBE(fail6);
+fail5:
+ EFSYS_PROBE(fail5);
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_encap_header_free(
+ __in efx_nic_t *enp,
+ __in const efx_mae_eh_id_t *eh_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ENCAP_HEADER_FREE_IN_LEN(1),
+ MC_CMD_MAE_ENCAP_HEADER_FREE_OUT_LEN(1));
+ efx_rc_t rc;
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ENCAP_HEADER_FREE;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ENCAP_HEADER_FREE_IN_LEN(1);
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ENCAP_HEADER_FREE_OUT_LEN(1);
+
+ MCDI_IN_SET_DWORD(req, MAE_ENCAP_HEADER_FREE_IN_EH_ID, eh_idp->id);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail2;
+ }
+
+ if (MCDI_OUT_DWORD(req, MAE_ENCAP_HEADER_FREE_OUT_FREED_EH_ID) !=
+ eh_idp->id) {
+ /* Firmware failed to remove the encap. header. */
+ rc = EAGAIN;
+ goto fail3;
+ }
+
+ return (0);
+
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_fill_in_eh_id(
+ __in efx_mae_actions_t *spec,
+ __in const efx_mae_eh_id_t *eh_idp)
+{
+ efx_rc_t rc;
+
+ if ((spec->ema_actions & (1U << EFX_MAE_ACTION_ENCAP)) == 0) {
+ /*
+ * The caller has not intended to have action ENCAP originally,
+ * hence, this attempt to indicate encap. header ID is invalid.
+ */
+ rc = EINVAL;
+ goto fail1;
+ }
+
+ if (spec->ema_rsrc.emar_eh_id.id != EFX_MAE_RSRC_ID_INVALID) {
+ /* The caller attempts to indicate encap. header ID twice. */
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ if (eh_idp->id == EFX_MAE_RSRC_ID_INVALID) {
+ rc = EINVAL;
+ goto fail3;
+ }
+
+ spec->ema_rsrc.emar_eh_id.id = eh_idp->id;
+
+ return (0);
+
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_alloc(
+ __in efx_nic_t *enp,
+ __in const efx_mae_actions_t *spec,
+ __out efx_mae_aset_id_t *aset_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ACTION_SET_ALLOC_IN_LEN,
+ MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN);
+ efx_mae_aset_id_t aset_id;
+ efx_rc_t rc;
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ACTION_SET_ALLOC;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ACTION_SET_ALLOC_IN_LEN;
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN;
+
+ /*
+ * TODO: Remove these EFX_MAE_RSRC_ID_INVALID assignments once the
+ * corresponding resource types are supported by the implementation.
+ * Use proper resource ID assignments instead.
+ */
+ MCDI_IN_SET_DWORD(req,
+ MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID, EFX_MAE_RSRC_ID_INVALID);
+ MCDI_IN_SET_DWORD(req,
+ MAE_ACTION_SET_ALLOC_IN_COUNTER_ID, EFX_MAE_RSRC_ID_INVALID);
+
+ if ((spec->ema_actions & (1U << EFX_MAE_ACTION_DECAP)) != 0) {
+ MCDI_IN_SET_DWORD_FIELD(req, MAE_ACTION_SET_ALLOC_IN_FLAGS,
+ MAE_ACTION_SET_ALLOC_IN_DECAP, 1);
+ }
+
+ MCDI_IN_SET_DWORD_FIELD(req, MAE_ACTION_SET_ALLOC_IN_FLAGS,
+ MAE_ACTION_SET_ALLOC_IN_VLAN_POP, spec->ema_n_vlan_tags_to_pop);
+
+ if (spec->ema_n_vlan_tags_to_push > 0) {
+ unsigned int outer_tag_idx;
+
+ MCDI_IN_SET_DWORD_FIELD(req, MAE_ACTION_SET_ALLOC_IN_FLAGS,
+ MAE_ACTION_SET_ALLOC_IN_VLAN_PUSH,
+ spec->ema_n_vlan_tags_to_push);
+
+ if (spec->ema_n_vlan_tags_to_push ==
+ EFX_MAE_VLAN_PUSH_MAX_NTAGS) {
+ MCDI_IN_SET_WORD(req,
+ MAE_ACTION_SET_ALLOC_IN_VLAN1_PROTO_BE,
+ spec->ema_vlan_push_descs[0].emavp_tpid_be);
+ MCDI_IN_SET_WORD(req,
+ MAE_ACTION_SET_ALLOC_IN_VLAN1_TCI_BE,
+ spec->ema_vlan_push_descs[0].emavp_tci_be);
+ }
+
+ outer_tag_idx = spec->ema_n_vlan_tags_to_push - 1;
+
+ MCDI_IN_SET_WORD(req, MAE_ACTION_SET_ALLOC_IN_VLAN0_PROTO_BE,
+ spec->ema_vlan_push_descs[outer_tag_idx].emavp_tpid_be);
+ MCDI_IN_SET_WORD(req, MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE,
+ spec->ema_vlan_push_descs[outer_tag_idx].emavp_tci_be);
+ }
+
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_SET_ALLOC_IN_ENCAP_HEADER_ID,
+ spec->ema_rsrc.emar_eh_id.id);
+
+ if ((spec->ema_actions & (1U << EFX_MAE_ACTION_FLAG)) != 0) {
+ MCDI_IN_SET_DWORD_FIELD(req, MAE_ACTION_SET_ALLOC_IN_FLAGS,
+ MAE_ACTION_SET_ALLOC_IN_FLAG, 1);
+ }
+
+ if ((spec->ema_actions & (1U << EFX_MAE_ACTION_MARK)) != 0) {
+ MCDI_IN_SET_DWORD_FIELD(req, MAE_ACTION_SET_ALLOC_IN_FLAGS,
+ MAE_ACTION_SET_ALLOC_IN_MARK, 1);
+
+ MCDI_IN_SET_DWORD(req,
+ MAE_ACTION_SET_ALLOC_IN_MARK_VALUE, spec->ema_mark_value);
+ }
+
+ MCDI_IN_SET_DWORD(req,
+ MAE_ACTION_SET_ALLOC_IN_DELIVER, spec->ema_deliver_mport.sel);
+
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_SET_ALLOC_IN_SRC_MAC_ID,
+ MC_CMD_MAE_MAC_ADDR_ALLOC_OUT_MAC_ID_NULL);
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID,
+ MC_CMD_MAE_MAC_ADDR_ALLOC_OUT_MAC_ID_NULL);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail2;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN) {
+ rc = EMSGSIZE;
+ goto fail3;
+ }
+
+ aset_id.id = MCDI_OUT_DWORD(req, MAE_ACTION_SET_ALLOC_OUT_AS_ID);
+ if (aset_id.id == EFX_MAE_RSRC_ID_INVALID) {
+ rc = ENOENT;
+ goto fail4;
+ }
+
+ aset_idp->id = aset_id.id;
+
+ return (0);
+
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_set_free(
+ __in efx_nic_t *enp,
+ __in const efx_mae_aset_id_t *aset_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ACTION_SET_FREE_IN_LEN(1),
+ MC_CMD_MAE_ACTION_SET_FREE_OUT_LEN(1));
+ efx_rc_t rc;
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ACTION_SET_FREE;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ACTION_SET_FREE_IN_LEN(1);
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ACTION_SET_FREE_OUT_LEN(1);
+
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_SET_FREE_IN_AS_ID, aset_idp->id);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail2;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_ACTION_SET_FREE_OUT_LENMIN) {
+ rc = EMSGSIZE;
+ goto fail3;
+ }
+
+ if (MCDI_OUT_DWORD(req, MAE_ACTION_SET_FREE_OUT_FREED_AS_ID) !=
+ aset_idp->id) {
+ /* Firmware failed to free the action set. */
+ rc = EAGAIN;
+ goto fail4;
+ }
+
+ return (0);
+
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_rule_insert(
+ __in efx_nic_t *enp,
+ __in const efx_mae_match_spec_t *spec,
+ __in const efx_mae_aset_list_id_t *asl_idp,
+ __in const efx_mae_aset_id_t *as_idp,
+ __out efx_mae_rule_id_t *ar_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ACTION_RULE_INSERT_IN_LENMAX_MCDI2,
+ MC_CMD_MAE_ACTION_RULE_INSERT_OUT_LEN);
+ efx_oword_t *rule_response;
+ efx_mae_rule_id_t ar_id;
+ size_t offset;
+ efx_rc_t rc;
+
+ EFX_STATIC_ASSERT(sizeof (ar_idp->id) ==
+ MC_CMD_MAE_ACTION_RULE_INSERT_OUT_AR_ID_LEN);
+
+ EFX_STATIC_ASSERT(EFX_MAE_RSRC_ID_INVALID ==
+ MC_CMD_MAE_ACTION_RULE_INSERT_OUT_ACTION_RULE_ID_NULL);
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ if (spec->emms_type != EFX_MAE_RULE_ACTION ||
+ (asl_idp != NULL && as_idp != NULL) ||
+ (asl_idp == NULL && as_idp == NULL)) {
+ rc = EINVAL;
+ goto fail2;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ACTION_RULE_INSERT;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ACTION_RULE_INSERT_IN_LENMAX_MCDI2;
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ACTION_RULE_INSERT_OUT_LEN;
+
+ EFX_STATIC_ASSERT(sizeof (*rule_response) <=
+ MC_CMD_MAE_ACTION_RULE_INSERT_IN_RESPONSE_LEN);
+ offset = MC_CMD_MAE_ACTION_RULE_INSERT_IN_RESPONSE_OFST;
+ rule_response = (efx_oword_t *)(payload + offset);
+ EFX_POPULATE_OWORD_3(*rule_response,
+ MAE_ACTION_RULE_RESPONSE_ASL_ID,
+ (asl_idp != NULL) ? asl_idp->id : EFX_MAE_RSRC_ID_INVALID,
+ MAE_ACTION_RULE_RESPONSE_AS_ID,
+ (as_idp != NULL) ? as_idp->id : EFX_MAE_RSRC_ID_INVALID,
+ MAE_ACTION_RULE_RESPONSE_COUNTER_ID, EFX_MAE_RSRC_ID_INVALID);
+
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_RULE_INSERT_IN_PRIO, spec->emms_prio);
+
+ /*
+ * Mask-value pairs have been stored in the byte order needed for the
+ * MCDI request and are thus safe to be copied directly to the buffer.
+ */
+ EFX_STATIC_ASSERT(sizeof (spec->emms_mask_value_pairs.action) >=
+ MAE_FIELD_MASK_VALUE_PAIRS_LEN);
+ offset = MC_CMD_MAE_ACTION_RULE_INSERT_IN_MATCH_CRITERIA_OFST;
+ memcpy(payload + offset, spec->emms_mask_value_pairs.action,
+ MAE_FIELD_MASK_VALUE_PAIRS_LEN);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail3;
+ }
+
+ if (req.emr_out_length_used < MC_CMD_MAE_ACTION_RULE_INSERT_OUT_LEN) {
+ rc = EMSGSIZE;
+ goto fail4;
+ }
+
+ ar_id.id = MCDI_OUT_DWORD(req, MAE_ACTION_RULE_INSERT_OUT_AR_ID);
+ if (ar_id.id == EFX_MAE_RSRC_ID_INVALID) {
+ rc = ENOENT;
+ goto fail5;
+ }
+
+ ar_idp->id = ar_id.id;
+
+ return (0);
+
+fail5:
+ EFSYS_PROBE(fail5);
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_mae_action_rule_remove(
+ __in efx_nic_t *enp,
+ __in const efx_mae_rule_id_t *ar_idp)
+{
+ const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ efx_mcdi_req_t req;
+ EFX_MCDI_DECLARE_BUF(payload,
+ MC_CMD_MAE_ACTION_RULE_DELETE_IN_LEN(1),
+ MC_CMD_MAE_ACTION_RULE_DELETE_OUT_LEN(1));
+ efx_rc_t rc;
+
+ if (encp->enc_mae_supported == B_FALSE) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ req.emr_cmd = MC_CMD_MAE_ACTION_RULE_DELETE;
+ req.emr_in_buf = payload;
+ req.emr_in_length = MC_CMD_MAE_ACTION_RULE_DELETE_IN_LEN(1);
+ req.emr_out_buf = payload;
+ req.emr_out_length = MC_CMD_MAE_ACTION_RULE_DELETE_OUT_LEN(1);
+
+ MCDI_IN_SET_DWORD(req, MAE_ACTION_RULE_DELETE_IN_AR_ID, ar_idp->id);
+
+ efx_mcdi_execute(enp, &req);
+
+ if (req.emr_rc != 0) {
+ rc = req.emr_rc;
+ goto fail2;
+ }
+
+ if (req.emr_out_length_used <
+ MC_CMD_MAE_ACTION_RULE_DELETE_OUT_LENMIN) {
+ rc = EMSGSIZE;
+ goto fail3;
+ }
+
+ if (MCDI_OUT_DWORD(req, MAE_ACTION_RULE_DELETE_OUT_DELETED_AR_ID) !=
+ ar_idp->id) {
+ /* Firmware failed to delete the action rule. */
+ rc = EAGAIN;
+ goto fail4;
+ }
+
+ return (0);
+
+fail4:
+ EFSYS_PROBE(fail4);
+fail3:
+ EFSYS_PROBE(fail3);