+ if (result) {
+ err = -EIO;
+ goto exit;
+ }
+
+exit:
+ pthread_mutex_unlock(&self->mbox_mutex);
+
+ return err;
+}
+
+static int aq_fw2x_send_macsec_request(struct aq_hw_s *self,
+ struct macsec_msg_fw_request *req,
+ struct macsec_msg_fw_response *response)
+{
+ int err = 0;
+ u32 mpi_opts = 0;
+
+ if (!req || !response)
+ return 0;
+
+ if ((self->caps_lo & BIT(CAPS_LO_MACSEC)) == 0)
+ return -EOPNOTSUPP;
+
+ pthread_mutex_lock(&self->mbox_mutex);
+
+ /* Write macsec request to cfg memory */
+ err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr,
+ (u32 *)(void *)req,
+ RTE_ALIGN(sizeof(*req) / sizeof(u32), sizeof(u32)));
+
+ if (err < 0)
+ goto exit;
+
+ /* Toggle 0x368.CAPS_LO_MACSEC bit */
+ mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR);
+ mpi_opts ^= BIT(CAPS_LO_MACSEC);
+
+ aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, mpi_opts);
+
+ /* Wait until REQUEST_BIT matched in 0x370 */
+ AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR) &
+ BIT(CAPS_LO_MACSEC)) == (mpi_opts & BIT(CAPS_LO_MACSEC)),
+ 1000U, 10000U);
+
+ if (err < 0)
+ goto exit;
+
+ /* Read status of write operation */
+ err = hw_atl_utils_fw_downld_dwords(self, self->rpc_addr + sizeof(u32),
+ (u32 *)(void *)response,
+ RTE_ALIGN(sizeof(*response) / sizeof(u32), sizeof(u32)));
+
+exit:
+ pthread_mutex_unlock(&self->mbox_mutex);
+
+ return err;