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net/dpaa2: support configuring dpdmux max Rx frame length
[dpdk.git]
/
drivers
/
net
/
bnxt
/
bnxt.h
diff --git
a/drivers/net/bnxt/bnxt.h
b/drivers/net/bnxt/bnxt.h
index
14f52b2
..
b4370e5
100644
(file)
--- a/
drivers/net/bnxt/bnxt.h
+++ b/
drivers/net/bnxt/bnxt.h
@@
-1,5
+1,5
@@
/* SPDX-License-Identifier: BSD-3-Clause
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-20
18
Broadcom
+ * Copyright(c) 2014-20
21
Broadcom
* All rights reserved.
*/
* All rights reserved.
*/
@@
-12,7
+12,7
@@
#include <rte_pci.h>
#include <rte_bus_pci.h>
#include <rte_pci.h>
#include <rte_bus_pci.h>
-#include <
rte_
ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_memory.h>
#include <rte_lcore.h>
#include <rte_spinlock.h>
#include <rte_memory.h>
#include <rte_lcore.h>
#include <rte_spinlock.h>
@@
-643,6
+643,9
@@
struct bnxt {
#define BNXT_FLAG_DFLT_MAC_SET BIT(26)
#define BNXT_FLAG_TRUFLOW_EN BIT(27)
#define BNXT_FLAG_GFID_ENABLE BIT(28)
#define BNXT_FLAG_DFLT_MAC_SET BIT(26)
#define BNXT_FLAG_TRUFLOW_EN BIT(27)
#define BNXT_FLAG_GFID_ENABLE BIT(28)
+#define BNXT_FLAG_RFS_NEEDS_VNIC BIT(29)
+#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(30)
+#define BNXT_RFS_NEEDS_VNIC(bp) ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
#define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
#define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF)
@@
-735,6
+738,11
@@
struct bnxt {
* health_check_lock
*/
pthread_mutex_t health_check_lock;
* health_check_lock
*/
pthread_mutex_t health_check_lock;
+ /* synchronize between dev_stop/dev_close_op and
+ * error recovery thread triggered as part of
+ * HWRM_ASYNC_EVENT_CMPL_EVENT_ID_RESET_NOTIFY
+ */
+ pthread_mutex_t err_recovery_lock;
uint16_t max_req_len;
uint16_t max_resp_len;
uint16_t hwrm_max_ext_req_len;
uint16_t max_req_len;
uint16_t max_resp_len;
uint16_t hwrm_max_ext_req_len;