+
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
+uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
+ uint16_t nb_pkts);
+int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
+#endif
+
+void bnxt_set_mark_in_mbuf(struct bnxt *bp,
+ struct rx_pkt_cmpl_hi *rxcmp1,
+ struct rte_mbuf *mbuf);
+
+typedef uint32_t bnxt_cfa_code_dynfield_t;
+extern int bnxt_cfa_code_dynfield_offset;
+
+static inline bnxt_cfa_code_dynfield_t *
+bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
+{
+ return RTE_MBUF_DYNFIELD(mbuf,
+ bnxt_cfa_code_dynfield_offset, bnxt_cfa_code_dynfield_t *);
+}
+
+#define BNXT_RX_META_CFA_CODE_SHIFT 19
+#define BNXT_CFA_CODE_META_SHIFT 16
+#define BNXT_RX_META_CFA_CODE_INT_ACT_REC_BIT 0x8000000
+#define BNXT_RX_META_CFA_CODE_EEM_BIT 0x4000000
+#define BNXT_CFA_META_FMT_MASK 0x70
+#define BNXT_CFA_META_FMT_SHFT 4
+#define BNXT_CFA_META_FMT_EM_EEM_SHFT 1
+#define BNXT_CFA_META_FMT_EEM 3
+#define BNXT_CFA_META_EEM_TCAM_SHIFT 31
+#define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
+
+#define BNXT_PTYPE_TBL_DIM 128
+extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
+
+#define BNXT_OL_FLAGS_TBL_DIM 32
+extern uint32_t bnxt_ol_flags_table[BNXT_OL_FLAGS_TBL_DIM];
+
+#define BNXT_OL_FLAGS_ERR_TBL_DIM 16
+extern uint32_t bnxt_ol_flags_err_table[BNXT_OL_FLAGS_ERR_TBL_DIM];