+
+const struct hcapi_cfa_field cfa_p40_mirror_tbl_layout[] = {
+ {CFA_P40_MIRROR_TBL_SP_PTR_BITPOS,
+ CFA_P40_MIRROR_TBL_SP_PTR_NUM_BITS},
+
+ {CFA_P40_MIRROR_TBL_IGN_DROP_BITPOS,
+ CFA_P40_MIRROR_TBL_IGN_DROP_NUM_BITS},
+
+ {CFA_P40_MIRROR_TBL_COPY_BITPOS,
+ CFA_P40_MIRROR_TBL_COPY_NUM_BITS},
+
+ {CFA_P40_MIRROR_TBL_EN_BITPOS,
+ CFA_P40_MIRROR_TBL_EN_NUM_BITS},
+
+ {CFA_P40_MIRROR_TBL_AR_PTR_BITPOS,
+ CFA_P40_MIRROR_TBL_AR_PTR_NUM_BITS},
+};
+
+/* P45 Defines */
+
+const struct hcapi_cfa_field cfa_p45_prof_l2_ctxt_tcam_layout[] = {
+ {CFA_P45_PROF_L2_CTXT_TCAM_VALID_BITPOS,
+ CFA_P45_PROF_L2_CTXT_TCAM_VALID_NUM_BITS},
+ {CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_BITPOS,
+ CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS},
+ {CFA_P45_PROF_L2_CTXT_TCAM_SVIF_BITPOS,
+ CFA_P45_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS},
+ {CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS,
+ CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS},
+};