-enum bnxt_ulp_cache_tbl_id {
- BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_INGRESS = 0,
- BNXT_ULP_CACHE_TBL_ID_L2_CNTXT_TCAM_EGRESS = 1,
- BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_INGRESS = 2,
- BNXT_ULP_CACHE_TBL_ID_PROFILE_TCAM_EGRESS = 3,
- BNXT_ULP_CACHE_TBL_ID_LAST = 4
-};
-
-enum bnxt_ulp_chf_idx {
- BNXT_ULP_CHF_IDX_MPLS_TAG_NUM = 0,
- BNXT_ULP_CHF_IDX_O_VTAG_NUM = 1,
- BNXT_ULP_CHF_IDX_O_VTAG_PRESENT = 2,
- BNXT_ULP_CHF_IDX_O_TWO_VTAGS = 3,
- BNXT_ULP_CHF_IDX_I_VTAG_NUM = 4,
- BNXT_ULP_CHF_IDX_I_VTAG_PRESENT = 5,
- BNXT_ULP_CHF_IDX_I_TWO_VTAGS = 6,
- BNXT_ULP_CHF_IDX_INCOMING_IF = 7,
- BNXT_ULP_CHF_IDX_DIRECTION = 8,
- BNXT_ULP_CHF_IDX_SVIF = 9,
- BNXT_ULP_CHF_IDX_O_L3 = 10,
- BNXT_ULP_CHF_IDX_I_L3 = 11,
- BNXT_ULP_CHF_IDX_O_L4 = 12,
- BNXT_ULP_CHF_IDX_I_L4 = 13,
- BNXT_ULP_CHF_IDX_LAST = 14
+enum bnxt_ulp_cf_idx {
+ BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 0,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM = 1,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT = 2,
+ BNXT_ULP_CF_IDX_O_TWO_VTAGS = 3,
+ BNXT_ULP_CF_IDX_I_VTAG_NUM = 4,
+ BNXT_ULP_CF_IDX_I_VTAG_PRESENT = 5,
+ BNXT_ULP_CF_IDX_I_TWO_VTAGS = 6,
+ BNXT_ULP_CF_IDX_INCOMING_IF = 7,
+ BNXT_ULP_CF_IDX_DIRECTION = 8,
+ BNXT_ULP_CF_IDX_SVIF_FLAG = 9,
+ BNXT_ULP_CF_IDX_O_L3 = 10,
+ BNXT_ULP_CF_IDX_I_L3 = 11,
+ BNXT_ULP_CF_IDX_O_L4 = 12,
+ BNXT_ULP_CF_IDX_I_L4 = 13,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID = 14,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 15,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 16,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 17,
+ BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 18,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 19,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 20,
+ BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 21,
+ BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 22,
+ BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 23,
+ BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 24,
+ BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 25,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 26,
+ BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 27,
+ BNXT_ULP_CF_IDX_LAST = 28