+ BNXT_ULP_SPEC_OPC_SET_TO_COMP_FIELD = 2,
+ BNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,
+ BNXT_ULP_SPEC_OPC_SET_TO_GLB_REGFILE = 4,
+ BNXT_ULP_SPEC_OPC_ADD_PAD = 5,
+ BNXT_ULP_SPEC_OPC_LAST = 6
+};
+
+enum bnxt_ulp_vfr_flag {
+ BNXT_ULP_VFR_FLAG_NO = 0,
+ BNXT_ULP_VFR_FLAG_YES = 1,
+ BNXT_ULP_VFR_FLAG_LAST = 2
+};
+
+enum bnxt_ulp_encap_vtag_encoding {
+ BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_ECAP_PRI = 4,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_DTAG_REMAP_DIFFSERV = 5,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_ECAP_PRI = 6,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_DIFFSERV = 7,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_0 = 8,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_1 = 9,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_2 = 10,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_3 = 11,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_4 = 12,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_5 = 13,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_6 = 14,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NO_TAG_REMAP_PRI_7 = 15,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_NOP = 0,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_ECAP_PRI = 1,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_IVLAN_PRI = 2,
+ BNXT_ULP_ENCAP_VTAG_ENCODING_STAG_REMAP_DIFFSERV = 3
+};
+
+enum bnxt_ulp_vfr_flag {
+ BNXT_ULP_VFR_FLAG_NO = 0,
+ BNXT_ULP_VFR_FLAG_YES = 1,
+ BNXT_ULP_VFR_FLAG_LAST = 2
+};
+
+enum bnxt_ulp_fdb_resource_flags {
+ BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01,
+ BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_INGR = 0x00
+};
+
+enum bnxt_ulp_fdb_type {
+ BNXT_ULP_FDB_TYPE_DEFAULT = 1,
+ BNXT_ULP_FDB_TYPE_REGULAR = 0
+};
+
+enum bnxt_ulp_flow_dir_bitmask {
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000,
+ BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000
+};
+
+enum bnxt_ulp_match_type_bitmask {
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,
+ BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001
+};
+
+enum bnxt_ulp_resource_func {
+ BNXT_ULP_RESOURCE_FUNC_INVALID = 0x00,
+ BNXT_ULP_RESOURCE_FUNC_EM_TABLE = 0x20,
+ BNXT_ULP_RESOURCE_FUNC_RSVD1 = 0x40,
+ BNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60,
+ BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80,
+ BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81,
+ BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE = 0x82,
+ BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83,
+ BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84,
+ BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85
+};
+
+enum bnxt_ulp_resource_sub_type {
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0,
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_CNT_IDX = 3,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_CNT_IDX = 2,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_ACT_IDX = 1,
+ BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0