+struct dpni_cmd_set_opr {
+ uint8_t pad0;
+ uint8_t tc_id;
+ uint8_t index;
+ uint8_t options;
+ uint8_t pad1[7];
+ uint8_t oloe;
+ uint8_t oeane;
+ uint8_t olws;
+ uint8_t oa;
+ uint8_t oprrws;
+};
+
+struct dpni_cmd_get_opr {
+ uint8_t pad;
+ uint8_t tc_id;
+ uint8_t index;
+};
+
+#define DPNI_RIP_SHIFT 0
+#define DPNI_RIP_SIZE 1
+#define DPNI_OPR_ENABLE_SHIFT 1
+#define DPNI_OPR_ENABLE_SIZE 1
+#define DPNI_TSEQ_NLIS_SHIFT 0
+#define DPNI_TSEQ_NLIS_SIZE 1
+#define DPNI_HSEQ_NLIS_SHIFT 0
+#define DPNI_HSEQ_NLIS_SIZE 1
+
+struct dpni_rsp_get_opr {
+ uint64_t pad0;
+ /* from LSB: rip:1 enable:1 */
+ uint8_t flags;
+ uint16_t pad1;
+ uint8_t oloe;
+ uint8_t oeane;
+ uint8_t olws;
+ uint8_t oa;
+ uint8_t oprrws;
+ uint16_t nesn;
+ uint16_t pad8;
+ uint16_t ndsn;
+ uint16_t pad2;
+ uint16_t ea_tseq;
+ /* only the LSB */
+ uint8_t tseq_nlis;
+ uint8_t pad3;
+ uint16_t ea_hseq;
+ /* only the LSB */
+ uint8_t hseq_nlis;
+ uint8_t pad4;
+ uint16_t ea_hptr;
+ uint16_t pad5;
+ uint16_t ea_tptr;
+ uint16_t pad6;
+ uint16_t opr_vid;
+ uint16_t pad7;
+ uint16_t opr_id;
+};
+
+struct dpni_cmd_add_custom_tpid {
+ uint16_t pad;
+ uint16_t tpid;
+};
+
+struct dpni_cmd_remove_custom_tpid {
+ uint16_t pad;
+ uint16_t tpid;
+};
+
+struct dpni_rsp_get_custom_tpid {
+ uint16_t tpid1;
+ uint16_t tpid2;
+};
+
+#define DPNI_RX_FS_DIST_ENABLE_SHIFT 0
+#define DPNI_RX_FS_DIST_ENABLE_SIZE 1
+struct dpni_cmd_set_rx_fs_dist {
+ uint16_t dist_size;
+ uint8_t enable;
+ uint8_t tc;
+ uint16_t miss_flow_id;
+ uint16_t pad1;
+ uint64_t key_cfg_iova;
+};
+
+#define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0
+#define DPNI_RX_HASH_DIST_ENABLE_SIZE 1
+struct dpni_cmd_set_rx_hash_dist {
+ uint16_t dist_size;
+ uint8_t enable;
+ uint8_t tc_id;
+ uint32_t pad;
+ uint64_t key_cfg_iova;
+};
+
+struct dpni_load_sw_sequence {
+ uint8_t dest;
+ uint8_t pad0[7];
+ uint16_t ss_offset;
+ uint16_t pad1;
+ uint16_t ss_size;
+ uint16_t pad2;
+ uint64_t ss_iova;
+};
+
+struct dpni_enable_sw_sequence {
+ uint8_t dest;
+ uint8_t pad0[7];
+ uint16_t ss_offset;
+ uint16_t hxs;
+ uint8_t set_start;
+ uint8_t pad1[3];
+ uint8_t param_offset;
+ uint8_t pad2[3];
+ uint8_t param_size;
+ uint8_t pad3[3];
+ uint64_t param_iova;
+};
+
+struct dpni_get_sw_sequence_layout {
+ uint8_t src;
+ uint8_t pad0[7];
+ uint64_t layout_iova;
+};
+
+struct dpni_sw_sequence_layout_entry {
+ uint16_t ss_offset;
+ uint16_t ss_size;
+ uint8_t param_offset;
+ uint8_t param_size;
+ uint16_t pad;
+};
+