+
+ dev->dev_ops = NULL;
+ dev->rx_pkt_burst = NULL;
+ dev->tx_pkt_burst = NULL;
+
+ /* Reset any pending lock */
+ igb_reset_swfw_lock(hw);
+
+ /* uninitialize PF if max_vfs not zero */
+ igb_pf_host_uninit(dev);
+
+ rte_intr_callback_unregister(intr_handle,
+ eth_igb_interrupt_handler, dev);
+
+ /* clear the SYN filter info */
+ filter_info->syn_info = 0;
+
+ /* clear the ethertype filters info */
+ filter_info->ethertype_mask = 0;
+ memset(filter_info->ethertype_filters, 0,
+ E1000_MAX_ETQF_FILTERS * sizeof(struct igb_ethertype_filter));
+
+ /* clear the rss filter info */
+ memset(&filter_info->rss_info, 0,
+ sizeof(struct igb_rte_flow_rss_conf));
+
+ /* remove all ntuple filters of the device */
+ igb_ntuple_filter_uninit(dev);
+
+ /* remove all flex filters of the device */
+ igb_flex_filter_uninit(dev);
+
+ /* clear all the filters list */
+ igb_filterlist_flush(dev);
+}
+
+/*
+ * Reset PF device.
+ */
+static int
+eth_igb_reset(struct rte_eth_dev *dev)
+{
+ int ret;
+
+ /* When a DPDK PMD PF begin to reset PF port, it should notify all
+ * its VF to make them align with it. The detailed notification
+ * mechanism is PMD specific and is currently not implemented.
+ * To avoid unexpected behavior in VF, currently reset of PF with
+ * SR-IOV activation is not supported. It might be supported later.
+ */
+ if (dev->data->sriov.active)
+ return -ENOTSUP;
+
+ ret = eth_igb_dev_uninit(dev);
+ if (ret)
+ return ret;
+
+ ret = eth_igb_dev_init(dev);
+
+ return ret;