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net: add rte prefix to IP structure
[dpdk.git]
/
drivers
/
net
/
e1000
/
igb_rxtx.c
diff --git
a/drivers/net/e1000/igb_rxtx.c
b/drivers/net/e1000/igb_rxtx.c
index
128ed0b
..
01f5e73
100644
(file)
--- a/
drivers/net/e1000/igb_rxtx.c
+++ b/
drivers/net/e1000/igb_rxtx.c
@@
-50,6
+50,10
@@
#endif
/* Bit Mask to indicate what bits required for building TX context */
#define IGB_TX_OFFLOAD_MASK ( \
#endif
/* Bit Mask to indicate what bits required for building TX context */
#define IGB_TX_OFFLOAD_MASK ( \
+ PKT_TX_OUTER_IPV6 | \
+ PKT_TX_OUTER_IPV4 | \
+ PKT_TX_IPV6 | \
+ PKT_TX_IPV4 | \
PKT_TX_VLAN_PKT | \
PKT_TX_IP_CKSUM | \
PKT_TX_L4_MASK | \
PKT_TX_VLAN_PKT | \
PKT_TX_IP_CKSUM | \
PKT_TX_L4_MASK | \
@@
-1143,17
+1147,17
@@
eth_igb_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
*/
rxm->next = NULL;
if (unlikely(rxq->crc_len > 0)) {
*/
rxm->next = NULL;
if (unlikely(rxq->crc_len > 0)) {
- first_seg->pkt_len -= ETHER_CRC_LEN;
- if (data_len <= ETHER_CRC_LEN) {
+ first_seg->pkt_len -=
RTE_
ETHER_CRC_LEN;
+ if (data_len <=
RTE_
ETHER_CRC_LEN) {
rte_pktmbuf_free_seg(rxm);
first_seg->nb_segs--;
last_seg->data_len = (uint16_t)
(last_seg->data_len -
rte_pktmbuf_free_seg(rxm);
first_seg->nb_segs--;
last_seg->data_len = (uint16_t)
(last_seg->data_len -
- (ETHER_CRC_LEN - data_len));
+ (
RTE_
ETHER_CRC_LEN - data_len));
last_seg->next = NULL;
} else
last_seg->next = NULL;
} else
- rxm->data_len =
- (
uint16_t) (data_len -
ETHER_CRC_LEN);
+ rxm->data_len =
(uint16_t)
+ (
data_len - RTE_
ETHER_CRC_LEN);
}
/*
}
/*
@@
-1452,27
+1456,28
@@
igb_reset_tx_queue(struct igb_tx_queue *txq, struct rte_eth_dev *dev)
uint64_t
igb_get_tx_port_offloads_capa(struct rte_eth_dev *dev)
{
uint64_t
igb_get_tx_port_offloads_capa(struct rte_eth_dev *dev)
{
- uint64_t
r
x_offload_capa;
+ uint64_t
t
x_offload_capa;
RTE_SET_USED(dev);
RTE_SET_USED(dev);
-
r
x_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
+
t
x_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
DEV_TX_OFFLOAD_IPV4_CKSUM |
DEV_TX_OFFLOAD_UDP_CKSUM |
DEV_TX_OFFLOAD_TCP_CKSUM |
DEV_TX_OFFLOAD_SCTP_CKSUM |
DEV_TX_OFFLOAD_IPV4_CKSUM |
DEV_TX_OFFLOAD_UDP_CKSUM |
DEV_TX_OFFLOAD_TCP_CKSUM |
DEV_TX_OFFLOAD_SCTP_CKSUM |
- DEV_TX_OFFLOAD_TCP_TSO;
+ DEV_TX_OFFLOAD_TCP_TSO |
+ DEV_TX_OFFLOAD_MULTI_SEGS;
- return
r
x_offload_capa;
+ return
t
x_offload_capa;
}
uint64_t
igb_get_tx_queue_offloads_capa(struct rte_eth_dev *dev)
{
}
uint64_t
igb_get_tx_queue_offloads_capa(struct rte_eth_dev *dev)
{
- uint64_t
r
x_queue_offload_capa;
+ uint64_t
t
x_queue_offload_capa;
-
r
x_queue_offload_capa = igb_get_tx_port_offloads_capa(dev);
+
t
x_queue_offload_capa = igb_get_tx_port_offloads_capa(dev);
- return
r
x_queue_offload_capa;
+ return
t
x_queue_offload_capa;
}
int
}
int
@@
-1637,7
+1642,7
@@
igb_get_rx_port_offloads_capa(struct rte_eth_dev *dev)
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_UDP_CKSUM |
DEV_RX_OFFLOAD_TCP_CKSUM |
DEV_RX_OFFLOAD_JUMBO_FRAME |
- DEV_RX_OFFLOAD_
CRC_STRIP
|
+ DEV_RX_OFFLOAD_
KEEP_CRC
|
DEV_RX_OFFLOAD_SCATTER;
return rx_offload_capa;
DEV_RX_OFFLOAD_SCATTER;
return rx_offload_capa;
@@
-1719,8
+1724,10
@@
eth_igb_rx_queue_setup(struct rte_eth_dev *dev,
rxq->reg_idx = (uint16_t)((RTE_ETH_DEV_SRIOV(dev).active == 0) ?
queue_idx : RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue_idx);
rxq->port_id = dev->data->port_id;
rxq->reg_idx = (uint16_t)((RTE_ETH_DEV_SRIOV(dev).active == 0) ?
queue_idx : RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx + queue_idx);
rxq->port_id = dev->data->port_id;
- rxq->crc_len = (uint8_t)((dev->data->dev_conf.rxmode.offloads &
- DEV_RX_OFFLOAD_CRC_STRIP) ? 0 : ETHER_CRC_LEN);
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+ rxq->crc_len = RTE_ETHER_CRC_LEN;
+ else
+ rxq->crc_len = 0;
/*
* Allocate RX ring hardware descriptors. A memzone large enough to
/*
* Allocate RX ring hardware descriptors. A memzone large enough to
@@
-2370,8
+2377,10
@@
eth_igb_rx_init(struct rte_eth_dev *dev)
* Reset crc_len in case it was changed after queue setup by a
* call to configure
*/
* Reset crc_len in case it was changed after queue setup by a
* call to configure
*/
- rxq->crc_len = (uint8_t)(dev->data->dev_conf.rxmode.offloads &
- DEV_RX_OFFLOAD_CRC_STRIP ? 0 : ETHER_CRC_LEN);
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+ rxq->crc_len = RTE_ETHER_CRC_LEN;
+ else
+ rxq->crc_len = 0;
bus_addr = rxq->rx_ring_phys_addr;
E1000_WRITE_REG(hw, E1000_RDLEN(rxq->reg_idx),
bus_addr = rxq->rx_ring_phys_addr;
E1000_WRITE_REG(hw, E1000_RDLEN(rxq->reg_idx),
@@
-2500,10
+2509,10
@@
eth_igb_rx_init(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
/* Setup the Receive Control Register. */
E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
/* Setup the Receive Control Register. */
- if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_
CRC_STRIP
) {
- rctl
|= E1000_RCTL_SECRC; /*
Strip Ethernet CRC. */
+ if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_
KEEP_CRC
) {
+ rctl
&= ~E1000_RCTL_SECRC; /* Do not
Strip Ethernet CRC. */
- /*
set
STRCRC bit in all queues */
+ /*
clear
STRCRC bit in all queues */
if (hw->mac.type == e1000_i350 ||
hw->mac.type == e1000_i210 ||
hw->mac.type == e1000_i211 ||
if (hw->mac.type == e1000_i350 ||
hw->mac.type == e1000_i210 ||
hw->mac.type == e1000_i211 ||
@@
-2512,14
+2521,14
@@
eth_igb_rx_init(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(rxq->reg_idx));
rxq = dev->data->rx_queues[i];
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(rxq->reg_idx));
- dvmolr
|=
E1000_DVMOLR_STRCRC;
+ dvmolr
&= ~
E1000_DVMOLR_STRCRC;
E1000_WRITE_REG(hw, E1000_DVMOLR(rxq->reg_idx), dvmolr);
}
}
} else {
E1000_WRITE_REG(hw, E1000_DVMOLR(rxq->reg_idx), dvmolr);
}
}
} else {
- rctl
&= ~E1000_RCTL_SECRC; /* Do not
Strip Ethernet CRC. */
+ rctl
|= E1000_RCTL_SECRC; /*
Strip Ethernet CRC. */
- /*
clear
STRCRC bit in all queues */
+ /*
set
STRCRC bit in all queues */
if (hw->mac.type == e1000_i350 ||
hw->mac.type == e1000_i210 ||
hw->mac.type == e1000_i211 ||
if (hw->mac.type == e1000_i350 ||
hw->mac.type == e1000_i210 ||
hw->mac.type == e1000_i211 ||
@@
-2528,7
+2537,7
@@
eth_igb_rx_init(struct rte_eth_dev *dev)
rxq = dev->data->rx_queues[i];
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(rxq->reg_idx));
rxq = dev->data->rx_queues[i];
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(rxq->reg_idx));
- dvmolr
&= ~
E1000_DVMOLR_STRCRC;
+ dvmolr
|=
E1000_DVMOLR_STRCRC;
E1000_WRITE_REG(hw, E1000_DVMOLR(rxq->reg_idx), dvmolr);
}
}
E1000_WRITE_REG(hw, E1000_DVMOLR(rxq->reg_idx), dvmolr);
}
}
@@
-2846,11
+2855,17
@@
igb_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
}
int
}
int
-igb_rss_conf_init(struct igb_rte_flow_rss_conf *out,
+igb_rss_conf_init(struct rte_eth_dev *dev,
+ struct igb_rte_flow_rss_conf *out,
const struct rte_flow_action_rss *in)
{
const struct rte_flow_action_rss *in)
{
+ struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
if (in->key_len > RTE_DIM(out->key) ||
if (in->key_len > RTE_DIM(out->key) ||
- in->queue_num > RTE_DIM(out->queue))
+ ((hw->mac.type == e1000_82576) &&
+ (in->queue_num > IGB_MAX_RX_QUEUE_NUM_82576)) ||
+ ((hw->mac.type != e1000_82576) &&
+ (in->queue_num > IGB_MAX_RX_QUEUE_NUM)))
return -EINVAL;
out->conf = (struct rte_flow_action_rss){
.func = in->func,
return -EINVAL;
out->conf = (struct rte_flow_action_rss){
.func = in->func,
@@
-2939,7
+2954,7
@@
igb_config_rss_filter(struct rte_eth_dev *dev,
rss_conf.rss_key = rss_intel_key; /* Default hash key */
igb_hw_rss_hash_set(hw, &rss_conf);
rss_conf.rss_key = rss_intel_key; /* Default hash key */
igb_hw_rss_hash_set(hw, &rss_conf);
- if (igb_rss_conf_init(&filter_info->rss_info, &conf->conf))
+ if (igb_rss_conf_init(
dev,
&filter_info->rss_info, &conf->conf))
return -EINVAL;
return 0;
return -EINVAL;
return 0;