+static int ena_process_bool_devarg(const char *key,
+ const char *value,
+ void *opaque)
+{
+ struct ena_adapter *adapter = opaque;
+ bool bool_value;
+
+ /* Parse the value. */
+ if (strcmp(value, "1") == 0) {
+ bool_value = true;
+ } else if (strcmp(value, "0") == 0) {
+ bool_value = false;
+ } else {
+ PMD_INIT_LOG(ERR,
+ "Invalid value: '%s' for key '%s'. Accepted: '0' or '1'\n",
+ value, key);
+ return -EINVAL;
+ }
+
+ /* Now, assign it to the proper adapter field. */
+ if (strcmp(key, ENA_DEVARG_LARGE_LLQ_HDR) == 0)
+ adapter->use_large_llq_hdr = bool_value;
+
+ return 0;
+}
+
+static int ena_parse_devargs(struct ena_adapter *adapter,
+ struct rte_devargs *devargs)
+{
+ static const char * const allowed_args[] = {
+ ENA_DEVARG_LARGE_LLQ_HDR,
+ NULL,
+ };
+ struct rte_kvargs *kvlist;
+ int rc;
+
+ if (devargs == NULL)
+ return 0;
+
+ kvlist = rte_kvargs_parse(devargs->args, allowed_args);
+ if (kvlist == NULL) {
+ PMD_INIT_LOG(ERR, "Invalid device arguments: %s\n",
+ devargs->args);
+ return -EINVAL;
+ }
+
+ rc = rte_kvargs_process(kvlist, ENA_DEVARG_LARGE_LLQ_HDR,
+ ena_process_bool_devarg, adapter);
+
+ rte_kvargs_free(kvlist);
+
+ return rc;
+}
+
+static int ena_setup_rx_intr(struct rte_eth_dev *dev)
+{
+ struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+ struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
+ int rc;
+ uint16_t vectors_nb, i;
+ bool rx_intr_requested = dev->data->dev_conf.intr_conf.rxq;
+
+ if (!rx_intr_requested)
+ return 0;
+
+ if (!rte_intr_cap_multiple(intr_handle)) {
+ PMD_DRV_LOG(ERR,
+ "Rx interrupt requested, but it isn't supported by the PCI driver\n");
+ return -ENOTSUP;
+ }
+
+ /* Disable interrupt mapping before the configuration starts. */
+ rte_intr_disable(intr_handle);
+
+ /* Verify if there are enough vectors available. */
+ vectors_nb = dev->data->nb_rx_queues;
+ if (vectors_nb > RTE_MAX_RXTX_INTR_VEC_ID) {
+ PMD_DRV_LOG(ERR,
+ "Too many Rx interrupts requested, maximum number: %d\n",
+ RTE_MAX_RXTX_INTR_VEC_ID);
+ rc = -ENOTSUP;
+ goto enable_intr;
+ }
+
+ /* Allocate the vector list */
+ if (rte_intr_vec_list_alloc(intr_handle, "intr_vec",
+ dev->data->nb_rx_queues)) {
+ PMD_DRV_LOG(ERR,
+ "Failed to allocate interrupt vector for %d queues\n",
+ dev->data->nb_rx_queues);
+ rc = -ENOMEM;
+ goto enable_intr;
+ }
+
+ rc = rte_intr_efd_enable(intr_handle, vectors_nb);
+ if (rc != 0)
+ goto free_intr_vec;
+
+ if (!rte_intr_allow_others(intr_handle)) {
+ PMD_DRV_LOG(ERR,
+ "Not enough interrupts available to use both ENA Admin and Rx interrupts\n");
+ goto disable_intr_efd;
+ }
+
+ for (i = 0; i < vectors_nb; ++i)
+ if (rte_intr_vec_list_index_set(intr_handle, i,
+ RTE_INTR_VEC_RXTX_OFFSET + i))
+ goto disable_intr_efd;
+
+ rte_intr_enable(intr_handle);
+ return 0;
+
+disable_intr_efd:
+ rte_intr_efd_disable(intr_handle);
+free_intr_vec:
+ rte_intr_vec_list_free(intr_handle);
+enable_intr:
+ rte_intr_enable(intr_handle);
+ return rc;
+}
+
+static void ena_rx_queue_intr_set(struct rte_eth_dev *dev,
+ uint16_t queue_id,
+ bool unmask)
+{
+ struct ena_adapter *adapter = dev->data->dev_private;
+ struct ena_ring *rxq = &adapter->rx_ring[queue_id];
+ struct ena_eth_io_intr_reg intr_reg;
+
+ ena_com_update_intr_reg(&intr_reg, 0, 0, unmask);
+ ena_com_unmask_intr(rxq->ena_com_io_cq, &intr_reg);
+}
+
+static int ena_rx_queue_intr_enable(struct rte_eth_dev *dev,
+ uint16_t queue_id)
+{
+ ena_rx_queue_intr_set(dev, queue_id, true);
+
+ return 0;
+}
+
+static int ena_rx_queue_intr_disable(struct rte_eth_dev *dev,
+ uint16_t queue_id)
+{
+ ena_rx_queue_intr_set(dev, queue_id, false);
+
+ return 0;
+}
+
+static int ena_configure_aenq(struct ena_adapter *adapter)
+{
+ uint32_t aenq_groups = adapter->all_aenq_groups;
+ int rc;
+
+ /* All_aenq_groups holds all AENQ functions supported by the device and
+ * the HW, so at first we need to be sure the LSC request is valid.
+ */
+ if (adapter->edev_data->dev_conf.intr_conf.lsc != 0) {
+ if (!(aenq_groups & BIT(ENA_ADMIN_LINK_CHANGE))) {
+ PMD_DRV_LOG(ERR,
+ "LSC requested, but it's not supported by the AENQ\n");
+ return -EINVAL;
+ }
+ } else {
+ /* If LSC wasn't enabled by the app, let's enable all supported
+ * AENQ procedures except the LSC.
+ */
+ aenq_groups &= ~BIT(ENA_ADMIN_LINK_CHANGE);
+ }
+
+ rc = ena_com_set_aenq_config(&adapter->ena_dev, aenq_groups);
+ if (rc != 0) {
+ PMD_DRV_LOG(ERR, "Cannot configure AENQ groups, rc=%d\n", rc);
+ return rc;
+ }
+
+ adapter->active_aenq_groups = aenq_groups;
+
+ return 0;
+}
+