+/* Supported link speeds of production VIC models */
+static const struct vic_speed_capa {
+ uint16_t sub_devid;
+ uint32_t capa;
+} vic_speed_capa_map[] = {
+ { 0x0043, ETH_LINK_SPEED_10G }, /* VIC */
+ { 0x0047, ETH_LINK_SPEED_10G }, /* P81E PCIe */
+ { 0x0048, ETH_LINK_SPEED_10G }, /* M81KR Mezz */
+ { 0x004f, ETH_LINK_SPEED_10G }, /* 1280 Mezz */
+ { 0x0084, ETH_LINK_SPEED_10G }, /* 1240 MLOM */
+ { 0x0085, ETH_LINK_SPEED_10G }, /* 1225 PCIe */
+ { 0x00cd, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1285 PCIe */
+ { 0x00ce, ETH_LINK_SPEED_10G }, /* 1225T PCIe */
+ { 0x012a, ETH_LINK_SPEED_40G }, /* M4308 */
+ { 0x012c, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1340 MLOM */
+ { 0x012e, ETH_LINK_SPEED_10G }, /* 1227 PCIe */
+ { 0x0137, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1380 Mezz */
+ { 0x014d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1385 PCIe */
+ { 0x015d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1387 MLOM */
+ { 0x0215, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
+ ETH_LINK_SPEED_40G }, /* 1440 Mezz */
+ { 0x0216, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
+ ETH_LINK_SPEED_40G }, /* 1480 MLOM */
+ { 0x0217, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1455 PCIe */
+ { 0x0218, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1457 MLOM */
+ { 0x0219, ETH_LINK_SPEED_40G }, /* 1485 PCIe */
+ { 0x021a, ETH_LINK_SPEED_40G }, /* 1487 MLOM */
+ { 0x024a, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1495 PCIe */
+ { 0x024b, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1497 MLOM */
+ { 0, 0 }, /* End marker */
+};
+