-#define IAVF_FCOE_DDP_CTX_QW1_DTYPE_SHIFT 0
-#define IAVF_FCOE_DDP_CTX_QW1_DTYPE_MASK (0xFULL << \
- IAVF_FCOE_DDP_CTX_QW1_DTYPE_SHIFT)
-
-#define IAVF_FCOE_DDP_CTX_QW1_CMD_SHIFT 4
-#define IAVF_FCOE_DDP_CTX_QW1_CMD_MASK (0xFULL << \
- IAVF_FCOE_DDP_CTX_QW1_CMD_SHIFT)
-
-enum iavf_fcoe_ddp_ctx_desc_cmd_bits {
- IAVF_FCOE_DDP_CTX_DESC_BSIZE_512B = 0x00, /* 2 BITS */
- IAVF_FCOE_DDP_CTX_DESC_BSIZE_4K = 0x01, /* 2 BITS */
- IAVF_FCOE_DDP_CTX_DESC_BSIZE_8K = 0x02, /* 2 BITS */
- IAVF_FCOE_DDP_CTX_DESC_BSIZE_16K = 0x03, /* 2 BITS */
- IAVF_FCOE_DDP_CTX_DESC_DIFENA = 0x04, /* 1 BIT */
- IAVF_FCOE_DDP_CTX_DESC_LASTSEQH = 0x08, /* 1 BIT */
-};
-
-#define IAVF_FCOE_DDP_CTX_QW1_FOFF_SHIFT 16
-#define IAVF_FCOE_DDP_CTX_QW1_FOFF_MASK (0x3FFFULL << \
- IAVF_FCOE_DDP_CTX_QW1_FOFF_SHIFT)
-
-#define IAVF_FCOE_DDP_CTX_QW1_LSIZE_SHIFT 32
-#define IAVF_FCOE_DDP_CTX_QW1_LSIZE_MASK (0x3FFFULL << \
- IAVF_FCOE_DDP_CTX_QW1_LSIZE_SHIFT)
-
-/* FCoE DDP/DWO Queue Context descriptor */
-struct iavf_fcoe_queue_context_desc {
- __le64 dmaindx_fbase; /* 0:11 DMAINDX, 12:63 FBASE */
- __le64 flen_tph; /* 0:12 FLEN, 13:15 TPH */
-};
-
-#define IAVF_FCOE_QUEUE_CTX_QW0_DMAINDX_SHIFT 0
-#define IAVF_FCOE_QUEUE_CTX_QW0_DMAINDX_MASK (0xFFFULL << \
- IAVF_FCOE_QUEUE_CTX_QW0_DMAINDX_SHIFT)
-
-#define IAVF_FCOE_QUEUE_CTX_QW0_FBASE_SHIFT 12
-#define IAVF_FCOE_QUEUE_CTX_QW0_FBASE_MASK (0xFFFFFFFFFFFFFULL << \
- IAVF_FCOE_QUEUE_CTX_QW0_FBASE_SHIFT)
-
-#define IAVF_FCOE_QUEUE_CTX_QW1_FLEN_SHIFT 0
-#define IAVF_FCOE_QUEUE_CTX_QW1_FLEN_MASK (0x1FFFULL << \
- IAVF_FCOE_QUEUE_CTX_QW1_FLEN_SHIFT)
-
-#define IAVF_FCOE_QUEUE_CTX_QW1_TPH_SHIFT 13
-#define IAVF_FCOE_QUEUE_CTX_QW1_TPH_MASK (0x7ULL << \
- IAVF_FCOE_QUEUE_CTX_QW1_FLEN_SHIFT)
-
-enum iavf_fcoe_queue_ctx_desc_tph_bits {
- IAVF_FCOE_QUEUE_CTX_DESC_TPHRDESC = 0x1,
- IAVF_FCOE_QUEUE_CTX_DESC_TPHDATA = 0x2
-};
-
-#define IAVF_FCOE_QUEUE_CTX_QW1_RECIPE_SHIFT 30
-#define IAVF_FCOE_QUEUE_CTX_QW1_RECIPE_MASK (0x3ULL << \
- IAVF_FCOE_QUEUE_CTX_QW1_RECIPE_SHIFT)
-
-/* FCoE DDP/DWO Filter Context descriptor */
-struct iavf_fcoe_filter_context_desc {
- __le32 param;
- __le16 seqn;
-
- /* 48:51(0:3) RSVD, 52:63(4:15) DMAINDX */
- __le16 rsvd_dmaindx;
-
- /* 0:7 FLAGS, 8:52 RSVD, 53:63 LANQ */
- __le64 flags_rsvd_lanq;
-};
-
-#define IAVF_FCOE_FILTER_CTX_QW0_DMAINDX_SHIFT 4
-#define IAVF_FCOE_FILTER_CTX_QW0_DMAINDX_MASK (0xFFF << \
- IAVF_FCOE_FILTER_CTX_QW0_DMAINDX_SHIFT)
-
-enum iavf_fcoe_filter_ctx_desc_flags_bits {
- IAVF_FCOE_FILTER_CTX_DESC_CTYP_DDP = 0x00,
- IAVF_FCOE_FILTER_CTX_DESC_CTYP_DWO = 0x01,
- IAVF_FCOE_FILTER_CTX_DESC_ENODE_INIT = 0x00,
- IAVF_FCOE_FILTER_CTX_DESC_ENODE_RSP = 0x02,
- IAVF_FCOE_FILTER_CTX_DESC_FC_CLASS2 = 0x00,
- IAVF_FCOE_FILTER_CTX_DESC_FC_CLASS3 = 0x04
-};
-
-#define IAVF_FCOE_FILTER_CTX_QW1_FLAGS_SHIFT 0
-#define IAVF_FCOE_FILTER_CTX_QW1_FLAGS_MASK (0xFFULL << \
- IAVF_FCOE_FILTER_CTX_QW1_FLAGS_SHIFT)
-
-#define IAVF_FCOE_FILTER_CTX_QW1_PCTYPE_SHIFT 8
-#define IAVF_FCOE_FILTER_CTX_QW1_PCTYPE_MASK (0x3FULL << \
- IAVF_FCOE_FILTER_CTX_QW1_PCTYPE_SHIFT)
-
-#define IAVF_FCOE_FILTER_CTX_QW1_LANQINDX_SHIFT 53
-#define IAVF_FCOE_FILTER_CTX_QW1_LANQINDX_MASK (0x7FFULL << \
- IAVF_FCOE_FILTER_CTX_QW1_LANQINDX_SHIFT)
-
-enum iavf_switch_element_types {
- IAVF_SWITCH_ELEMENT_TYPE_MAC = 1,
- IAVF_SWITCH_ELEMENT_TYPE_PF = 2,
- IAVF_SWITCH_ELEMENT_TYPE_VF = 3,
- IAVF_SWITCH_ELEMENT_TYPE_EMP = 4,
- IAVF_SWITCH_ELEMENT_TYPE_BMC = 6,
- IAVF_SWITCH_ELEMENT_TYPE_PE = 16,
- IAVF_SWITCH_ELEMENT_TYPE_VEB = 17,
- IAVF_SWITCH_ELEMENT_TYPE_PA = 18,
- IAVF_SWITCH_ELEMENT_TYPE_VSI = 19,
-};
-
-/* Supported EtherType filters */
-enum iavf_ether_type_index {
- IAVF_ETHER_TYPE_1588 = 0,
- IAVF_ETHER_TYPE_FIP = 1,
- IAVF_ETHER_TYPE_OUI_EXTENDED = 2,
- IAVF_ETHER_TYPE_MAC_CONTROL = 3,
- IAVF_ETHER_TYPE_LLDP = 4,
- IAVF_ETHER_TYPE_EVB_PROTOCOL1 = 5,
- IAVF_ETHER_TYPE_EVB_PROTOCOL2 = 6,
- IAVF_ETHER_TYPE_QCN_CNM = 7,
- IAVF_ETHER_TYPE_8021X = 8,
- IAVF_ETHER_TYPE_ARP = 9,
- IAVF_ETHER_TYPE_RSV1 = 10,
- IAVF_ETHER_TYPE_RSV2 = 11,
-};
-
-/* Filter context base size is 1K */
-#define IAVF_HASH_FILTER_BASE_SIZE 1024
-/* Supported Hash filter values */
-enum iavf_hash_filter_size {
- IAVF_HASH_FILTER_SIZE_1K = 0,
- IAVF_HASH_FILTER_SIZE_2K = 1,
- IAVF_HASH_FILTER_SIZE_4K = 2,
- IAVF_HASH_FILTER_SIZE_8K = 3,
- IAVF_HASH_FILTER_SIZE_16K = 4,
- IAVF_HASH_FILTER_SIZE_32K = 5,
- IAVF_HASH_FILTER_SIZE_64K = 6,
- IAVF_HASH_FILTER_SIZE_128K = 7,
- IAVF_HASH_FILTER_SIZE_256K = 8,
- IAVF_HASH_FILTER_SIZE_512K = 9,
- IAVF_HASH_FILTER_SIZE_1M = 10,
-};
-
-/* DMA context base size is 0.5K */
-#define IAVF_DMA_CNTX_BASE_SIZE 512
-/* Supported DMA context values */
-enum iavf_dma_cntx_size {
- IAVF_DMA_CNTX_SIZE_512 = 0,
- IAVF_DMA_CNTX_SIZE_1K = 1,
- IAVF_DMA_CNTX_SIZE_2K = 2,
- IAVF_DMA_CNTX_SIZE_4K = 3,
- IAVF_DMA_CNTX_SIZE_8K = 4,
- IAVF_DMA_CNTX_SIZE_16K = 5,
- IAVF_DMA_CNTX_SIZE_32K = 6,
- IAVF_DMA_CNTX_SIZE_64K = 7,
- IAVF_DMA_CNTX_SIZE_128K = 8,
- IAVF_DMA_CNTX_SIZE_256K = 9,
-};
-
-/* Supported Hash look up table (LUT) sizes */
-enum iavf_hash_lut_size {
- IAVF_HASH_LUT_SIZE_128 = 0,
- IAVF_HASH_LUT_SIZE_512 = 1,
-};
-
-/* Structure to hold a per PF filter control settings */
-struct iavf_filter_control_settings {
- /* number of PE Quad Hash filter buckets */
- enum iavf_hash_filter_size pe_filt_num;
- /* number of PE Quad Hash contexts */
- enum iavf_dma_cntx_size pe_cntx_num;
- /* number of FCoE filter buckets */
- enum iavf_hash_filter_size fcoe_filt_num;
- /* number of FCoE DDP contexts */
- enum iavf_dma_cntx_size fcoe_cntx_num;
- /* size of the Hash LUT */
- enum iavf_hash_lut_size hash_lut_size;
- /* enable FDIR filters for PF and its VFs */
- bool enable_fdir;
- /* enable Ethertype filters for PF and its VFs */
- bool enable_ethtype;
- /* enable MAC/VLAN filters for PF and its VFs */
- bool enable_macvlan;
-};
-
-/* Structure to hold device level control filter counts */
-struct iavf_control_filter_stats {
- u16 mac_etype_used; /* Used perfect match MAC/EtherType filters */
- u16 etype_used; /* Used perfect EtherType filters */
- u16 mac_etype_free; /* Un-used perfect match MAC/EtherType filters */
- u16 etype_free; /* Un-used perfect EtherType filters */
-};
-
-enum iavf_reset_type {
- IAVF_RESET_POR = 0,
- IAVF_RESET_CORER = 1,
- IAVF_RESET_GLOBR = 2,
- IAVF_RESET_EMPR = 3,
-};
-
-/* IEEE 802.1AB LLDP Agent Variables from NVM */
-#define IAVF_NVM_LLDP_CFG_PTR 0x06
-#define IAVF_SR_LLDP_CFG_PTR 0x31